1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2016, NVIDIA CORPORATION.
7 #include <clk-uclass.h>
10 #include <asm/arch-tegra/bpmp_abi.h>
12 static ulong tegra186_clk_get_rate(struct clk *clk)
14 struct mrq_clk_request req;
15 struct mrq_clk_response resp;
18 debug("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev,
21 req.cmd_and_id = (CMD_CLK_GET_RATE << 24) | clk->id;
23 ret = misc_call(clk->dev->parent, MRQ_CLK, &req, sizeof(req), &resp,
28 return resp.clk_get_rate.rate;
31 static ulong tegra186_clk_set_rate(struct clk *clk, ulong rate)
33 struct mrq_clk_request req;
34 struct mrq_clk_response resp;
37 debug("%s(clk=%p, rate=%lu) (dev=%p, id=%lu)\n", __func__, clk, rate,
40 req.cmd_and_id = (CMD_CLK_SET_RATE << 24) | clk->id;
41 req.clk_set_rate.rate = rate;
43 ret = misc_call(clk->dev->parent, MRQ_CLK, &req, sizeof(req), &resp,
48 return resp.clk_set_rate.rate;
51 static int tegra186_clk_en_dis(struct clk *clk,
52 enum mrq_reset_commands cmd)
54 struct mrq_clk_request req;
55 struct mrq_clk_response resp;
58 req.cmd_and_id = (cmd << 24) | clk->id;
60 ret = misc_call(clk->dev->parent, MRQ_CLK, &req, sizeof(req), &resp,
68 static int tegra186_clk_enable(struct clk *clk)
70 debug("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev,
73 return tegra186_clk_en_dis(clk, CMD_CLK_ENABLE);
76 static int tegra186_clk_disable(struct clk *clk)
78 debug("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev,
81 return tegra186_clk_en_dis(clk, CMD_CLK_DISABLE);
84 static struct clk_ops tegra186_clk_ops = {
85 .get_rate = tegra186_clk_get_rate,
86 .set_rate = tegra186_clk_set_rate,
87 .enable = tegra186_clk_enable,
88 .disable = tegra186_clk_disable,
91 static int tegra186_clk_probe(struct udevice *dev)
93 debug("%s(dev=%p)\n", __func__, dev);
98 U_BOOT_DRIVER(tegra186_clk) = {
99 .name = "tegra186_clk",
101 .probe = tegra186_clk_probe,
102 .ops = &tegra186_clk_ops,