2 * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
4 * SPDX-License-Identifier: GPL-2.0+
9 #include <linux/bitops.h>
12 #include <dm/device.h>
14 #include "clk-uniphier.h"
16 DECLARE_GLOBAL_DATA_PTR;
18 static int uniphier_clk_enable(struct udevice *dev, int index)
20 struct uniphier_clk_priv *priv = dev_get_priv(dev);
21 struct uniphier_clk_gate_data *gate = priv->socdata->gate;
22 unsigned int nr_gate = priv->socdata->nr_gate;
27 for (i = 0; i < nr_gate; i++) {
28 if (gate[i].index != index)
31 reg = priv->base + gate[i].reg;
33 data = gate[i].data & mask;
38 debug("%s: %p: %08x\n", __func__, reg, tmp);
45 static ulong uniphier_clk_get_rate(struct udevice *dev, int index)
47 struct uniphier_clk_priv *priv = dev_get_priv(dev);
48 struct uniphier_clk_rate_data *rdata = priv->socdata->rate;
49 unsigned int nr_rdata = priv->socdata->nr_rate;
52 ulong matched_rate = 0;
55 for (i = 0; i < nr_rdata; i++) {
56 if (rdata[i].index != index)
59 if (rdata[i].reg == UNIPHIER_CLK_RATE_IS_FIXED)
62 reg = priv->base + rdata[i].reg;
64 data = rdata[i].data & mask;
65 if ((readl(reg) & mask) == data) {
66 if (matched_rate && rdata[i].rate != matched_rate) {
67 printf("failed to get clk rate for insane register values\n");
70 matched_rate = rdata[i].rate;
74 debug("%s: rate = %lu\n", __func__, matched_rate);
79 static ulong uniphier_clk_set_rate(struct udevice *dev, int index, ulong rate)
81 struct uniphier_clk_priv *priv = dev_get_priv(dev);
82 struct uniphier_clk_rate_data *rdata = priv->socdata->rate;
83 unsigned int nr_rdata = priv->socdata->nr_rate;
89 /* first, decide the best match rate */
90 for (i = 0; i < nr_rdata; i++) {
91 if (rdata[i].index != index)
94 if (rdata[i].reg == UNIPHIER_CLK_RATE_IS_FIXED)
97 if (rdata[i].rate > best_rate && rdata[i].rate <= rate)
98 best_rate = rdata[i].rate;
104 debug("%s: requested rate = %lu, set rate = %lu\n", __func__,
107 /* second, really set registers */
108 for (i = 0; i < nr_rdata; i++) {
109 if (rdata[i].index != index || rdata[i].rate != best_rate)
112 reg = priv->base + rdata[i].reg;
113 mask = rdata[i].mask;
114 data = rdata[i].data & mask;
119 debug("%s: %p: %08x\n", __func__, reg, tmp);
126 const struct clk_ops uniphier_clk_ops = {
127 .enable = uniphier_clk_enable,
128 .get_periph_rate = uniphier_clk_get_rate,
129 .set_periph_rate = uniphier_clk_set_rate,
132 int uniphier_clk_probe(struct udevice *dev)
134 struct uniphier_clk_priv *priv = dev_get_priv(dev);
138 addr = fdtdec_get_addr_size(gd->fdt_blob, dev->of_offset, "reg",
140 if (addr == FDT_ADDR_T_NONE)
143 priv->base = map_sysmem(addr, size);
147 priv->socdata = (void *)dev_get_driver_data(dev);
152 int uniphier_clk_remove(struct udevice *dev)
154 struct uniphier_clk_priv *priv = dev_get_priv(dev);
156 unmap_sysmem(priv->base);