2 * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
4 * Derived from linux/arch/mips/bcm63xx/cpu.c:
5 * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
6 * Copyright (C) 2009 Florian Fainelli <florian@openwrt.org>
8 * SPDX-License-Identifier: GPL-2.0+
17 DECLARE_GLOBAL_DATA_PTR;
19 #define REV_CHIPID_SHIFT 16
20 #define REV_CHIPID_MASK (0xffff << REV_CHIPID_SHIFT)
21 #define REV_LONG_CHIPID_SHIFT 12
22 #define REV_LONG_CHIPID_MASK (0xfffff << REV_LONG_CHIPID_SHIFT)
23 #define REV_REVID_SHIFT 0
24 #define REV_REVID_MASK (0xff << REV_REVID_SHIFT)
26 #define REG_BCM6328_OTP 0x62c
27 #define BCM6328_TP1_DISABLED BIT(9)
29 #define REG_BCM6328_MISC_STRAPBUS 0x1a40
30 #define STRAPBUS_6328_FCVO_SHIFT 7
31 #define STRAPBUS_6328_FCVO_MASK (0x1f << STRAPBUS_6328_FCVO_SHIFT)
33 #define REG_BCM6358_DDR_DMIPSPLLCFG 0x12b8
34 #define DMIPSPLLCFG_6358_M1_SHIFT 0
35 #define DMIPSPLLCFG_6358_M1_MASK (0xff << DMIPSPLLCFG_6358_M1_SHIFT)
36 #define DMIPSPLLCFG_6358_N1_SHIFT 23
37 #define DMIPSPLLCFG_6358_N1_MASK (0x3f << DMIPSPLLCFG_6358_N1_SHIFT)
38 #define DMIPSPLLCFG_6358_N2_SHIFT 29
39 #define DMIPSPLLCFG_6358_N2_MASK (0x7 << DMIPSPLLCFG_6358_N2_SHIFT)
41 #define REG_BCM63268_MISC_STRAPBUS 0x1814
42 #define STRAPBUS_63268_FCVO_SHIFT 21
43 #define STRAPBUS_63268_FCVO_MASK (0xf << STRAPBUS_63268_FCVO_SHIFT)
45 struct bmips_cpu_priv;
48 int (*get_cpu_desc)(struct bmips_cpu_priv *priv, char *buf, int size);
49 ulong (*get_cpu_freq)(struct bmips_cpu_priv *);
50 int (*get_cpu_count)(struct bmips_cpu_priv *);
53 struct bmips_cpu_priv {
55 const struct bmips_cpu_hw *hw;
58 /* Specific CPU Ops */
59 static int bcm6358_get_cpu_desc(struct bmips_cpu_priv *priv, char *buf,
62 unsigned short cpu_id;
63 unsigned char cpu_rev;
66 val = readl_be(priv->regs);
67 cpu_id = (val & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
68 cpu_rev = (val & REV_REVID_MASK) >> REV_REVID_SHIFT;
70 snprintf(buf, size, "BCM%04X%02X", cpu_id, cpu_rev);
75 static int bcm6328_get_cpu_desc(struct bmips_cpu_priv *priv, char *buf,
79 unsigned char cpu_rev;
82 val = readl_be(priv->regs);
83 cpu_id = (val & REV_LONG_CHIPID_MASK) >> REV_LONG_CHIPID_SHIFT;
84 cpu_rev = (val & REV_REVID_MASK) >> REV_REVID_SHIFT;
86 snprintf(buf, size, "BCM%05X%02X", cpu_id, cpu_rev);
91 static ulong bcm6328_get_cpu_freq(struct bmips_cpu_priv *priv)
93 unsigned int mips_pll_fcvo;
95 mips_pll_fcvo = readl_be(priv->regs + REG_BCM6328_MISC_STRAPBUS);
96 mips_pll_fcvo = (mips_pll_fcvo & STRAPBUS_6328_FCVO_MASK)
97 >> STRAPBUS_6328_FCVO_SHIFT;
99 switch (mips_pll_fcvo) {
118 static ulong bcm6358_get_cpu_freq(struct bmips_cpu_priv *priv)
120 unsigned int tmp, n1, n2, m1;
122 tmp = readl_be(priv->regs + REG_BCM6358_DDR_DMIPSPLLCFG);
123 n1 = (tmp & DMIPSPLLCFG_6358_N1_MASK) >> DMIPSPLLCFG_6358_N1_SHIFT;
124 n2 = (tmp & DMIPSPLLCFG_6358_N2_MASK) >> DMIPSPLLCFG_6358_N2_SHIFT;
125 m1 = (tmp & DMIPSPLLCFG_6358_M1_MASK) >> DMIPSPLLCFG_6358_M1_SHIFT;
127 return (16 * 1000000 * n1 * n2) / m1;
130 static ulong bcm63268_get_cpu_freq(struct bmips_cpu_priv *priv)
132 unsigned int mips_pll_fcvo;
134 mips_pll_fcvo = readl_be(priv->regs + REG_BCM63268_MISC_STRAPBUS);
135 mips_pll_fcvo = (mips_pll_fcvo & STRAPBUS_63268_FCVO_MASK)
136 >> STRAPBUS_63268_FCVO_SHIFT;
138 switch (mips_pll_fcvo) {
153 static int bcm6328_get_cpu_count(struct bmips_cpu_priv *priv)
155 u32 val = readl_be(priv->regs + REG_BCM6328_OTP);
157 if (val & BCM6328_TP1_DISABLED)
163 static int bcm6358_get_cpu_count(struct bmips_cpu_priv *priv)
168 static const struct bmips_cpu_hw bmips_cpu_bcm6328 = {
169 .get_cpu_desc = bcm6328_get_cpu_desc,
170 .get_cpu_freq = bcm6328_get_cpu_freq,
171 .get_cpu_count = bcm6328_get_cpu_count,
174 static const struct bmips_cpu_hw bmips_cpu_bcm6358 = {
175 .get_cpu_desc = bcm6358_get_cpu_desc,
176 .get_cpu_freq = bcm6358_get_cpu_freq,
177 .get_cpu_count = bcm6358_get_cpu_count,
180 static const struct bmips_cpu_hw bmips_cpu_bcm63268 = {
181 .get_cpu_desc = bcm6328_get_cpu_desc,
182 .get_cpu_freq = bcm63268_get_cpu_freq,
183 .get_cpu_count = bcm6358_get_cpu_count,
186 /* Generic CPU Ops */
187 static int bmips_cpu_get_desc(struct udevice *dev, char *buf, int size)
189 struct bmips_cpu_priv *priv = dev_get_priv(dev);
190 const struct bmips_cpu_hw *hw = priv->hw;
192 return hw->get_cpu_desc(priv, buf, size);
195 static int bmips_cpu_get_info(struct udevice *dev, struct cpu_info *info)
197 struct bmips_cpu_priv *priv = dev_get_priv(dev);
198 const struct bmips_cpu_hw *hw = priv->hw;
200 info->cpu_freq = hw->get_cpu_freq(priv);
201 info->features = BIT(CPU_FEAT_L1_CACHE);
202 info->features |= BIT(CPU_FEAT_MMU);
203 info->features |= BIT(CPU_FEAT_DEVICE_ID);
208 static int bmips_cpu_get_count(struct udevice *dev)
210 struct bmips_cpu_priv *priv = dev_get_priv(dev);
211 const struct bmips_cpu_hw *hw = priv->hw;
213 return hw->get_cpu_count(priv);
216 static int bmips_cpu_get_vendor(struct udevice *dev, char *buf, int size)
218 snprintf(buf, size, "Broadcom");
223 static const struct cpu_ops bmips_cpu_ops = {
224 .get_desc = bmips_cpu_get_desc,
225 .get_info = bmips_cpu_get_info,
226 .get_count = bmips_cpu_get_count,
227 .get_vendor = bmips_cpu_get_vendor,
230 /* BMIPS CPU driver */
231 int bmips_cpu_bind(struct udevice *dev)
233 struct cpu_platdata *plat = dev_get_parent_platdata(dev);
235 plat->cpu_id = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
237 plat->device_id = read_c0_prid();
242 int bmips_cpu_probe(struct udevice *dev)
244 struct bmips_cpu_priv *priv = dev_get_priv(dev);
245 const struct bmips_cpu_hw *hw =
246 (const struct bmips_cpu_hw *)dev_get_driver_data(dev);
250 addr = dev_get_addr_size_index(dev_get_parent(dev), 0, &size);
251 if (addr == FDT_ADDR_T_NONE)
254 priv->regs = ioremap(addr, size);
260 static const struct udevice_id bmips_cpu_ids[] = {
262 .compatible = "brcm,bcm6328-cpu",
263 .data = (ulong)&bmips_cpu_bcm6328,
265 .compatible = "brcm,bcm6358-cpu",
266 .data = (ulong)&bmips_cpu_bcm6358,
268 .compatible = "brcm,bcm63268-cpu",
269 .data = (ulong)&bmips_cpu_bcm63268,
274 U_BOOT_DRIVER(bmips_cpu_drv) = {
277 .of_match = bmips_cpu_ids,
278 .bind = bmips_cpu_bind,
279 .probe = bmips_cpu_probe,
280 .priv_auto_alloc_size = sizeof(struct bmips_cpu_priv),
281 .ops = &bmips_cpu_ops,
282 .flags = DM_FLAG_PRE_RELOC,
285 #ifdef CONFIG_DISPLAY_CPUINFO
286 int print_cpuinfo(void)
293 err = uclass_get_device(UCLASS_CPU, 0, &dev);
297 err = cpu_get_info(dev, &cpu);
301 err = cpu_get_desc(dev, desc, sizeof(desc));
305 printf("Chip ID: %s, MIPS: ", desc);
306 print_freq(cpu.cpu_freq, "\n");