1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2008-2014 Freescale Semiconductor, Inc.
10 #include <linux/compiler.h>
13 /* Timeout currently defined as 90 sec */
14 #define CONFIG_SEC_DEQ_TIMEOUT 90000000U
16 #define DEFAULT_JR_ID 0
17 #define DEFAULT_JR_LIODN 0
18 #define DEFAULT_IRQ 0 /* Interrupts not to be configured */
20 #define MCFGR_SWRST ((uint32_t)(1)<<31) /* Software Reset */
21 #define MCFGR_DMA_RST ((uint32_t)(1)<<28) /* DMA Reset */
22 #define MCFGR_PS_SHIFT 16
23 #define MCFGR_AWCACHE_SHIFT 8
24 #define MCFGR_AWCACHE_MASK (0xf << MCFGR_AWCACHE_SHIFT)
25 #define MCFGR_ARCACHE_SHIFT 12
26 #define MCFGR_ARCACHE_MASK (0xf << MCFGR_ARCACHE_SHIFT)
28 #define JR_INTMASK 0x00000001
29 #define JRCR_RESET 0x01
30 #define JRINT_ERR_HALT_INPROGRESS 0x4
31 #define JRINT_ERR_HALT_MASK 0xc
32 #define JRNSLIODN_SHIFT 16
33 #define JRNSLIODN_MASK 0x0fff0000
34 #define JRSLIODN_SHIFT 0
35 #define JRSLIODN_MASK 0x00000fff
36 #define JROWN_NS 0x00000008
37 #define JRMID_NS 0x00000001
40 #define JQ_DEQ_TO_ERR -2
43 #define RNG4_MAX_HANDLES 2
51 void (*callback)(uint32_t status, void *arg);
52 phys_addr_t desc_phys_addr;
62 /* Head is the index where software would enq the descriptor in
66 /* Tail index would be used by s/w ehile enqueuing to determine if
67 * there is any space left in the s/w maintained i/p rings
69 /* Also in case of deq tail will be incremented only in case of
70 * in-order job completion
73 /* Read index of the output ring. It may not match with tail in case
74 * of out of order completetion
77 /* Write index to input ring. Would be always equal to head */
79 /* Size of the rings. */
81 /* Op ring size aligned to cache line size */
83 /* The ip and output rings have to be accessed by SEC. So the
84 * pointers will ahve to point to the housekeeping region provided
87 /*Circular Ring of i/p descriptors */
88 dma_addr_t *input_ring;
89 /* Circular Ring of o/p descriptors */
90 /* Circula Ring containing info regarding descriptors in i/p
93 /* This ring can be on the stack */
94 struct jr_info info[JR_SIZE];
95 struct op_ring *output_ring;
96 /* Offset in CCSR to the SEC engine to which this JR belongs */
106 void caam_jr_strstatus(u32 status);
107 int run_descriptor_jr(uint32_t *desc);