2 * Copyright 2014 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
9 #include <fdt_support.h>
10 #if CONFIG_SYS_FSL_SEC_COMPAT == 2 || CONFIG_SYS_FSL_SEC_COMPAT >= 4
15 * update crypto node properties to a specified revision of the SEC
16 * called with sec_rev == 0 if not on an E processor
18 #if CONFIG_SYS_FSL_SEC_COMPAT == 2 /* SEC 2.x/3.x */
19 void fdt_fixup_crypto_node(void *blob, int sec_rev)
21 static const struct sec_rev_prop {
26 u32 descriptor_types_mask;
27 } sec_rev_prop_list[] = {
28 { 0x0200, 4, 24, 0x07e, 0x01010ebf }, /* SEC 2.0 */
29 { 0x0201, 4, 24, 0x0fe, 0x012b0ebf }, /* SEC 2.1 */
30 { 0x0202, 1, 24, 0x04c, 0x0122003f }, /* SEC 2.2 */
31 { 0x0204, 4, 24, 0x07e, 0x012b0ebf }, /* SEC 2.4 */
32 { 0x0300, 4, 24, 0x9fe, 0x03ab0ebf }, /* SEC 3.0 */
33 { 0x0301, 4, 24, 0xbfe, 0x03ab0ebf }, /* SEC 3.1 */
34 { 0x0303, 4, 24, 0x97c, 0x03a30abf }, /* SEC 3.3 */
36 static char compat_strlist[ARRAY_SIZE(sec_rev_prop_list) *
37 sizeof("fsl,secX.Y")];
38 int crypto_node, sec_idx, err;
42 /* locate crypto node based on lowest common compatible */
43 crypto_node = fdt_node_offset_by_compatible(blob, -1, "fsl,sec2.0");
44 if (crypto_node == -FDT_ERR_NOTFOUND)
47 /* delete it if not on an E-processor */
48 if (crypto_node > 0 && !sec_rev) {
49 fdt_del_node(blob, crypto_node);
53 /* else we got called for possible uprev */
54 for (sec_idx = 0; sec_idx < ARRAY_SIZE(sec_rev_prop_list); sec_idx++)
55 if (sec_rev_prop_list[sec_idx].sec_rev == sec_rev)
58 if (sec_idx == ARRAY_SIZE(sec_rev_prop_list)) {
59 puts("warning: unknown SEC revision number\n");
63 val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].num_channels);
64 err = fdt_setprop(blob, crypto_node, "fsl,num-channels", &val, 4);
66 printf("WARNING: could not set crypto property: %s\n",
69 val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].descriptor_types_mask);
70 err = fdt_setprop(blob, crypto_node, "fsl,descriptor-types-mask",
73 printf("WARNING: could not set crypto property: %s\n",
76 val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].exec_units_mask);
77 err = fdt_setprop(blob, crypto_node, "fsl,exec-units-mask", &val, 4);
79 printf("WARNING: could not set crypto property: %s\n",
82 val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].channel_fifo_len);
83 err = fdt_setprop(blob, crypto_node, "fsl,channel-fifo-len", &val, 4);
85 printf("WARNING: could not set crypto property: %s\n",
89 while (sec_idx >= 0) {
90 p = compat_strlist + val;
91 val += sprintf(p, "fsl,sec%d.%d",
92 (sec_rev_prop_list[sec_idx].sec_rev & 0xff00) >> 8,
93 sec_rev_prop_list[sec_idx].sec_rev & 0x00ff) + 1;
96 err = fdt_setprop(blob, crypto_node, "compatible", &compat_strlist,
99 printf("WARNING: could not set crypto property: %s\n",
102 #elif CONFIG_SYS_FSL_SEC_COMPAT >= 4 /* SEC4 */
103 static u8 caam_get_era(void)
105 static const struct {
125 ccsr_sec_t __iomem *sec = (void __iomem *)CONFIG_SYS_FSL_SEC_ADDR;
126 u32 secvid_ms = sec_in32(&sec->secvid_ms);
127 u32 ccbvid = sec_in32(&sec->ccbvid);
128 u16 ip_id = (secvid_ms & SEC_SECVID_MS_IPID_MASK) >>
129 SEC_SECVID_MS_IPID_SHIFT;
130 u8 maj_rev = (secvid_ms & SEC_SECVID_MS_MAJ_REV_MASK) >>
131 SEC_SECVID_MS_MAJ_REV_SHIFT;
132 u8 era = (ccbvid & SEC_CCBVID_ERA_MASK) >> SEC_CCBVID_ERA_SHIFT;
136 if (era) /* This is '0' prior to CAAM ERA-6 */
139 for (i = 0; i < ARRAY_SIZE(caam_eras); i++)
140 if (caam_eras[i].ip_id == ip_id &&
141 caam_eras[i].maj_rev == maj_rev)
142 return caam_eras[i].era;
147 static void fdt_fixup_crypto_era(void *blob, u32 era)
152 crypto_node = fdt_path_offset(blob, "crypto");
153 if (crypto_node < 0) {
154 printf("WARNING: Missing crypto node\n");
158 err = fdt_setprop(blob, crypto_node, "fsl,sec-era", &era,
161 printf("ERROR: could not set fsl,sec-era property: %s\n",
166 void fdt_fixup_crypto_node(void *blob, int sec_rev)
171 fdt_del_node_and_alias(blob, "crypto");
175 /* Add SEC ERA information in compatible */
176 era = caam_get_era();
178 fdt_fixup_crypto_era(blob, era);
180 printf("WARNING: Unable to get ERA for CAAM rev: %d\n",