git.sur5r.net Git - u-boot/blob - drivers/ddr/fsl/interactive.c

   1 /*
   2  * Copyright 2010-2014 Freescale Semiconductor, Inc.
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 /*
   8  * Generic driver for Freescale DDR/DDR2/DDR3 memory controller.
   9  * Based on code from spd_sdram.c
  10  * Author: James Yang [at freescale.com]
  11  *         York Sun [at freescale.com]
  12  */
  13
  14 #include <common.h>
  15 #include <cli.h>
  16 #include <linux/ctype.h>
  17 #include <asm/types.h>
  18 #include <asm/io.h>
  19
  20 #include <fsl_ddr_sdram.h>
  21 #include <fsl_ddr.h>
  22
  23 /* Option parameter Structures */
  24 struct options_string {
  25         const char *option_name;
  26         size_t offset;
  27         unsigned int size;
  28         const char printhex;
  29 };
  30
  31 static unsigned int picos_to_mhz(unsigned int picos)
  32 {
  33         return 1000000 / picos;
  34 }
  35
  36 static void print_option_table(const struct options_string *table,
  37                          int table_size,
  38                          const void *base)
  39 {
  40         unsigned int i;
  41         unsigned int *ptr;
  42         unsigned long long *ptr_l;
  43
  44         for (i = 0; i < table_size; i++) {
  45                 switch (table[i].size) {
  46                 case 4:
  47                         ptr = (unsigned int *) (base + table[i].offset);
  48                         if (table[i].printhex) {
  49                                 printf("%s = 0x%08X\n",
  50                                         table[i].option_name, *ptr);
  51                         } else {
  52                                 printf("%s = %u\n",
  53                                         table[i].option_name, *ptr);
  54                         }
  55                         break;
  56                 case 8:
  57                         ptr_l = (unsigned long long *) (base + table[i].offset);
  58                         printf("%s = %llu\n",
  59                                 table[i].option_name, *ptr_l);
  60                         break;
  61                 default:
  62                         printf("Unrecognized size!\n");
  63                         break;
  64                 }
  65         }
  66 }
  67
  68 static int handle_option_table(const struct options_string *table,
  69                          int table_size,
  70                          void *base,
  71                          const char *opt,
  72                          const char *val)
  73 {
  74         unsigned int i;
  75         unsigned int value, *ptr;
  76         unsigned long long value_l, *ptr_l;
  77
  78         for (i = 0; i < table_size; i++) {
  79                 if (strcmp(table[i].option_name, opt) != 0)
  80                         continue;
  81                 switch (table[i].size) {
  82                 case 4:
  83                         value = simple_strtoul(val, NULL, 0);
  84                         ptr = base + table[i].offset;
  85                         *ptr = value;
  86                         break;
  87                 case 8:
  88                         value_l = simple_strtoull(val, NULL, 0);
  89                         ptr_l = base + table[i].offset;
  90                         *ptr_l = value_l;
  91                         break;
  92                 default:
  93                         printf("Unrecognized size!\n");
  94                         break;
  95                 }
  96                 return 1;
  97         }
  98
  99         return 0;
 100 }
 101
 102 static void fsl_ddr_generic_edit(void *pdata,
 103                            void *pend,
 104                            unsigned int element_size,
 105                            unsigned int element_num,
 106                            unsigned int value)
 107 {
 108         char *pcdata = (char *)pdata;           /* BIG ENDIAN ONLY */
 109
 110         pcdata += element_num * element_size;
 111         if ((pcdata + element_size) > (char *) pend) {
 112                 printf("trying to write past end of data\n");
 113                 return;
 114         }
 115
 116         switch (element_size) {
 117         case 1:
 118                 __raw_writeb(value, pcdata);
 119                 break;
 120         case 2:
 121                 __raw_writew(value, pcdata);
 122                 break;
 123         case 4:
 124                 __raw_writel(value, pcdata);
 125                 break;
 126         default:
 127                 printf("unexpected element size %u\n", element_size);
 128                 break;
 129         }
 130 }
 131
 132 static void fsl_ddr_spd_edit(fsl_ddr_info_t *pinfo,
 133                        unsigned int ctrl_num,
 134                        unsigned int dimm_num,
 135                        unsigned int element_num,
 136                        unsigned int value)
 137 {
 138         generic_spd_eeprom_t *pspd;
 139
 140         pspd = &(pinfo->spd_installed_dimms[ctrl_num][dimm_num]);
 141         fsl_ddr_generic_edit(pspd, pspd + 1, 1, element_num, value);
 142 }
 143
 144 #define COMMON_TIMING(x) {#x, offsetof(common_timing_params_t, x), \
 145         sizeof((common_timing_params_t *)0)->x, 0}
 146
 147 static void lowest_common_dimm_parameters_edit(fsl_ddr_info_t *pinfo,
 148                                         unsigned int ctrl_num,
 149                                         const char *optname_str,
 150                                         const char *value_str)
 151 {
 152         common_timing_params_t *p = &pinfo->common_timing_params[ctrl_num];
 153
 154         static const struct options_string options[] = {
 155                 COMMON_TIMING(tckmin_x_ps),
 156                 COMMON_TIMING(tckmax_ps),
 157 #if defined(CONFIG_SYS_FSL_DDR3) || defined(CONFIG_SYS_FSL_DDR4)
 158                 COMMON_TIMING(taamin_ps),
 159 #endif
 160                 COMMON_TIMING(trcd_ps),
 161                 COMMON_TIMING(trp_ps),
 162                 COMMON_TIMING(tras_ps),
 163
 164 #ifdef CONFIG_SYS_FSL_DDR4
 165                 COMMON_TIMING(trfc1_ps),
 166                 COMMON_TIMING(trfc2_ps),
 167                 COMMON_TIMING(trfc4_ps),
 168                 COMMON_TIMING(trrds_ps),
 169                 COMMON_TIMING(trrdl_ps),
 170                 COMMON_TIMING(tccdl_ps),
 171 #else
 172                 COMMON_TIMING(twtr_ps),
 173                 COMMON_TIMING(trfc_ps),
 174                 COMMON_TIMING(trrd_ps),
 175                 COMMON_TIMING(trtp_ps),
 176 #endif
 177                 COMMON_TIMING(twr_ps),
 178                 COMMON_TIMING(trc_ps),
 179                 COMMON_TIMING(refresh_rate_ps),
 180                 COMMON_TIMING(extended_op_srt),
 181 #if defined(CONFIG_SYS_FSL_DDR1) || defined(CONFIG_SYS_FSL_DDR2)
 182                 COMMON_TIMING(tis_ps),
 183                 COMMON_TIMING(tih_ps),
 184                 COMMON_TIMING(tds_ps),
 185                 COMMON_TIMING(tdh_ps),
 186                 COMMON_TIMING(tdqsq_max_ps),
 187                 COMMON_TIMING(tqhs_ps),
 188 #endif
 189                 COMMON_TIMING(ndimms_present),
 190                 COMMON_TIMING(lowest_common_spd_caslat),
 191                 COMMON_TIMING(highest_common_derated_caslat),
 192                 COMMON_TIMING(additive_latency),
 193                 COMMON_TIMING(all_dimms_burst_lengths_bitmask),
 194                 COMMON_TIMING(all_dimms_registered),
 195                 COMMON_TIMING(all_dimms_unbuffered),
 196                 COMMON_TIMING(all_dimms_ecc_capable),
 197                 COMMON_TIMING(total_mem),
 198                 COMMON_TIMING(base_address),
 199         };
 200         static const unsigned int n_opts = ARRAY_SIZE(options);
 201
 202         if (handle_option_table(options, n_opts, p, optname_str, value_str))
 203                 return;
 204
 205         printf("Error: couldn't find option string %s\n", optname_str);
 206 }
 207
 208 #define DIMM_PARM(x) {#x, offsetof(dimm_params_t, x), \
 209         sizeof((dimm_params_t *)0)->x, 0}
 210 #define DIMM_PARM_HEX(x) {#x, offsetof(dimm_params_t, x), \
 211         sizeof((dimm_params_t *)0)->x, 1}
 212
 213 static void fsl_ddr_dimm_parameters_edit(fsl_ddr_info_t *pinfo,
 214                                    unsigned int ctrl_num,
 215                                    unsigned int dimm_num,
 216                                    const char *optname_str,
 217                                    const char *value_str)
 218 {
 219         dimm_params_t *p = &(pinfo->dimm_params[ctrl_num][dimm_num]);
 220
 221         static const struct options_string options[] = {
 222                 DIMM_PARM(n_ranks),
 223                 DIMM_PARM(data_width),
 224                 DIMM_PARM(primary_sdram_width),
 225                 DIMM_PARM(ec_sdram_width),
 226                 DIMM_PARM(registered_dimm),
 227                 DIMM_PARM(mirrored_dimm),
 228                 DIMM_PARM(device_width),
 229
 230                 DIMM_PARM(n_row_addr),
 231                 DIMM_PARM(n_col_addr),
 232                 DIMM_PARM(edc_config),
 233 #ifdef CONFIG_SYS_FSL_DDR4
 234                 DIMM_PARM(bank_addr_bits),
 235                 DIMM_PARM(bank_group_bits),
 236 #else
 237                 DIMM_PARM(n_banks_per_sdram_device),
 238 #endif
 239                 DIMM_PARM(burst_lengths_bitmask),
 240                 DIMM_PARM(row_density),
 241
 242                 DIMM_PARM(tckmin_x_ps),
 243                 DIMM_PARM(tckmin_x_minus_1_ps),
 244                 DIMM_PARM(tckmin_x_minus_2_ps),
 245                 DIMM_PARM(tckmax_ps),
 246
 247                 DIMM_PARM(caslat_x),
 248                 DIMM_PARM(caslat_x_minus_1),
 249                 DIMM_PARM(caslat_x_minus_2),
 250
 251                 DIMM_PARM(caslat_lowest_derated),
 252
 253                 DIMM_PARM(trcd_ps),
 254                 DIMM_PARM(trp_ps),
 255                 DIMM_PARM(tras_ps),
 256 #ifdef CONFIG_SYS_FSL_DDR4
 257                 DIMM_PARM(trfc1_ps),
 258                 DIMM_PARM(trfc2_ps),
 259                 DIMM_PARM(trfc4_ps),
 260                 DIMM_PARM(trrds_ps),
 261                 DIMM_PARM(trrdl_ps),
 262                 DIMM_PARM(tccdl_ps),
 263 #else
 264                 DIMM_PARM(twr_ps),
 265                 DIMM_PARM(twtr_ps),
 266                 DIMM_PARM(trfc_ps),
 267                 DIMM_PARM(trrd_ps),
 268                 DIMM_PARM(trtp_ps),
 269 #endif
 270                 DIMM_PARM(trc_ps),
 271                 DIMM_PARM(refresh_rate_ps),
 272                 DIMM_PARM(extended_op_srt),
 273
 274 #if defined(CONFIG_SYS_FSL_DDR1) || defined(CONFIG_SYS_FSL_DDR2)
 275                 DIMM_PARM(tis_ps),
 276                 DIMM_PARM(tih_ps),
 277                 DIMM_PARM(tds_ps),
 278                 DIMM_PARM(tdh_ps),
 279                 DIMM_PARM(tdqsq_max_ps),
 280                 DIMM_PARM(tqhs_ps),
 281 #endif
 282 #ifdef CONFIG_SYS_FSL_DDR4
 283                 DIMM_PARM_HEX(dq_mapping[0]),
 284                 DIMM_PARM_HEX(dq_mapping[1]),
 285                 DIMM_PARM_HEX(dq_mapping[2]),
 286                 DIMM_PARM_HEX(dq_mapping[3]),
 287                 DIMM_PARM_HEX(dq_mapping[4]),
 288                 DIMM_PARM_HEX(dq_mapping[5]),
 289                 DIMM_PARM_HEX(dq_mapping[6]),
 290                 DIMM_PARM_HEX(dq_mapping[7]),
 291                 DIMM_PARM_HEX(dq_mapping[8]),
 292                 DIMM_PARM_HEX(dq_mapping[9]),
 293                 DIMM_PARM_HEX(dq_mapping[10]),
 294                 DIMM_PARM_HEX(dq_mapping[11]),
 295                 DIMM_PARM_HEX(dq_mapping[12]),
 296                 DIMM_PARM_HEX(dq_mapping[13]),
 297                 DIMM_PARM_HEX(dq_mapping[14]),
 298                 DIMM_PARM_HEX(dq_mapping[15]),
 299                 DIMM_PARM_HEX(dq_mapping[16]),
 300                 DIMM_PARM_HEX(dq_mapping[17]),
 301                 DIMM_PARM(dq_mapping_ors),
 302 #endif
 303                 DIMM_PARM(rank_density),
 304                 DIMM_PARM(capacity),
 305                 DIMM_PARM(base_address),
 306         };
 307
 308         static const unsigned int n_opts = ARRAY_SIZE(options);
 309
 310         if (handle_option_table(options, n_opts, p, optname_str, value_str))
 311                 return;
 312
 313         printf("couldn't find option string %s\n", optname_str);
 314 }
 315
 316 static void print_dimm_parameters(const dimm_params_t *pdimm)
 317 {
 318         static const struct options_string options[] = {
 319                 DIMM_PARM(n_ranks),
 320                 DIMM_PARM(data_width),
 321                 DIMM_PARM(primary_sdram_width),
 322                 DIMM_PARM(ec_sdram_width),
 323                 DIMM_PARM(registered_dimm),
 324                 DIMM_PARM(mirrored_dimm),
 325                 DIMM_PARM(device_width),
 326
 327                 DIMM_PARM(n_row_addr),
 328                 DIMM_PARM(n_col_addr),
 329                 DIMM_PARM(edc_config),
 330 #ifdef CONFIG_SYS_FSL_DDR4
 331                 DIMM_PARM(bank_addr_bits),
 332                 DIMM_PARM(bank_group_bits),
 333 #else
 334                 DIMM_PARM(n_banks_per_sdram_device),
 335 #endif
 336
 337                 DIMM_PARM(tckmin_x_ps),
 338                 DIMM_PARM(tckmin_x_minus_1_ps),
 339                 DIMM_PARM(tckmin_x_minus_2_ps),
 340                 DIMM_PARM(tckmax_ps),
 341
 342                 DIMM_PARM(caslat_x),
 343                 DIMM_PARM_HEX(caslat_x),
 344                 DIMM_PARM(taa_ps),
 345                 DIMM_PARM(caslat_x_minus_1),
 346                 DIMM_PARM(caslat_x_minus_2),
 347                 DIMM_PARM(caslat_lowest_derated),
 348
 349                 DIMM_PARM(trcd_ps),
 350                 DIMM_PARM(trp_ps),
 351                 DIMM_PARM(tras_ps),
 352 #if defined(CONFIG_SYS_FSL_DDR4) || defined(CONFIG_SYS_FSL_DDR3)
 353                 DIMM_PARM(tfaw_ps),
 354 #endif
 355 #ifdef CONFIG_SYS_FSL_DDR4
 356                 DIMM_PARM(trfc1_ps),
 357                 DIMM_PARM(trfc2_ps),
 358                 DIMM_PARM(trfc4_ps),
 359                 DIMM_PARM(trrds_ps),
 360                 DIMM_PARM(trrdl_ps),
 361                 DIMM_PARM(tccdl_ps),
 362 #else
 363                 DIMM_PARM(twr_ps),
 364                 DIMM_PARM(twtr_ps),
 365                 DIMM_PARM(trfc_ps),
 366                 DIMM_PARM(trrd_ps),
 367                 DIMM_PARM(trtp_ps),
 368 #endif
 369                 DIMM_PARM(trc_ps),
 370                 DIMM_PARM(refresh_rate_ps),
 371
 372 #if defined(CONFIG_SYS_FSL_DDR1) || defined(CONFIG_SYS_FSL_DDR2)
 373                 DIMM_PARM(tis_ps),
 374                 DIMM_PARM(tih_ps),
 375                 DIMM_PARM(tds_ps),
 376                 DIMM_PARM(tdh_ps),
 377                 DIMM_PARM(tdqsq_max_ps),
 378                 DIMM_PARM(tqhs_ps),
 379 #endif
 380 #ifdef CONFIG_SYS_FSL_DDR4
 381                 DIMM_PARM_HEX(dq_mapping[0]),
 382                 DIMM_PARM_HEX(dq_mapping[1]),
 383                 DIMM_PARM_HEX(dq_mapping[2]),
 384                 DIMM_PARM_HEX(dq_mapping[3]),
 385                 DIMM_PARM_HEX(dq_mapping[4]),
 386                 DIMM_PARM_HEX(dq_mapping[5]),
 387                 DIMM_PARM_HEX(dq_mapping[6]),
 388                 DIMM_PARM_HEX(dq_mapping[7]),
 389                 DIMM_PARM_HEX(dq_mapping[8]),
 390                 DIMM_PARM_HEX(dq_mapping[9]),
 391                 DIMM_PARM_HEX(dq_mapping[10]),
 392                 DIMM_PARM_HEX(dq_mapping[11]),
 393                 DIMM_PARM_HEX(dq_mapping[12]),
 394                 DIMM_PARM_HEX(dq_mapping[13]),
 395                 DIMM_PARM_HEX(dq_mapping[14]),
 396                 DIMM_PARM_HEX(dq_mapping[15]),
 397                 DIMM_PARM_HEX(dq_mapping[16]),
 398                 DIMM_PARM_HEX(dq_mapping[17]),
 399                 DIMM_PARM(dq_mapping_ors),
 400 #endif
 401         };
 402         static const unsigned int n_opts = ARRAY_SIZE(options);
 403
 404         if (pdimm->n_ranks == 0) {
 405                 printf("DIMM not present\n");
 406                 return;
 407         }
 408         printf("DIMM organization parameters:\n");
 409         printf("module part name = %s\n", pdimm->mpart);
 410         printf("rank_density = %llu bytes (%llu megabytes)\n",
 411                pdimm->rank_density, pdimm->rank_density / 0x100000);
 412         printf("capacity = %llu bytes (%llu megabytes)\n",
 413                pdimm->capacity, pdimm->capacity / 0x100000);
 414         printf("burst_lengths_bitmask = %02X\n",
 415                pdimm->burst_lengths_bitmask);
 416         printf("base_addresss = %llu (%08llX %08llX)\n",
 417                pdimm->base_address,
 418                (pdimm->base_address >> 32),
 419                pdimm->base_address & 0xFFFFFFFF);
 420         print_option_table(options, n_opts, pdimm);
 421 }
 422
 423 static void print_lowest_common_dimm_parameters(
 424                 const common_timing_params_t *plcd_dimm_params)
 425 {
 426         static const struct options_string options[] = {
 427 #if defined(CONFIG_SYS_FSL_DDR3) || defined(CONFIG_SYS_FSL_DDR4)
 428                 COMMON_TIMING(taamin_ps),
 429 #endif
 430                 COMMON_TIMING(trcd_ps),
 431                 COMMON_TIMING(trp_ps),
 432                 COMMON_TIMING(tras_ps),
 433 #ifdef CONFIG_SYS_FSL_DDR4
 434                 COMMON_TIMING(trfc1_ps),
 435                 COMMON_TIMING(trfc2_ps),
 436                 COMMON_TIMING(trfc4_ps),
 437                 COMMON_TIMING(trrds_ps),
 438                 COMMON_TIMING(trrdl_ps),
 439                 COMMON_TIMING(tccdl_ps),
 440 #else
 441                 COMMON_TIMING(twtr_ps),
 442                 COMMON_TIMING(trfc_ps),
 443                 COMMON_TIMING(trrd_ps),
 444                 COMMON_TIMING(trtp_ps),
 445 #endif
 446                 COMMON_TIMING(twr_ps),
 447                 COMMON_TIMING(trc_ps),
 448                 COMMON_TIMING(refresh_rate_ps),
 449                 COMMON_TIMING(extended_op_srt),
 450 #if defined(CONFIG_SYS_FSL_DDR1) || defined(CONFIG_SYS_FSL_DDR2)
 451                 COMMON_TIMING(tis_ps),
 452                 COMMON_TIMING(tih_ps),
 453                 COMMON_TIMING(tds_ps),
 454                 COMMON_TIMING(tdh_ps),
 455                 COMMON_TIMING(tdqsq_max_ps),
 456                 COMMON_TIMING(tqhs_ps),
 457 #endif
 458                 COMMON_TIMING(lowest_common_spd_caslat),
 459                 COMMON_TIMING(highest_common_derated_caslat),
 460                 COMMON_TIMING(additive_latency),
 461                 COMMON_TIMING(ndimms_present),
 462                 COMMON_TIMING(all_dimms_registered),
 463                 COMMON_TIMING(all_dimms_unbuffered),
 464                 COMMON_TIMING(all_dimms_ecc_capable),
 465         };
 466         static const unsigned int n_opts = ARRAY_SIZE(options);
 467
 468         /* Clock frequencies */
 469         printf("tckmin_x_ps = %u (%u MHz)\n",
 470                plcd_dimm_params->tckmin_x_ps,
 471                picos_to_mhz(plcd_dimm_params->tckmin_x_ps));
 472         printf("tckmax_ps = %u (%u MHz)\n",
 473                plcd_dimm_params->tckmax_ps,
 474                picos_to_mhz(plcd_dimm_params->tckmax_ps));
 475         printf("all_dimms_burst_lengths_bitmask = %02X\n",
 476                plcd_dimm_params->all_dimms_burst_lengths_bitmask);
 477
 478         print_option_table(options, n_opts, plcd_dimm_params);
 479
 480         printf("total_mem = %llu (%llu megabytes)\n",
 481                plcd_dimm_params->total_mem,
 482                plcd_dimm_params->total_mem / 0x100000);
 483         printf("base_address = %llu (%llu megabytes)\n",
 484                plcd_dimm_params->base_address,
 485                plcd_dimm_params->base_address / 0x100000);
 486 }
 487
 488 #define CTRL_OPTIONS(x) {#x, offsetof(memctl_options_t, x), \
 489         sizeof((memctl_options_t *)0)->x, 0}
 490 #define CTRL_OPTIONS_CS(x, y) {"cs" #x "_" #y, \
 491         offsetof(memctl_options_t, cs_local_opts[x].y), \
 492         sizeof((memctl_options_t *)0)->cs_local_opts[x].y, 0}
 493
 494 static void fsl_ddr_options_edit(fsl_ddr_info_t *pinfo,
 495                            unsigned int ctl_num,
 496                            const char *optname_str,
 497                            const char *value_str)
 498 {
 499         memctl_options_t *p = &(pinfo->memctl_opts[ctl_num]);
 500         /*
 501          * This array all on the stack and *computed* each time this
 502          * function is rung.
 503          */
 504         static const struct options_string options[] = {
 505                 CTRL_OPTIONS_CS(0, odt_rd_cfg),
 506                 CTRL_OPTIONS_CS(0, odt_wr_cfg),
 507 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 1)
 508                 CTRL_OPTIONS_CS(1, odt_rd_cfg),
 509                 CTRL_OPTIONS_CS(1, odt_wr_cfg),
 510 #endif
 511 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 2)
 512                 CTRL_OPTIONS_CS(2, odt_rd_cfg),
 513                 CTRL_OPTIONS_CS(2, odt_wr_cfg),
 514 #endif
 515 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 2)
 516                 CTRL_OPTIONS_CS(3, odt_rd_cfg),
 517                 CTRL_OPTIONS_CS(3, odt_wr_cfg),
 518 #endif
 519 #if defined(CONFIG_SYS_FSL_DDR3) || defined(CONFIG_SYS_FSL_DDR4)
 520                 CTRL_OPTIONS_CS(0, odt_rtt_norm),
 521                 CTRL_OPTIONS_CS(0, odt_rtt_wr),
 522 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 1)
 523                 CTRL_OPTIONS_CS(1, odt_rtt_norm),
 524                 CTRL_OPTIONS_CS(1, odt_rtt_wr),
 525 #endif
 526 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 2)
 527                 CTRL_OPTIONS_CS(2, odt_rtt_norm),
 528                 CTRL_OPTIONS_CS(2, odt_rtt_wr),
 529 #endif
 530 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 2)
 531                 CTRL_OPTIONS_CS(3, odt_rtt_norm),
 532                 CTRL_OPTIONS_CS(3, odt_rtt_wr),
 533 #endif
 534 #endif
 535                 CTRL_OPTIONS(memctl_interleaving),
 536                 CTRL_OPTIONS(memctl_interleaving_mode),
 537                 CTRL_OPTIONS(ba_intlv_ctl),
 538                 CTRL_OPTIONS(ecc_mode),
 539                 CTRL_OPTIONS(ecc_init_using_memctl),
 540                 CTRL_OPTIONS(dqs_config),
 541                 CTRL_OPTIONS(self_refresh_in_sleep),
 542                 CTRL_OPTIONS(dynamic_power),
 543                 CTRL_OPTIONS(data_bus_width),
 544                 CTRL_OPTIONS(burst_length),
 545                 CTRL_OPTIONS(cas_latency_override),
 546                 CTRL_OPTIONS(cas_latency_override_value),
 547                 CTRL_OPTIONS(use_derated_caslat),
 548                 CTRL_OPTIONS(additive_latency_override),
 549                 CTRL_OPTIONS(additive_latency_override_value),
 550                 CTRL_OPTIONS(clk_adjust),
 551                 CTRL_OPTIONS(cpo_override),
 552                 CTRL_OPTIONS(write_data_delay),
 553                 CTRL_OPTIONS(half_strength_driver_enable),
 554
 555                 /*
 556                  * These can probably be changed to 2T_EN and 3T_EN
 557                  * (using a leading numerical character) without problem
 558                  */
 559                 CTRL_OPTIONS(twot_en),
 560                 CTRL_OPTIONS(threet_en),
 561                 CTRL_OPTIONS(mirrored_dimm),
 562                 CTRL_OPTIONS(ap_en),
 563                 CTRL_OPTIONS(x4_en),
 564                 CTRL_OPTIONS(bstopre),
 565                 CTRL_OPTIONS(wrlvl_override),
 566                 CTRL_OPTIONS(wrlvl_sample),
 567                 CTRL_OPTIONS(wrlvl_start),
 568                 CTRL_OPTIONS(cswl_override),
 569                 CTRL_OPTIONS(rcw_override),
 570                 CTRL_OPTIONS(rcw_1),
 571                 CTRL_OPTIONS(rcw_2),
 572                 CTRL_OPTIONS(rcw_3),
 573                 CTRL_OPTIONS(ddr_cdr1),
 574                 CTRL_OPTIONS(ddr_cdr2),
 575                 CTRL_OPTIONS(tfaw_window_four_activates_ps),
 576                 CTRL_OPTIONS(trwt_override),
 577                 CTRL_OPTIONS(trwt),
 578                 CTRL_OPTIONS(rtt_override),
 579                 CTRL_OPTIONS(rtt_override_value),
 580                 CTRL_OPTIONS(rtt_wr_override_value),
 581         };
 582
 583         static const unsigned int n_opts = ARRAY_SIZE(options);
 584
 585         if (handle_option_table(options, n_opts, p,
 586                                         optname_str, value_str))
 587                 return;
 588
 589         printf("couldn't find option string %s\n", optname_str);
 590 }
 591
 592 #define CFG_REGS(x) {#x, offsetof(fsl_ddr_cfg_regs_t, x), \
 593         sizeof((fsl_ddr_cfg_regs_t *)0)->x, 1}
 594 #define CFG_REGS_CS(x, y) {"cs" #x "_" #y, \
 595         offsetof(fsl_ddr_cfg_regs_t, cs[x].y), \
 596         sizeof((fsl_ddr_cfg_regs_t *)0)->cs[x].y, 1}
 597
 598 static void print_fsl_memctl_config_regs(const fsl_ddr_cfg_regs_t *ddr)
 599 {
 600         unsigned int i;
 601         static const struct options_string options[] = {
 602                 CFG_REGS_CS(0, bnds),
 603                 CFG_REGS_CS(0, config),
 604                 CFG_REGS_CS(0, config_2),
 605 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 1)
 606                 CFG_REGS_CS(1, bnds),
 607                 CFG_REGS_CS(1, config),
 608                 CFG_REGS_CS(1, config_2),
 609 #endif
 610 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 2)
 611                 CFG_REGS_CS(2, bnds),
 612                 CFG_REGS_CS(2, config),
 613                 CFG_REGS_CS(2, config_2),
 614 #endif
 615 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 2)
 616                 CFG_REGS_CS(3, bnds),
 617                 CFG_REGS_CS(3, config),
 618                 CFG_REGS_CS(3, config_2),
 619 #endif
 620                 CFG_REGS(timing_cfg_3),
 621                 CFG_REGS(timing_cfg_0),
 622                 CFG_REGS(timing_cfg_1),
 623                 CFG_REGS(timing_cfg_2),
 624                 CFG_REGS(ddr_sdram_cfg),
 625                 CFG_REGS(ddr_sdram_cfg_2),
 626                 CFG_REGS(ddr_sdram_cfg_3),
 627                 CFG_REGS(ddr_sdram_mode),
 628                 CFG_REGS(ddr_sdram_mode_2),
 629                 CFG_REGS(ddr_sdram_mode_3),
 630                 CFG_REGS(ddr_sdram_mode_4),
 631                 CFG_REGS(ddr_sdram_mode_5),
 632                 CFG_REGS(ddr_sdram_mode_6),
 633                 CFG_REGS(ddr_sdram_mode_7),
 634                 CFG_REGS(ddr_sdram_mode_8),
 635 #ifdef CONFIG_SYS_FSL_DDR4
 636                 CFG_REGS(ddr_sdram_mode_9),
 637                 CFG_REGS(ddr_sdram_mode_10),
 638                 CFG_REGS(ddr_sdram_mode_11),
 639                 CFG_REGS(ddr_sdram_mode_12),
 640                 CFG_REGS(ddr_sdram_mode_13),
 641                 CFG_REGS(ddr_sdram_mode_14),
 642                 CFG_REGS(ddr_sdram_mode_15),
 643                 CFG_REGS(ddr_sdram_mode_16),
 644 #endif
 645                 CFG_REGS(ddr_sdram_interval),
 646                 CFG_REGS(ddr_data_init),
 647                 CFG_REGS(ddr_sdram_clk_cntl),
 648                 CFG_REGS(ddr_init_addr),
 649                 CFG_REGS(ddr_init_ext_addr),
 650                 CFG_REGS(timing_cfg_4),
 651                 CFG_REGS(timing_cfg_5),
 652 #ifdef CONFIG_SYS_FSL_DDR4
 653                 CFG_REGS(timing_cfg_6),
 654                 CFG_REGS(timing_cfg_7),
 655                 CFG_REGS(timing_cfg_8),
 656                 CFG_REGS(timing_cfg_9),
 657 #endif
 658                 CFG_REGS(ddr_zq_cntl),
 659                 CFG_REGS(ddr_wrlvl_cntl),
 660                 CFG_REGS(ddr_wrlvl_cntl_2),
 661                 CFG_REGS(ddr_wrlvl_cntl_3),
 662                 CFG_REGS(ddr_sr_cntr),
 663                 CFG_REGS(ddr_sdram_rcw_1),
 664                 CFG_REGS(ddr_sdram_rcw_2),
 665                 CFG_REGS(ddr_sdram_rcw_3),
 666                 CFG_REGS(ddr_cdr1),
 667                 CFG_REGS(ddr_cdr2),
 668                 CFG_REGS(dq_map_0),
 669                 CFG_REGS(dq_map_1),
 670                 CFG_REGS(dq_map_2),
 671                 CFG_REGS(dq_map_3),
 672                 CFG_REGS(err_disable),
 673                 CFG_REGS(err_int_en),
 674                 CFG_REGS(ddr_eor),
 675         };
 676         static const unsigned int n_opts = ARRAY_SIZE(options);
 677
 678         print_option_table(options, n_opts, ddr);
 679
 680         for (i = 0; i < 64; i++)
 681                 printf("debug_%02d = 0x%08X\n", i+1, ddr->debug[i]);
 682 }
 683
 684 static void fsl_ddr_regs_edit(fsl_ddr_info_t *pinfo,
 685                         unsigned int ctrl_num,
 686                         const char *regname,
 687                         const char *value_str)
 688 {
 689         unsigned int i;
 690         fsl_ddr_cfg_regs_t *ddr;
 691         char buf[20];
 692         static const struct options_string options[] = {
 693                 CFG_REGS_CS(0, bnds),
 694                 CFG_REGS_CS(0, config),
 695                 CFG_REGS_CS(0, config_2),
 696 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 1)
 697                 CFG_REGS_CS(1, bnds),
 698                 CFG_REGS_CS(1, config),
 699                 CFG_REGS_CS(1, config_2),
 700 #endif
 701 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 2)
 702                 CFG_REGS_CS(2, bnds),
 703                 CFG_REGS_CS(2, config),
 704                 CFG_REGS_CS(2, config_2),
 705 #endif
 706 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 3)
 707                 CFG_REGS_CS(3, bnds),
 708                 CFG_REGS_CS(3, config),
 709                 CFG_REGS_CS(3, config_2),
 710 #endif
 711                 CFG_REGS(timing_cfg_3),
 712                 CFG_REGS(timing_cfg_0),
 713                 CFG_REGS(timing_cfg_1),
 714                 CFG_REGS(timing_cfg_2),
 715                 CFG_REGS(ddr_sdram_cfg),
 716                 CFG_REGS(ddr_sdram_cfg_2),
 717                 CFG_REGS(ddr_sdram_cfg_3),
 718                 CFG_REGS(ddr_sdram_mode),
 719                 CFG_REGS(ddr_sdram_mode_2),
 720                 CFG_REGS(ddr_sdram_mode_3),
 721                 CFG_REGS(ddr_sdram_mode_4),
 722                 CFG_REGS(ddr_sdram_mode_5),
 723                 CFG_REGS(ddr_sdram_mode_6),
 724                 CFG_REGS(ddr_sdram_mode_7),
 725                 CFG_REGS(ddr_sdram_mode_8),
 726 #ifdef CONFIG_SYS_FSL_DDR4
 727                 CFG_REGS(ddr_sdram_mode_9),
 728                 CFG_REGS(ddr_sdram_mode_10),
 729                 CFG_REGS(ddr_sdram_mode_11),
 730                 CFG_REGS(ddr_sdram_mode_12),
 731                 CFG_REGS(ddr_sdram_mode_13),
 732                 CFG_REGS(ddr_sdram_mode_14),
 733                 CFG_REGS(ddr_sdram_mode_15),
 734                 CFG_REGS(ddr_sdram_mode_16),
 735 #endif
 736                 CFG_REGS(ddr_sdram_interval),
 737                 CFG_REGS(ddr_data_init),
 738                 CFG_REGS(ddr_sdram_clk_cntl),
 739                 CFG_REGS(ddr_init_addr),
 740                 CFG_REGS(ddr_init_ext_addr),
 741                 CFG_REGS(timing_cfg_4),
 742                 CFG_REGS(timing_cfg_5),
 743 #ifdef CONFIG_SYS_FSL_DDR4
 744                 CFG_REGS(timing_cfg_6),
 745                 CFG_REGS(timing_cfg_7),
 746                 CFG_REGS(timing_cfg_8),
 747                 CFG_REGS(timing_cfg_9),
 748 #endif
 749                 CFG_REGS(ddr_zq_cntl),
 750                 CFG_REGS(ddr_wrlvl_cntl),
 751                 CFG_REGS(ddr_wrlvl_cntl_2),
 752                 CFG_REGS(ddr_wrlvl_cntl_3),
 753                 CFG_REGS(ddr_sr_cntr),
 754                 CFG_REGS(ddr_sdram_rcw_1),
 755                 CFG_REGS(ddr_sdram_rcw_2),
 756                 CFG_REGS(ddr_sdram_rcw_3),
 757                 CFG_REGS(ddr_cdr1),
 758                 CFG_REGS(ddr_cdr2),
 759                 CFG_REGS(dq_map_0),
 760                 CFG_REGS(dq_map_1),
 761                 CFG_REGS(dq_map_2),
 762                 CFG_REGS(dq_map_3),
 763                 CFG_REGS(err_disable),
 764                 CFG_REGS(err_int_en),
 765                 CFG_REGS(ddr_sdram_rcw_2),
 766                 CFG_REGS(ddr_sdram_rcw_2),
 767                 CFG_REGS(ddr_eor),
 768         };
 769         static const unsigned int n_opts = ARRAY_SIZE(options);
 770
 771         debug("fsl_ddr_regs_edit: ctrl_num = %u, "
 772                 "regname = %s, value = %s\n",
 773                 ctrl_num, regname, value_str);
 774         if (ctrl_num > CONFIG_SYS_NUM_DDR_CTLRS)
 775                 return;
 776
 777         ddr = &(pinfo->fsl_ddr_config_reg[ctrl_num]);
 778
 779         if (handle_option_table(options, n_opts, ddr, regname, value_str))
 780                 return;
 781
 782         for (i = 0; i < 64; i++) {
 783                 unsigned int value = simple_strtoul(value_str, NULL, 0);
 784                 sprintf(buf, "debug_%u", i + 1);
 785                 if (strcmp(buf, regname) == 0) {
 786                         ddr->debug[i] = value;
 787                         return;
 788                 }
 789         }
 790         printf("Error: couldn't find register string %s\n", regname);
 791 }
 792
 793 #define CTRL_OPTIONS_HEX(x) {#x, offsetof(memctl_options_t, x), \
 794         sizeof((memctl_options_t *)0)->x, 1}
 795
 796 static void print_memctl_options(const memctl_options_t *popts)
 797 {
 798         static const struct options_string options[] = {
 799                 CTRL_OPTIONS_CS(0, odt_rd_cfg),
 800                 CTRL_OPTIONS_CS(0, odt_wr_cfg),
 801 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 1)
 802                 CTRL_OPTIONS_CS(1, odt_rd_cfg),
 803                 CTRL_OPTIONS_CS(1, odt_wr_cfg),
 804 #endif
 805 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 2)
 806                 CTRL_OPTIONS_CS(2, odt_rd_cfg),
 807                 CTRL_OPTIONS_CS(2, odt_wr_cfg),
 808 #endif
 809 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 3)
 810                 CTRL_OPTIONS_CS(3, odt_rd_cfg),
 811                 CTRL_OPTIONS_CS(3, odt_wr_cfg),
 812 #endif
 813 #if defined(CONFIG_SYS_FSL_DDR3) || defined(CONFIG_SYS_FSL_DDR4)
 814                 CTRL_OPTIONS_CS(0, odt_rtt_norm),
 815                 CTRL_OPTIONS_CS(0, odt_rtt_wr),
 816 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 1)
 817                 CTRL_OPTIONS_CS(1, odt_rtt_norm),
 818                 CTRL_OPTIONS_CS(1, odt_rtt_wr),
 819 #endif
 820 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 2)
 821                 CTRL_OPTIONS_CS(2, odt_rtt_norm),
 822                 CTRL_OPTIONS_CS(2, odt_rtt_wr),
 823 #endif
 824 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 3)
 825                 CTRL_OPTIONS_CS(3, odt_rtt_norm),
 826                 CTRL_OPTIONS_CS(3, odt_rtt_wr),
 827 #endif
 828 #endif
 829                 CTRL_OPTIONS(memctl_interleaving),
 830                 CTRL_OPTIONS(memctl_interleaving_mode),
 831                 CTRL_OPTIONS_HEX(ba_intlv_ctl),
 832                 CTRL_OPTIONS(ecc_mode),
 833                 CTRL_OPTIONS(ecc_init_using_memctl),
 834                 CTRL_OPTIONS(dqs_config),
 835                 CTRL_OPTIONS(self_refresh_in_sleep),
 836                 CTRL_OPTIONS(dynamic_power),
 837                 CTRL_OPTIONS(data_bus_width),
 838                 CTRL_OPTIONS(burst_length),
 839                 CTRL_OPTIONS(cas_latency_override),
 840                 CTRL_OPTIONS(cas_latency_override_value),
 841                 CTRL_OPTIONS(use_derated_caslat),
 842                 CTRL_OPTIONS(additive_latency_override),
 843                 CTRL_OPTIONS(additive_latency_override_value),
 844                 CTRL_OPTIONS(clk_adjust),
 845                 CTRL_OPTIONS(cpo_override),
 846                 CTRL_OPTIONS(write_data_delay),
 847                 CTRL_OPTIONS(half_strength_driver_enable),
 848                 /*
 849                  * These can probably be changed to 2T_EN and 3T_EN
 850                  * (using a leading numerical character) without problem
 851                  */
 852                 CTRL_OPTIONS(twot_en),
 853                 CTRL_OPTIONS(threet_en),
 854                 CTRL_OPTIONS(registered_dimm_en),
 855                 CTRL_OPTIONS(mirrored_dimm),
 856                 CTRL_OPTIONS(ap_en),
 857                 CTRL_OPTIONS(x4_en),
 858                 CTRL_OPTIONS(bstopre),
 859                 CTRL_OPTIONS(wrlvl_override),
 860                 CTRL_OPTIONS(wrlvl_sample),
 861                 CTRL_OPTIONS(wrlvl_start),
 862                 CTRL_OPTIONS_HEX(cswl_override),
 863                 CTRL_OPTIONS(rcw_override),
 864                 CTRL_OPTIONS_HEX(rcw_1),
 865                 CTRL_OPTIONS_HEX(rcw_2),
 866                 CTRL_OPTIONS_HEX(rcw_3),
 867                 CTRL_OPTIONS_HEX(ddr_cdr1),
 868                 CTRL_OPTIONS_HEX(ddr_cdr2),
 869                 CTRL_OPTIONS(tfaw_window_four_activates_ps),
 870                 CTRL_OPTIONS(trwt_override),
 871                 CTRL_OPTIONS(trwt),
 872                 CTRL_OPTIONS(rtt_override),
 873                 CTRL_OPTIONS(rtt_override_value),
 874                 CTRL_OPTIONS(rtt_wr_override_value),
 875         };
 876         static const unsigned int n_opts = ARRAY_SIZE(options);
 877
 878         print_option_table(options, n_opts, popts);
 879 }
 880
 881 #ifdef CONFIG_SYS_FSL_DDR1
 882 void ddr1_spd_dump(const ddr1_spd_eeprom_t *spd)
 883 {
 884         unsigned int i;
 885
 886         printf("%-3d    : %02x %s\n", 0, spd->info_size,
 887                " spd->info_size,   *  0 # bytes written into serial memory *");
 888         printf("%-3d    : %02x %s\n", 1, spd->chip_size,
 889                " spd->chip_size,   *  1 Total # bytes of SPD memory device *");
 890         printf("%-3d    : %02x %s\n", 2, spd->mem_type,
 891                " spd->mem_type,    *  2 Fundamental memory type *");
 892         printf("%-3d    : %02x %s\n", 3, spd->nrow_addr,
 893                " spd->nrow_addr,   *  3 # of Row Addresses on this assembly *");
 894         printf("%-3d    : %02x %s\n", 4, spd->ncol_addr,
 895                " spd->ncol_addr,   *  4 # of Column Addrs on this assembly *");
 896         printf("%-3d    : %02x %s\n", 5, spd->nrows,
 897                " spd->nrows        *  5 # of DIMM Banks *");
 898         printf("%-3d    : %02x %s\n", 6, spd->dataw_lsb,
 899                " spd->dataw_lsb,   *  6 Data Width lsb of this assembly *");
 900         printf("%-3d    : %02x %s\n", 7, spd->dataw_msb,
 901                " spd->dataw_msb,   *  7 Data Width msb of this assembly *");
 902         printf("%-3d    : %02x %s\n", 8, spd->voltage,
 903                " spd->voltage,     *  8 Voltage intf std of this assembly *");
 904         printf("%-3d    : %02x %s\n", 9, spd->clk_cycle,
 905                " spd->clk_cycle,   *  9 SDRAM Cycle time at CL=X *");
 906         printf("%-3d    : %02x %s\n", 10, spd->clk_access,
 907                " spd->clk_access,  * 10 SDRAM Access from Clock at CL=X *");
 908         printf("%-3d    : %02x %s\n", 11, spd->config,
 909                " spd->config,      * 11 DIMM Configuration type *");
 910         printf("%-3d    : %02x %s\n", 12, spd->refresh,
 911                " spd->refresh,     * 12 Refresh Rate/Type *");
 912         printf("%-3d    : %02x %s\n", 13, spd->primw,
 913                " spd->primw,       * 13 Primary SDRAM Width *");
 914         printf("%-3d    : %02x %s\n", 14, spd->ecw,
 915                " spd->ecw,         * 14 Error Checking SDRAM width *");
 916         printf("%-3d    : %02x %s\n", 15, spd->min_delay,
 917                " spd->min_delay,   * 15 Back to Back Random Access *");
 918         printf("%-3d    : %02x %s\n", 16, spd->burstl,
 919                " spd->burstl,      * 16 Burst Lengths Supported *");
 920         printf("%-3d    : %02x %s\n", 17, spd->nbanks,
 921                " spd->nbanks,      * 17 # of Banks on Each SDRAM Device *");
 922         printf("%-3d    : %02x %s\n", 18, spd->cas_lat,
 923                " spd->cas_lat,     * 18 CAS# Latencies Supported *");
 924         printf("%-3d    : %02x %s\n", 19, spd->cs_lat,
 925                " spd->cs_lat,      * 19 Chip Select Latency *");
 926         printf("%-3d    : %02x %s\n", 20, spd->write_lat,
 927                " spd->write_lat,   * 20 Write Latency/Recovery *");
 928         printf("%-3d    : %02x %s\n", 21, spd->mod_attr,
 929                " spd->mod_attr,    * 21 SDRAM Module Attributes *");
 930         printf("%-3d    : %02x %s\n", 22, spd->dev_attr,
 931                " spd->dev_attr,    * 22 SDRAM Device Attributes *");
 932         printf("%-3d    : %02x %s\n", 23, spd->clk_cycle2,
 933                " spd->clk_cycle2,  * 23 Min SDRAM Cycle time at CL=X-1 *");
 934         printf("%-3d    : %02x %s\n", 24, spd->clk_access2,
 935                " spd->clk_access2, * 24 SDRAM Access from Clock at CL=X-1 *");
 936         printf("%-3d    : %02x %s\n", 25, spd->clk_cycle3,
 937                " spd->clk_cycle3,  * 25 Min SDRAM Cycle time at CL=X-2 *");
 938         printf("%-3d    : %02x %s\n", 26, spd->clk_access3,
 939                " spd->clk_access3, * 26 Max Access from Clock at CL=X-2 *");
 940         printf("%-3d    : %02x %s\n", 27, spd->trp,
 941                " spd->trp,         * 27 Min Row Precharge Time (tRP)*");
 942         printf("%-3d    : %02x %s\n", 28, spd->trrd,
 943                " spd->trrd,        * 28 Min Row Active to Row Active (tRRD) *");
 944         printf("%-3d    : %02x %s\n", 29, spd->trcd,
 945                " spd->trcd,        * 29 Min RAS to CAS Delay (tRCD) *");
 946         printf("%-3d    : %02x %s\n", 30, spd->tras,
 947                " spd->tras,        * 30 Minimum RAS Pulse Width (tRAS) *");
 948         printf("%-3d    : %02x %s\n", 31, spd->bank_dens,
 949                " spd->bank_dens,   * 31 Density of each bank on module *");
 950         printf("%-3d    : %02x %s\n", 32, spd->ca_setup,
 951                " spd->ca_setup,    * 32 Cmd + Addr signal input setup time *");
 952         printf("%-3d    : %02x %s\n", 33, spd->ca_hold,
 953                " spd->ca_hold,     * 33 Cmd and Addr signal input hold time *");
 954         printf("%-3d    : %02x %s\n", 34, spd->data_setup,
 955                " spd->data_setup,  * 34 Data signal input setup time *");
 956         printf("%-3d    : %02x %s\n", 35, spd->data_hold,
 957                " spd->data_hold,   * 35 Data signal input hold time *");
 958         printf("%-3d    : %02x %s\n", 36, spd->res_36_40[0],
 959                " spd->res_36_40[0], * 36 Reserved / tWR *");
 960         printf("%-3d    : %02x %s\n", 37, spd->res_36_40[1],
 961                " spd->res_36_40[1], * 37 Reserved / tWTR *");
 962         printf("%-3d    : %02x %s\n", 38, spd->res_36_40[2],
 963                " spd->res_36_40[2], * 38 Reserved / tRTP *");
 964         printf("%-3d    : %02x %s\n", 39, spd->res_36_40[3],
 965                " spd->res_36_40[3], * 39 Reserved / mem_probe *");
 966         printf("%-3d    : %02x %s\n", 40, spd->res_36_40[4],
 967                " spd->res_36_40[4], * 40 Reserved / trc,trfc extensions *");
 968         printf("%-3d    : %02x %s\n", 41, spd->trc,
 969                " spd->trc,         * 41 Min Active to Auto refresh time tRC *");
 970         printf("%-3d    : %02x %s\n", 42, spd->trfc,
 971                " spd->trfc,        * 42 Min Auto to Active period tRFC *");
 972         printf("%-3d    : %02x %s\n", 43, spd->tckmax,
 973                " spd->tckmax,      * 43 Max device cycle time tCKmax *");
 974         printf("%-3d    : %02x %s\n", 44, spd->tdqsq,
 975                " spd->tdqsq,       * 44 Max DQS to DQ skew *");
 976         printf("%-3d    : %02x %s\n", 45, spd->tqhs,
 977                " spd->tqhs,        * 45 Max Read DataHold skew tQHS *");
 978         printf("%-3d    : %02x %s\n", 46, spd->res_46,
 979                " spd->res_46,  * 46 Reserved/ PLL Relock time *");
 980         printf("%-3d    : %02x %s\n", 47, spd->dimm_height,
 981                " spd->dimm_height  * 47 SDRAM DIMM Height *");
 982
 983         printf("%-3d-%3d: ",  48, 61);
 984
 985         for (i = 0; i < 14; i++)
 986                 printf("%02x", spd->res_48_61[i]);
 987
 988         printf(" * 48-61 IDD in SPD and Reserved space *\n");
 989
 990         printf("%-3d    : %02x %s\n", 62, spd->spd_rev,
 991                " spd->spd_rev,     * 62 SPD Data Revision Code *");
 992         printf("%-3d    : %02x %s\n", 63, spd->cksum,
 993                " spd->cksum,       * 63 Checksum for bytes 0-62 *");
 994         printf("%-3d-%3d: ",  64, 71);
 995
 996         for (i = 0; i < 8; i++)
 997                 printf("%02x", spd->mid[i]);
 998
 999         printf("* 64 Mfr's JEDEC ID code per JEP-108E *\n");
1000         printf("%-3d    : %02x %s\n", 72, spd->mloc,
1001                " spd->mloc,        * 72 Manufacturing Location *");
1002
1003         printf("%-3d-%3d: >>",  73, 90);
1004
1005         for (i = 0; i < 18; i++)
1006                 printf("%c", spd->mpart[i]);
1007
1008         printf("<<* 73 Manufacturer's Part Number *\n");
1009
1010         printf("%-3d-%3d: %02x %02x %s\n", 91, 92, spd->rev[0], spd->rev[1],
1011                "* 91 Revision Code *");
1012         printf("%-3d-%3d: %02x %02x %s\n", 93, 94, spd->mdate[0], spd->mdate[1],
1013                "* 93 Manufacturing Date *");
1014         printf("%-3d-%3d: ", 95, 98);
1015
1016         for (i = 0; i < 4; i++)
1017                 printf("%02x", spd->sernum[i]);
1018
1019         printf("* 95 Assembly Serial Number *\n");
1020
1021         printf("%-3d-%3d: ", 99, 127);
1022
1023         for (i = 0; i < 27; i++)
1024                 printf("%02x", spd->mspec[i]);
1025
1026         printf("* 99 Manufacturer Specific Data *\n");
1027 }
1028 #endif
1029
1030 #ifdef CONFIG_SYS_FSL_DDR2
1031 void ddr2_spd_dump(const ddr2_spd_eeprom_t *spd)
1032 {
1033         unsigned int i;
1034
1035         printf("%-3d    : %02x %s\n", 0, spd->info_size,
1036                " spd->info_size,   *  0 # bytes written into serial memory *");
1037         printf("%-3d    : %02x %s\n", 1, spd->chip_size,
1038                " spd->chip_size,   *  1 Total # bytes of SPD memory device *");
1039         printf("%-3d    : %02x %s\n", 2, spd->mem_type,
1040                " spd->mem_type,    *  2 Fundamental memory type *");
1041         printf("%-3d    : %02x %s\n", 3, spd->nrow_addr,
1042                " spd->nrow_addr,   *  3 # of Row Addresses on this assembly *");
1043         printf("%-3d    : %02x %s\n", 4, spd->ncol_addr,
1044                " spd->ncol_addr,   *  4 # of Column Addrs on this assembly *");
1045         printf("%-3d    : %02x %s\n", 5, spd->mod_ranks,
1046                " spd->mod_ranks    *  5 # of Module Rows on this assembly *");
1047         printf("%-3d    : %02x %s\n", 6, spd->dataw,
1048                " spd->dataw,       *  6 Data Width of this assembly *");
1049         printf("%-3d    : %02x %s\n", 7, spd->res_7,
1050                " spd->res_7,       *  7 Reserved *");
1051         printf("%-3d    : %02x %s\n", 8, spd->voltage,
1052                " spd->voltage,     *  8 Voltage intf std of this assembly *");
1053         printf("%-3d    : %02x %s\n", 9, spd->clk_cycle,
1054                " spd->clk_cycle,   *  9 SDRAM Cycle time at CL=X *");
1055         printf("%-3d    : %02x %s\n", 10, spd->clk_access,
1056                " spd->clk_access,  * 10 SDRAM Access from Clock at CL=X *");
1057         printf("%-3d    : %02x %s\n", 11, spd->config,
1058                " spd->config,      * 11 DIMM Configuration type *");
1059         printf("%-3d    : %02x %s\n", 12, spd->refresh,
1060                " spd->refresh,     * 12 Refresh Rate/Type *");
1061         printf("%-3d    : %02x %s\n", 13, spd->primw,
1062                " spd->primw,       * 13 Primary SDRAM Width *");
1063         printf("%-3d    : %02x %s\n", 14, spd->ecw,
1064                " spd->ecw,         * 14 Error Checking SDRAM width *");
1065         printf("%-3d    : %02x %s\n", 15, spd->res_15,
1066                " spd->res_15,      * 15 Reserved *");
1067         printf("%-3d    : %02x %s\n", 16, spd->burstl,
1068                " spd->burstl,      * 16 Burst Lengths Supported *");
1069         printf("%-3d    : %02x %s\n", 17, spd->nbanks,
1070                " spd->nbanks,      * 17 # of Banks on Each SDRAM Device *");
1071         printf("%-3d    : %02x %s\n", 18, spd->cas_lat,
1072                " spd->cas_lat,     * 18 CAS# Latencies Supported *");
1073         printf("%-3d    : %02x %s\n", 19, spd->mech_char,
1074                " spd->mech_char,   * 19 Mechanical Characteristics *");
1075         printf("%-3d    : %02x %s\n", 20, spd->dimm_type,
1076                " spd->dimm_type,   * 20 DIMM type *");
1077         printf("%-3d    : %02x %s\n", 21, spd->mod_attr,
1078                " spd->mod_attr,    * 21 SDRAM Module Attributes *");
1079         printf("%-3d    : %02x %s\n", 22, spd->dev_attr,
1080                " spd->dev_attr,    * 22 SDRAM Device Attributes *");
1081         printf("%-3d    : %02x %s\n", 23, spd->clk_cycle2,
1082                " spd->clk_cycle2,  * 23 Min SDRAM Cycle time at CL=X-1 *");
1083         printf("%-3d    : %02x %s\n", 24, spd->clk_access2,
1084                " spd->clk_access2, * 24 SDRAM Access from Clock at CL=X-1 *");
1085         printf("%-3d    : %02x %s\n", 25, spd->clk_cycle3,
1086                " spd->clk_cycle3,  * 25 Min SDRAM Cycle time at CL=X-2 *");
1087         printf("%-3d    : %02x %s\n", 26, spd->clk_access3,
1088                " spd->clk_access3, * 26 Max Access from Clock at CL=X-2 *");
1089         printf("%-3d    : %02x %s\n", 27, spd->trp,
1090                " spd->trp,         * 27 Min Row Precharge Time (tRP)*");
1091         printf("%-3d    : %02x %s\n", 28, spd->trrd,
1092                " spd->trrd,        * 28 Min Row Active to Row Active (tRRD) *");
1093         printf("%-3d    : %02x %s\n", 29, spd->trcd,
1094                " spd->trcd,        * 29 Min RAS to CAS Delay (tRCD) *");
1095         printf("%-3d    : %02x %s\n", 30, spd->tras,
1096                " spd->tras,        * 30 Minimum RAS Pulse Width (tRAS) *");
1097         printf("%-3d    : %02x %s\n", 31, spd->rank_dens,
1098                " spd->rank_dens,   * 31 Density of each rank on module *");
1099         printf("%-3d    : %02x %s\n", 32, spd->ca_setup,
1100                " spd->ca_setup,    * 32 Cmd + Addr signal input setup time *");
1101         printf("%-3d    : %02x %s\n", 33, spd->ca_hold,
1102                " spd->ca_hold,     * 33 Cmd and Addr signal input hold time *");
1103         printf("%-3d    : %02x %s\n", 34, spd->data_setup,
1104                " spd->data_setup,  * 34 Data signal input setup time *");
1105         printf("%-3d    : %02x %s\n", 35, spd->data_hold,
1106                " spd->data_hold,   * 35 Data signal input hold time *");
1107         printf("%-3d    : %02x %s\n", 36, spd->twr,
1108                " spd->twr,         * 36 Write Recovery time tWR *");
1109         printf("%-3d    : %02x %s\n", 37, spd->twtr,
1110                " spd->twtr,        * 37 Int write to read delay tWTR *");
1111         printf("%-3d    : %02x %s\n", 38, spd->trtp,
1112                " spd->trtp,        * 38 Int read to precharge delay tRTP *");
1113         printf("%-3d    : %02x %s\n", 39, spd->mem_probe,
1114                " spd->mem_probe,   * 39 Mem analysis probe characteristics *");
1115         printf("%-3d    : %02x %s\n", 40, spd->trctrfc_ext,
1116                " spd->trctrfc_ext, * 40 Extensions to trc and trfc *");
1117         printf("%-3d    : %02x %s\n", 41, spd->trc,
1118                " spd->trc,         * 41 Min Active to Auto refresh time tRC *");
1119         printf("%-3d    : %02x %s\n", 42, spd->trfc,
1120                " spd->trfc,        * 42 Min Auto to Active period tRFC *");
1121         printf("%-3d    : %02x %s\n", 43, spd->tckmax,
1122                " spd->tckmax,      * 43 Max device cycle time tCKmax *");
1123         printf("%-3d    : %02x %s\n", 44, spd->tdqsq,
1124                " spd->tdqsq,       * 44 Max DQS to DQ skew *");
1125         printf("%-3d    : %02x %s\n", 45, spd->tqhs,
1126                " spd->tqhs,        * 45 Max Read DataHold skew tQHS *");
1127         printf("%-3d    : %02x %s\n", 46, spd->pll_relock,
1128                " spd->pll_relock,  * 46 PLL Relock time *");
1129         printf("%-3d    : %02x %s\n", 47, spd->t_casemax,
1130                " spd->t_casemax,    * 47 t_casemax *");
1131         printf("%-3d    : %02x %s\n", 48, spd->psi_ta_dram,
1132                " spd->psi_ta_dram,   * 48 Thermal Resistance of DRAM Package "
1133                "from Top (Case) to Ambient (Psi T-A DRAM) *");
1134         printf("%-3d    : %02x %s\n", 49, spd->dt0_mode,
1135                " spd->dt0_mode,    * 49 DRAM Case Temperature Rise from "
1136                "Ambient due to Activate-Precharge/Mode Bits "
1137                "(DT0/Mode Bits) *)");
1138         printf("%-3d    : %02x %s\n", 50, spd->dt2n_dt2q,
1139                " spd->dt2n_dt2q,   * 50 DRAM Case Temperature Rise from "
1140                "Ambient due to Precharge/Quiet Standby "
1141                "(DT2N/DT2Q) *");
1142         printf("%-3d    : %02x %s\n", 51, spd->dt2p,
1143                " spd->dt2p,        * 51 DRAM Case Temperature Rise from "
1144                "Ambient due to Precharge Power-Down (DT2P) *");
1145         printf("%-3d    : %02x %s\n", 52, spd->dt3n,
1146                " spd->dt3n,        * 52 DRAM Case Temperature Rise from "
1147                "Ambient due to Active Standby (DT3N) *");
1148         printf("%-3d    : %02x %s\n", 53, spd->dt3pfast,
1149                " spd->dt3pfast,    * 53 DRAM Case Temperature Rise from "
1150                "Ambient due to Active Power-Down with Fast PDN Exit "
1151                "(DT3Pfast) *");
1152         printf("%-3d    : %02x %s\n", 54, spd->dt3pslow,
1153                " spd->dt3pslow,    * 54 DRAM Case Temperature Rise from "
1154                "Ambient due to Active Power-Down with Slow PDN Exit "
1155                "(DT3Pslow) *");
1156         printf("%-3d    : %02x %s\n", 55, spd->dt4r_dt4r4w,
1157                " spd->dt4r_dt4r4w, * 55 DRAM Case Temperature Rise from "
1158                "Ambient due to Page Open Burst Read/DT4R4W Mode Bit "
1159                "(DT4R/DT4R4W Mode Bit) *");
1160         printf("%-3d    : %02x %s\n", 56, spd->dt5b,
1161                " spd->dt5b,        * 56 DRAM Case Temperature Rise from "
1162                "Ambient due to Burst Refresh (DT5B) *");
1163         printf("%-3d    : %02x %s\n", 57, spd->dt7,
1164                " spd->dt7,         * 57 DRAM Case Temperature Rise from "
1165                "Ambient due to Bank Interleave Reads with "
1166                "Auto-Precharge (DT7) *");
1167         printf("%-3d    : %02x %s\n", 58, spd->psi_ta_pll,
1168                " spd->psi_ta_pll,    * 58 Thermal Resistance of PLL Package form"
1169                " Top (Case) to Ambient (Psi T-A PLL) *");
1170         printf("%-3d    : %02x %s\n", 59, spd->psi_ta_reg,
1171                " spd->psi_ta_reg,    * 59 Thermal Reisitance of Register Package"
1172                " from Top (Case) to Ambient (Psi T-A Register) *");
1173         printf("%-3d    : %02x %s\n", 60, spd->dtpllactive,
1174                " spd->dtpllactive, * 60 PLL Case Temperature Rise from "
1175                "Ambient due to PLL Active (DT PLL Active) *");
1176         printf("%-3d    : %02x %s\n", 61, spd->dtregact,
1177                " spd->dtregact,    "
1178                "* 61 Register Case Temperature Rise from Ambient due to "
1179                "Register Active/Mode Bit (DT Register Active/Mode Bit) *");
1180         printf("%-3d    : %02x %s\n", 62, spd->spd_rev,
1181                " spd->spd_rev,     * 62 SPD Data Revision Code *");
1182         printf("%-3d    : %02x %s\n", 63, spd->cksum,
1183                " spd->cksum,       * 63 Checksum for bytes 0-62 *");
1184
1185         printf("%-3d-%3d: ",  64, 71);
1186
1187         for (i = 0; i < 8; i++)
1188                 printf("%02x", spd->mid[i]);
1189
1190         printf("* 64 Mfr's JEDEC ID code per JEP-108E *\n");
1191
1192         printf("%-3d    : %02x %s\n", 72, spd->mloc,
1193                " spd->mloc,        * 72 Manufacturing Location *");
1194
1195         printf("%-3d-%3d: >>",  73, 90);
1196         for (i = 0; i < 18; i++)
1197                 printf("%c", spd->mpart[i]);
1198
1199
1200         printf("<<* 73 Manufacturer's Part Number *\n");
1201
1202         printf("%-3d-%3d: %02x %02x %s\n", 91, 92, spd->rev[0], spd->rev[1],
1203                "* 91 Revision Code *");
1204         printf("%-3d-%3d: %02x %02x %s\n", 93, 94, spd->mdate[0], spd->mdate[1],
1205                "* 93 Manufacturing Date *");
1206         printf("%-3d-%3d: ", 95, 98);
1207
1208         for (i = 0; i < 4; i++)
1209                 printf("%02x", spd->sernum[i]);
1210
1211         printf("* 95 Assembly Serial Number *\n");
1212
1213         printf("%-3d-%3d: ", 99, 127);
1214         for (i = 0; i < 27; i++)
1215                 printf("%02x", spd->mspec[i]);
1216
1217
1218         printf("* 99 Manufacturer Specific Data *\n");
1219 }
1220 #endif
1221
1222 #ifdef CONFIG_SYS_FSL_DDR3
1223 void ddr3_spd_dump(const ddr3_spd_eeprom_t *spd)
1224 {
1225         unsigned int i;
1226
1227         /* General Section: Bytes 0-59 */
1228
1229 #define PRINT_NXS(x, y, z...) printf("%-3d    : %02x " z "\n", x, (u8)y);
1230 #define PRINT_NNXXS(n0, n1, x0, x1, s) \
1231         printf("%-3d-%3d: %02x %02x " s "\n", n0, n1, x0, x1);
1232
1233         PRINT_NXS(0, spd->info_size_crc,
1234                 "info_size_crc  bytes written into serial memory, "
1235                 "CRC coverage");
1236         PRINT_NXS(1, spd->spd_rev,
1237                 "spd_rev        SPD Revision");
1238         PRINT_NXS(2, spd->mem_type,
1239                 "mem_type       Key Byte / DRAM Device Type");
1240         PRINT_NXS(3, spd->module_type,
1241                 "module_type    Key Byte / Module Type");
1242         PRINT_NXS(4, spd->density_banks,
1243                 "density_banks  SDRAM Density and Banks");
1244         PRINT_NXS(5, spd->addressing,
1245                 "addressing     SDRAM Addressing");
1246         PRINT_NXS(6, spd->module_vdd,
1247                 "module_vdd     Module Nominal Voltage, VDD");
1248         PRINT_NXS(7, spd->organization,
1249                 "organization   Module Organization");
1250         PRINT_NXS(8, spd->bus_width,
1251                 "bus_width      Module Memory Bus Width");
1252         PRINT_NXS(9, spd->ftb_div,
1253                 "ftb_div        Fine Timebase (FTB) Dividend / Divisor");
1254         PRINT_NXS(10, spd->mtb_dividend,
1255                 "mtb_dividend   Medium Timebase (MTB) Dividend");
1256         PRINT_NXS(11, spd->mtb_divisor,
1257                 "mtb_divisor    Medium Timebase (MTB) Divisor");
1258         PRINT_NXS(12, spd->tck_min,
1259                   "tck_min        SDRAM Minimum Cycle Time");
1260         PRINT_NXS(13, spd->res_13,
1261                 "res_13         Reserved");
1262         PRINT_NXS(14, spd->caslat_lsb,
1263                 "caslat_lsb     CAS Latencies Supported, LSB");
1264         PRINT_NXS(15, spd->caslat_msb,
1265                 "caslat_msb     CAS Latencies Supported, MSB");
1266         PRINT_NXS(16, spd->taa_min,
1267                   "taa_min        Min CAS Latency Time");
1268         PRINT_NXS(17, spd->twr_min,
1269                   "twr_min        Min Write REcovery Time");
1270         PRINT_NXS(18, spd->trcd_min,
1271                   "trcd_min       Min RAS# to CAS# Delay Time");
1272         PRINT_NXS(19, spd->trrd_min,
1273                   "trrd_min       Min Row Active to Row Active Delay Time");
1274         PRINT_NXS(20, spd->trp_min,
1275                   "trp_min        Min Row Precharge Delay Time");
1276         PRINT_NXS(21, spd->tras_trc_ext,
1277                   "tras_trc_ext   Upper Nibbles for tRAS and tRC");
1278         PRINT_NXS(22, spd->tras_min_lsb,
1279                   "tras_min_lsb   Min Active to Precharge Delay Time, LSB");
1280         PRINT_NXS(23, spd->trc_min_lsb,
1281                   "trc_min_lsb Min Active to Active/Refresh Delay Time, LSB");
1282         PRINT_NXS(24, spd->trfc_min_lsb,
1283                   "trfc_min_lsb   Min Refresh Recovery Delay Time LSB");
1284         PRINT_NXS(25, spd->trfc_min_msb,
1285                   "trfc_min_msb   Min Refresh Recovery Delay Time MSB");
1286         PRINT_NXS(26, spd->twtr_min,
1287                   "twtr_min Min Internal Write to Read Command Delay Time");
1288         PRINT_NXS(27, spd->trtp_min,
1289                   "trtp_min "
1290                   "Min Internal Read to Precharge Command Delay Time");
1291         PRINT_NXS(28, spd->tfaw_msb,
1292                   "tfaw_msb       Upper Nibble for tFAW");
1293         PRINT_NXS(29, spd->tfaw_min,
1294                   "tfaw_min       Min Four Activate Window Delay Time");
1295         PRINT_NXS(30, spd->opt_features,
1296                 "opt_features   SDRAM Optional Features");
1297         PRINT_NXS(31, spd->therm_ref_opt,
1298                 "therm_ref_opt  SDRAM Thermal and Refresh Opts");
1299         PRINT_NXS(32, spd->therm_sensor,
1300                 "therm_sensor  SDRAM Thermal Sensor");
1301         PRINT_NXS(33, spd->device_type,
1302                 "device_type  SDRAM Device Type");
1303         PRINT_NXS(34, spd->fine_tck_min,
1304                   "fine_tck_min  Fine offset for tCKmin");
1305         PRINT_NXS(35, spd->fine_taa_min,
1306                   "fine_taa_min  Fine offset for tAAmin");
1307         PRINT_NXS(36, spd->fine_trcd_min,
1308                   "fine_trcd_min Fine offset for tRCDmin");
1309         PRINT_NXS(37, spd->fine_trp_min,
1310                   "fine_trp_min  Fine offset for tRPmin");
1311         PRINT_NXS(38, spd->fine_trc_min,
1312                   "fine_trc_min  Fine offset for tRCmin");
1313
1314         printf("%-3d-%3d: ",  39, 59);  /* Reserved, General Section */
1315
1316         for (i = 39; i <= 59; i++)
1317                 printf("%02x ", spd->res_39_59[i - 39]);
1318
1319         puts("\n");
1320
1321         switch (spd->module_type) {
1322         case 0x02:  /* UDIMM */
1323         case 0x03:  /* SO-DIMM */
1324         case 0x04:  /* Micro-DIMM */
1325         case 0x06:  /* Mini-UDIMM */
1326                 PRINT_NXS(60, spd->mod_section.unbuffered.mod_height,
1327                         "mod_height    (Unbuffered) Module Nominal Height");
1328                 PRINT_NXS(61, spd->mod_section.unbuffered.mod_thickness,
1329                         "mod_thickness (Unbuffered) Module Maximum Thickness");
1330                 PRINT_NXS(62, spd->mod_section.unbuffered.ref_raw_card,
1331                         "ref_raw_card  (Unbuffered) Reference Raw Card Used");
1332                 PRINT_NXS(63, spd->mod_section.unbuffered.addr_mapping,
1333                         "addr_mapping  (Unbuffered) Address mapping from "
1334                         "Edge Connector to DRAM");
1335                 break;
1336         case 0x01:  /* RDIMM */
1337         case 0x05:  /* Mini-RDIMM */
1338                 PRINT_NXS(60, spd->mod_section.registered.mod_height,
1339                         "mod_height    (Registered) Module Nominal Height");
1340                 PRINT_NXS(61, spd->mod_section.registered.mod_thickness,
1341                         "mod_thickness (Registered) Module Maximum Thickness");
1342                 PRINT_NXS(62, spd->mod_section.registered.ref_raw_card,
1343                         "ref_raw_card  (Registered) Reference Raw Card Used");
1344                 PRINT_NXS(63, spd->mod_section.registered.modu_attr,
1345                         "modu_attr     (Registered) DIMM Module Attributes");
1346                 PRINT_NXS(64, spd->mod_section.registered.thermal,
1347                         "thermal       (Registered) Thermal Heat "
1348                         "Spreader Solution");
1349                 PRINT_NXS(65, spd->mod_section.registered.reg_id_lo,
1350                         "reg_id_lo     (Registered) Register Manufacturer ID "
1351                         "Code, LSB");
1352                 PRINT_NXS(66, spd->mod_section.registered.reg_id_hi,
1353                         "reg_id_hi     (Registered) Register Manufacturer ID "
1354                         "Code, MSB");
1355                 PRINT_NXS(67, spd->mod_section.registered.reg_rev,
1356                         "reg_rev       (Registered) Register "
1357                         "Revision Number");
1358                 PRINT_NXS(68, spd->mod_section.registered.reg_type,
1359                         "reg_type      (Registered) Register Type");
1360                 for (i = 69; i <= 76; i++) {
1361                         printf("%-3d    : %02x rcw[%d]\n", i,
1362                                 spd->mod_section.registered.rcw[i-69], i-69);
1363                 }
1364                 break;
1365         default:
1366                 /* Module-specific Section, Unsupported Module Type */
1367                 printf("%-3d-%3d: ", 60, 116);
1368
1369                 for (i = 60; i <= 116; i++)
1370                         printf("%02x", spd->mod_section.uc[i - 60]);
1371
1372                 break;
1373         }
1374
1375         /* Unique Module ID: Bytes 117-125 */
1376         PRINT_NXS(117, spd->mmid_lsb, "Module MfgID Code LSB - JEP-106");
1377         PRINT_NXS(118, spd->mmid_msb, "Module MfgID Code MSB - JEP-106");
1378         PRINT_NXS(119, spd->mloc,     "Mfg Location");
1379         PRINT_NNXXS(120, 121, spd->mdate[0], spd->mdate[1], "Mfg Date");
1380
1381         printf("%-3d-%3d: ", 122, 125);
1382
1383         for (i = 122; i <= 125; i++)
1384                 printf("%02x ", spd->sernum[i - 122]);
1385         printf("   Module Serial Number\n");
1386
1387         /* CRC: Bytes 126-127 */
1388         PRINT_NNXXS(126, 127, spd->crc[0], spd->crc[1], "  SPD CRC");
1389
1390         /* Other Manufacturer Fields and User Space: Bytes 128-255 */
1391         printf("%-3d-%3d: ", 128, 145);
1392         for (i = 128; i <= 145; i++)
1393                 printf("%02x ", spd->mpart[i - 128]);
1394         printf("   Mfg's Module Part Number\n");
1395
1396         PRINT_NNXXS(146, 147, spd->mrev[0], spd->mrev[1],
1397                 "Module Revision code");
1398
1399         PRINT_NXS(148, spd->dmid_lsb, "DRAM MfgID Code LSB - JEP-106");
1400         PRINT_NXS(149, spd->dmid_msb, "DRAM MfgID Code MSB - JEP-106");
1401
1402         printf("%-3d-%3d: ", 150, 175);
1403         for (i = 150; i <= 175; i++)
1404                 printf("%02x ", spd->msd[i - 150]);
1405         printf("   Mfg's Specific Data\n");
1406
1407         printf("%-3d-%3d: ", 176, 255);
1408         for (i = 176; i <= 255; i++)
1409                 printf("%02x", spd->cust[i - 176]);
1410         printf("   Mfg's Specific Data\n");
1411
1412 }
1413 #endif
1414
1415 #ifdef CONFIG_SYS_FSL_DDR4
1416 void ddr4_spd_dump(const struct ddr4_spd_eeprom_s *spd)
1417 {
1418         unsigned int i;
1419
1420         /* General Section: Bytes 0-127 */
1421
1422 #define PRINT_NXS(x, y, z...) printf("%-3d    : %02x " z "\n", x, (u8)y);
1423 #define PRINT_NNXXS(n0, n1, x0, x1, s) \
1424         printf("%-3d-%3d: %02x %02x " s "\n", n0, n1, x0, x1);
1425
1426         PRINT_NXS(0, spd->info_size_crc,
1427                   "info_size_crc  bytes written into serial memory, CRC coverage");
1428         PRINT_NXS(1, spd->spd_rev,
1429                   "spd_rev        SPD Revision");
1430         PRINT_NXS(2, spd->mem_type,
1431                   "mem_type       Key Byte / DRAM Device Type");
1432         PRINT_NXS(3, spd->module_type,
1433                   "module_type    Key Byte / Module Type");
1434         PRINT_NXS(4, spd->density_banks,
1435                   "density_banks  SDRAM Density and Banks");
1436         PRINT_NXS(5, spd->addressing,
1437                   "addressing     SDRAM Addressing");
1438         PRINT_NXS(6, spd->package_type,
1439                   "package_type   Package type");
1440         PRINT_NXS(7, spd->opt_feature,
1441                   "opt_feature    Optional features");
1442         PRINT_NXS(8, spd->thermal_ref,
1443                   "thermal_ref    Thermal and Refresh options");
1444         PRINT_NXS(9, spd->oth_opt_features,
1445                   "oth_opt_features Other SDRAM optional features");
1446         PRINT_NXS(10, spd->res_10,
1447                   "res_10         Reserved");
1448         PRINT_NXS(11, spd->module_vdd,
1449                   "module_vdd     Module Nominal Voltage, VDD");
1450         PRINT_NXS(12, spd->organization,
1451                   "organization Module Organization");
1452         PRINT_NXS(13, spd->bus_width,
1453                   "bus_width      Module Memory Bus Width");
1454         PRINT_NXS(14, spd->therm_sensor,
1455                   "therm_sensor   Module Thermal Sensor");
1456         PRINT_NXS(15, spd->ext_type,
1457                   "ext_type       Extended module type");
1458         PRINT_NXS(16, spd->res_16,
1459                   "res_16       Reserved");
1460         PRINT_NXS(17, spd->timebases,
1461                   "timebases    MTb and FTB");
1462         PRINT_NXS(18, spd->tck_min,
1463                   "tck_min      tCKAVGmin");
1464         PRINT_NXS(19, spd->tck_max,
1465                   "tck_max      TCKAVGmax");
1466         PRINT_NXS(20, spd->caslat_b1,
1467                   "caslat_b1    CAS latencies, 1st byte");
1468         PRINT_NXS(21, spd->caslat_b2,
1469                   "caslat_b2    CAS latencies, 2nd byte");
1470         PRINT_NXS(22, spd->caslat_b3,
1471                   "caslat_b3    CAS latencies, 3rd byte ");
1472         PRINT_NXS(23, spd->caslat_b4,
1473                   "caslat_b4    CAS latencies, 4th byte");
1474         PRINT_NXS(24, spd->taa_min,
1475                   "taa_min      Min CAS Latency Time");
1476         PRINT_NXS(25, spd->trcd_min,
1477                   "trcd_min     Min RAS# to CAS# Delay Time");
1478         PRINT_NXS(26, spd->trp_min,
1479                   "trp_min      Min Row Precharge Delay Time");
1480         PRINT_NXS(27, spd->tras_trc_ext,
1481                   "tras_trc_ext Upper Nibbles for tRAS and tRC");
1482         PRINT_NXS(28, spd->tras_min_lsb,
1483                   "tras_min_lsb tRASmin, lsb");
1484         PRINT_NXS(29, spd->trc_min_lsb,
1485                   "trc_min_lsb  tRCmin, lsb");
1486         PRINT_NXS(30, spd->trfc1_min_lsb,
1487                   "trfc1_min_lsb  Min Refresh Recovery Delay Time, LSB");
1488         PRINT_NXS(31, spd->trfc1_min_msb,
1489                   "trfc1_min_msb  Min Refresh Recovery Delay Time, MSB ");
1490         PRINT_NXS(32, spd->trfc2_min_lsb,
1491                   "trfc2_min_lsb  Min Refresh Recovery Delay Time, LSB");
1492         PRINT_NXS(33, spd->trfc2_min_msb,
1493                   "trfc2_min_msb  Min Refresh Recovery Delay Time, MSB");
1494         PRINT_NXS(34, spd->trfc4_min_lsb,
1495                   "trfc4_min_lsb Min Refresh Recovery Delay Time, LSB");
1496         PRINT_NXS(35, spd->trfc4_min_msb,
1497                   "trfc4_min_msb Min Refresh Recovery Delay Time, MSB");
1498         PRINT_NXS(36, spd->tfaw_msb,
1499                   "tfaw_msb      Upper Nibble for tFAW");
1500         PRINT_NXS(37, spd->tfaw_min,
1501                   "tfaw_min      tFAW, lsb");
1502         PRINT_NXS(38, spd->trrds_min,
1503                   "trrds_min     tRRD_Smin, MTB");
1504         PRINT_NXS(39, spd->trrdl_min,
1505                   "trrdl_min     tRRD_Lmin, MTB");
1506         PRINT_NXS(40, spd->tccdl_min,
1507                   "tccdl_min     tCCS_Lmin, MTB");
1508
1509         printf("%-3d-%3d: ", 41, 59);  /* Reserved, General Section */
1510         for (i = 41; i <= 59; i++)
1511                 printf("%02x ", spd->res_41[i - 41]);
1512
1513         puts("\n");
1514         printf("%-3d-%3d: ", 60, 77);
1515         for (i = 60; i <= 77; i++)
1516                 printf("%02x ", spd->mapping[i - 60]);
1517         puts("   mapping[] Connector to SDRAM bit map\n");
1518
1519         PRINT_NXS(117, spd->fine_tccdl_min,
1520                   "fine_tccdl_min Fine offset for tCCD_Lmin");
1521         PRINT_NXS(118, spd->fine_trrdl_min,
1522                   "fine_trrdl_min Fine offset for tRRD_Lmin");
1523         PRINT_NXS(119, spd->fine_trrds_min,
1524                   "fine_trrds_min Fine offset for tRRD_Smin");
1525         PRINT_NXS(120, spd->fine_trc_min,
1526                   "fine_trc_min   Fine offset for tRCmin");
1527         PRINT_NXS(121, spd->fine_trp_min,
1528                   "fine_trp_min   Fine offset for tRPmin");
1529         PRINT_NXS(122, spd->fine_trcd_min,
1530                   "fine_trcd_min  Fine offset for tRCDmin");
1531         PRINT_NXS(123, spd->fine_taa_min,
1532                   "fine_taa_min   Fine offset for tAAmin");
1533         PRINT_NXS(124, spd->fine_tck_max,
1534                   "fine_tck_max   Fine offset for tCKAVGmax");
1535         PRINT_NXS(125, spd->fine_tck_min,
1536                   "fine_tck_min   Fine offset for tCKAVGmin");
1537
1538         /* CRC: Bytes 126-127 */
1539         PRINT_NNXXS(126, 127, spd->crc[0], spd->crc[1], "  SPD CRC");
1540
1541         switch (spd->module_type) {
1542         case 0x02:  /* UDIMM */
1543         case 0x03:  /* SO-DIMM */
1544                 PRINT_NXS(128, spd->mod_section.unbuffered.mod_height,
1545                           "mod_height    (Unbuffered) Module Nominal Height");
1546                 PRINT_NXS(129, spd->mod_section.unbuffered.mod_thickness,
1547                           "mod_thickness (Unbuffered) Module Maximum Thickness");
1548                 PRINT_NXS(130, spd->mod_section.unbuffered.ref_raw_card,
1549                           "ref_raw_card  (Unbuffered) Reference Raw Card Used");
1550                 PRINT_NXS(131, spd->mod_section.unbuffered.addr_mapping,
1551                           "addr_mapping  (Unbuffered) Address mapping from Edge Connector to DRAM");
1552                 PRINT_NNXXS(254, 255, spd->mod_section.unbuffered.crc[0],
1553                             spd->mod_section.unbuffered.crc[1], "  Module CRC");
1554                 break;
1555         case 0x01:  /* RDIMM */
1556                 PRINT_NXS(128, spd->mod_section.registered.mod_height,
1557                           "mod_height    (Registered) Module Nominal Height");
1558                 PRINT_NXS(129, spd->mod_section.registered.mod_thickness,
1559                           "mod_thickness (Registered) Module Maximum Thickness");
1560                 PRINT_NXS(130, spd->mod_section.registered.ref_raw_card,
1561                           "ref_raw_card  (Registered) Reference Raw Card Used");
1562                 PRINT_NXS(131, spd->mod_section.registered.modu_attr,
1563                           "modu_attr     (Registered) DIMM Module Attributes");
1564                 PRINT_NXS(132, spd->mod_section.registered.thermal,
1565                           "thermal       (Registered) Thermal Heat Spreader Solution");
1566                 PRINT_NXS(133, spd->mod_section.registered.reg_id_lo,
1567                           "reg_id_lo     (Registered) Register Manufacturer ID Code, LSB");
1568                 PRINT_NXS(134, spd->mod_section.registered.reg_id_hi,
1569                           "reg_id_hi     (Registered) Register Manufacturer ID Code, MSB");
1570                 PRINT_NXS(135, spd->mod_section.registered.reg_rev,
1571                           "reg_rev       (Registered) Register Revision Number");
1572                 PRINT_NXS(136, spd->mod_section.registered.reg_map,
1573                           "reg_map       (Registered) Address mapping");
1574                 PRINT_NNXXS(254, 255, spd->mod_section.registered.crc[0],
1575                             spd->mod_section.registered.crc[1], "  Module CRC");
1576                 break;
1577         case 0x04:  /* LRDIMM */
1578                 PRINT_NXS(128, spd->mod_section.loadreduced.mod_height,
1579                           "mod_height    (Loadreduced) Module Nominal Height");
1580                 PRINT_NXS(129, spd->mod_section.loadreduced.mod_thickness,
1581                           "mod_thickness (Loadreduced) Module Maximum Thickness");
1582                 PRINT_NXS(130, spd->mod_section.loadreduced.ref_raw_card,
1583                           "ref_raw_card  (Loadreduced) Reference Raw Card Used");
1584                 PRINT_NXS(131, spd->mod_section.loadreduced.modu_attr,
1585                           "modu_attr     (Loadreduced) DIMM Module Attributes");
1586                 PRINT_NXS(132, spd->mod_section.loadreduced.thermal,
1587                           "thermal       (Loadreduced) Thermal Heat Spreader Solution");
1588                 PRINT_NXS(133, spd->mod_section.loadreduced.reg_id_lo,
1589                           "reg_id_lo     (Loadreduced) Register Manufacturer ID Code, LSB");
1590                 PRINT_NXS(134, spd->mod_section.loadreduced.reg_id_hi,
1591                           "reg_id_hi     (Loadreduced) Register Manufacturer ID Code, MSB");
1592                 PRINT_NXS(135, spd->mod_section.loadreduced.reg_rev,
1593                           "reg_rev       (Loadreduced) Register Revision Number");
1594                 PRINT_NXS(136, spd->mod_section.loadreduced.reg_map,
1595                           "reg_map       (Loadreduced) Address mapping");
1596                 PRINT_NXS(137, spd->mod_section.loadreduced.reg_drv,
1597                           "reg_drv       (Loadreduced) Reg output drive strength");
1598                 PRINT_NXS(138, spd->mod_section.loadreduced.reg_drv_ck,
1599                           "reg_drv_ck    (Loadreduced) Reg output drive strength for CK");
1600                 PRINT_NXS(139, spd->mod_section.loadreduced.data_buf_rev,
1601                           "data_buf_rev  (Loadreduced) Data Buffer Revision Numbe");
1602                 PRINT_NXS(140, spd->mod_section.loadreduced.vrefqe_r0,
1603                           "vrefqe_r0     (Loadreduced) DRAM VrefDQ for Package Rank 0");
1604                 PRINT_NXS(141, spd->mod_section.loadreduced.vrefqe_r1,
1605                           "vrefqe_r1     (Loadreduced) DRAM VrefDQ for Package Rank 1");
1606                 PRINT_NXS(142, spd->mod_section.loadreduced.vrefqe_r2,
1607                           "vrefqe_r2     (Loadreduced) DRAM VrefDQ for Package Rank 2");
1608                 PRINT_NXS(143, spd->mod_section.loadreduced.vrefqe_r3,
1609                           "vrefqe_r3     (Loadreduced) DRAM VrefDQ for Package Rank 3");
1610                 PRINT_NXS(144, spd->mod_section.loadreduced.data_intf,
1611                           "data_intf     (Loadreduced) Data Buffer VrefDQ for DRAM Interface");
1612                 PRINT_NXS(145, spd->mod_section.loadreduced.data_drv_1866,
1613                           "data_drv_1866 (Loadreduced) Data Buffer MDQ Drive Strength and RTT");
1614                 PRINT_NXS(146, spd->mod_section.loadreduced.data_drv_2400,
1615                           "data_drv_2400 (Loadreduced) Data Buffer MDQ Drive Strength and RTT");
1616                 PRINT_NXS(147, spd->mod_section.loadreduced.data_drv_3200,
1617                           "data_drv_3200 (Loadreduced) Data Buffer MDQ Drive Strength and RTT");
1618                 PRINT_NXS(148, spd->mod_section.loadreduced.dram_drv,
1619                           "dram_drv      (Loadreduced) DRAM Drive Strength");
1620                 PRINT_NXS(149, spd->mod_section.loadreduced.dram_odt_1866,
1621                           "dram_odt_1866 (Loadreduced) DRAM ODT (RTT_WR, RTT_NOM)");
1622                 PRINT_NXS(150, spd->mod_section.loadreduced.dram_odt_2400,
1623                           "dram_odt_2400 (Loadreduced) DRAM ODT (RTT_WR, RTT_NOM)");
1624                 PRINT_NXS(151, spd->mod_section.loadreduced.dram_odt_3200,
1625                           "dram_odt_3200 (Loadreduced) DRAM ODT (RTT_WR, RTT_NOM)");
1626                 PRINT_NXS(152, spd->mod_section.loadreduced.dram_odt_park_1866,
1627                           "dram_odt_park_1866 (Loadreduced) DRAM ODT (RTT_PARK)");
1628                 PRINT_NXS(153, spd->mod_section.loadreduced.dram_odt_park_2400,
1629                           "dram_odt_park_2400 (Loadreduced) DRAM ODT (RTT_PARK)");
1630                 PRINT_NXS(154, spd->mod_section.loadreduced.dram_odt_park_3200,
1631                           "dram_odt_park_3200 (Loadreduced) DRAM ODT (RTT_PARK)");
1632                 PRINT_NNXXS(254, 255, spd->mod_section.loadreduced.crc[0],
1633                             spd->mod_section.loadreduced.crc[1],
1634                             "  Module CRC");
1635                 break;
1636         default:
1637                 /* Module-specific Section, Unsupported Module Type */
1638                 printf("%-3d-%3d: ", 128, 255);
1639
1640                 for (i = 128; i <= 255; i++)
1641                         printf("%02x", spd->mod_section.uc[i - 128]);
1642
1643                 break;
1644         }
1645
1646         /* Unique Module ID: Bytes 320-383 */
1647         PRINT_NXS(320, spd->mmid_lsb, "Module MfgID Code LSB - JEP-106");
1648         PRINT_NXS(321, spd->mmid_msb, "Module MfgID Code MSB - JEP-106");
1649         PRINT_NXS(322, spd->mloc,     "Mfg Location");
1650         PRINT_NNXXS(323, 324, spd->mdate[0], spd->mdate[1], "Mfg Date");
1651
1652         printf("%-3d-%3d: ", 325, 328);
1653
1654         for (i = 325; i <= 328; i++)
1655                 printf("%02x ", spd->sernum[i - 325]);
1656         printf("   Module Serial Number\n");
1657
1658         printf("%-3d-%3d: ", 329, 348);
1659         for (i = 329; i <= 348; i++)
1660                 printf("%02x ", spd->mpart[i - 329]);
1661         printf("   Mfg's Module Part Number\n");
1662
1663         PRINT_NXS(349, spd->mrev, "Module Revision code");
1664         PRINT_NXS(350, spd->dmid_lsb, "DRAM MfgID Code LSB - JEP-106");
1665         PRINT_NXS(351, spd->dmid_msb, "DRAM MfgID Code MSB - JEP-106");
1666         PRINT_NXS(352, spd->stepping, "DRAM stepping");
1667
1668         printf("%-3d-%3d: ", 353, 381);
1669         for (i = 353; i <= 381; i++)
1670                 printf("%02x ", spd->msd[i - 353]);
1671         printf("   Mfg's Specific Data\n");
1672 }
1673 #endif
1674
1675 static inline void generic_spd_dump(const generic_spd_eeprom_t *spd)
1676 {
1677 #if defined(CONFIG_SYS_FSL_DDR1)
1678         ddr1_spd_dump(spd);
1679 #elif defined(CONFIG_SYS_FSL_DDR2)
1680         ddr2_spd_dump(spd);
1681 #elif defined(CONFIG_SYS_FSL_DDR3)
1682         ddr3_spd_dump(spd);
1683 #elif defined(CONFIG_SYS_FSL_DDR4)
1684         ddr4_spd_dump(spd);
1685 #endif
1686 }
1687
1688 static void fsl_ddr_printinfo(const fsl_ddr_info_t *pinfo,
1689                         unsigned int ctrl_mask,
1690                         unsigned int dimm_mask,
1691                         unsigned int do_mask)
1692 {
1693         unsigned int i, j, retval;
1694
1695         /* STEP 1:  DIMM SPD data */
1696         if (do_mask & STEP_GET_SPD) {
1697                 for (i = 0; i < CONFIG_SYS_NUM_DDR_CTLRS; i++) {
1698                         if (!(ctrl_mask & (1 << i)))
1699                                 continue;
1700
1701                         for (j = 0; j < CONFIG_DIMM_SLOTS_PER_CTLR; j++) {
1702                                 if (!(dimm_mask & (1 << j)))
1703                                         continue;
1704
1705                                 printf("SPD info:  Controller=%u "
1706                                                 "DIMM=%u\n", i, j);
1707                                 generic_spd_dump(
1708                                         &(pinfo->spd_installed_dimms[i][j]));
1709                                 printf("\n");
1710                         }
1711                         printf("\n");
1712                 }
1713                 printf("\n");
1714         }
1715
1716         /* STEP 2:  DIMM Parameters */
1717         if (do_mask & STEP_COMPUTE_DIMM_PARMS) {
1718                 for (i = 0; i < CONFIG_SYS_NUM_DDR_CTLRS; i++) {
1719                         if (!(ctrl_mask & (1 << i)))
1720                                 continue;
1721                         for (j = 0; j < CONFIG_DIMM_SLOTS_PER_CTLR; j++) {
1722                                 if (!(dimm_mask & (1 << j)))
1723                                         continue;
1724                                 printf("DIMM parameters:  Controller=%u "
1725                                                 "DIMM=%u\n", i, j);
1726                                 print_dimm_parameters(
1727                                         &(pinfo->dimm_params[i][j]));
1728                                 printf("\n");
1729                         }
1730                         printf("\n");
1731                 }
1732                 printf("\n");
1733         }
1734
1735         /* STEP 3:  Common Parameters */
1736         if (do_mask & STEP_COMPUTE_COMMON_PARMS) {
1737                 for (i = 0; i < CONFIG_SYS_NUM_DDR_CTLRS; i++) {
1738                         if (!(ctrl_mask & (1 << i)))
1739                                 continue;
1740                         printf("\"lowest common\" DIMM parameters:  "
1741                                         "Controller=%u\n", i);
1742                         print_lowest_common_dimm_parameters(
1743                                 &pinfo->common_timing_params[i]);
1744                         printf("\n");
1745                 }
1746                 printf("\n");
1747         }
1748
1749         /* STEP 4:  User Configuration Options */
1750         if (do_mask & STEP_GATHER_OPTS) {
1751                 for (i = 0; i < CONFIG_SYS_NUM_DDR_CTLRS; i++) {
1752                         if (!(ctrl_mask & (1 << i)))
1753                                 continue;
1754                         printf("User Config Options: Controller=%u\n", i);
1755                         print_memctl_options(&pinfo->memctl_opts[i]);
1756                         printf("\n");
1757                 }
1758                 printf("\n");
1759         }
1760
1761         /* STEP 5:  Address assignment */
1762         if (do_mask & STEP_ASSIGN_ADDRESSES) {
1763                 for (i = 0; i < CONFIG_SYS_NUM_DDR_CTLRS; i++) {
1764                         if (!(ctrl_mask & (1 << i)))
1765                                 continue;
1766                         for (j = 0; j < CONFIG_DIMM_SLOTS_PER_CTLR; j++) {
1767                                 printf("Address Assignment: Controller=%u "
1768                                                 "DIMM=%u\n", i, j);
1769                                 printf("Don't have this functionality yet\n");
1770                         }
1771                         printf("\n");
1772                 }
1773                 printf("\n");
1774         }
1775
1776         /* STEP 6:  computed controller register values */
1777         if (do_mask & STEP_COMPUTE_REGS) {
1778                 for (i = 0; i < CONFIG_SYS_NUM_DDR_CTLRS; i++) {
1779                         if (!(ctrl_mask & (1 << i)))
1780                                 continue;
1781                         printf("Computed Register Values: Controller=%u\n", i);
1782                         print_fsl_memctl_config_regs(
1783                                 &pinfo->fsl_ddr_config_reg[i]);
1784                         retval = check_fsl_memctl_config_regs(
1785                                 &pinfo->fsl_ddr_config_reg[i]);
1786                         if (retval) {
1787                                 printf("check_fsl_memctl_config_regs "
1788                                         "result = %u\n", retval);
1789                         }
1790                         printf("\n");
1791                 }
1792                 printf("\n");
1793         }
1794 }
1795
1796 struct data_strings {
1797         const char *data_name;
1798         unsigned int step_mask;
1799         unsigned int dimm_number_required;
1800 };
1801
1802 #define DATA_OPTIONS(name, step, dimm) {#name, step, dimm}
1803
1804 static unsigned int fsl_ddr_parse_interactive_cmd(
1805         char **argv,
1806         int argc,
1807         unsigned int *pstep_mask,
1808         unsigned int *pctlr_mask,
1809         unsigned int *pdimm_mask,
1810         unsigned int *pdimm_number_required
1811          ) {
1812
1813         static const struct data_strings options[] = {
1814                 DATA_OPTIONS(spd, STEP_GET_SPD, 1),
1815                 DATA_OPTIONS(dimmparms, STEP_COMPUTE_DIMM_PARMS, 1),
1816                 DATA_OPTIONS(commonparms, STEP_COMPUTE_COMMON_PARMS, 0),
1817                 DATA_OPTIONS(opts, STEP_GATHER_OPTS, 0),
1818                 DATA_OPTIONS(addresses, STEP_ASSIGN_ADDRESSES, 0),
1819                 DATA_OPTIONS(regs, STEP_COMPUTE_REGS, 0),
1820         };
1821         static const unsigned int n_opts = ARRAY_SIZE(options);
1822
1823         unsigned int i, j;
1824         unsigned int error = 0;
1825
1826         for (i = 1; i < argc; i++) {
1827                 unsigned int matched = 0;
1828
1829                 for (j = 0; j < n_opts; j++) {
1830                         if (strcmp(options[j].data_name, argv[i]) != 0)
1831                                 continue;
1832                         *pstep_mask |= options[j].step_mask;
1833                         *pdimm_number_required =
1834                                 options[j].dimm_number_required;
1835                         matched = 1;
1836                         break;
1837                 }
1838
1839                 if (matched)
1840                         continue;
1841
1842                 if (argv[i][0] == 'c') {
1843                         char c = argv[i][1];
1844                         if (isdigit(c))
1845                                 *pctlr_mask |= 1 << (c - '0');
1846                         continue;
1847                 }
1848
1849                 if (argv[i][0] == 'd') {
1850                         char c = argv[i][1];
1851                         if (isdigit(c))
1852                                 *pdimm_mask |= 1 << (c - '0');
1853                         continue;
1854                 }
1855
1856                 printf("unknown arg %s\n", argv[i]);
1857                 *pstep_mask = 0;
1858                 error = 1;
1859                 break;
1860         }
1861
1862         return error;
1863 }
1864
1865 int fsl_ddr_interactive_env_var_exists(void)
1866 {
1867         char buffer[CONFIG_SYS_CBSIZE];
1868
1869         if (env_get_f("ddr_interactive", buffer, CONFIG_SYS_CBSIZE) >= 0)
1870                 return 1;
1871
1872         return 0;
1873 }
1874
1875 unsigned long long fsl_ddr_interactive(fsl_ddr_info_t *pinfo, int var_is_set)
1876 {
1877         unsigned long long ddrsize;
1878         const char *prompt = "FSL DDR>";
1879         char buffer[CONFIG_SYS_CBSIZE];
1880         char buffer2[CONFIG_SYS_CBSIZE];
1881         char *p = NULL;
1882         char *argv[CONFIG_SYS_MAXARGS + 1];     /* NULL terminated */
1883         int argc;
1884         unsigned int next_step = STEP_GET_SPD;
1885         const char *usage = {
1886                 "commands:\n"
1887                 "print      print SPD and intermediate computed data\n"
1888                 "reset      reboot machine\n"
1889                 "recompute  reload SPD and options to default and recompute regs\n"
1890                 "edit       modify spd, parameter, or option\n"
1891                 "compute    recompute registers from current next_step to end\n"
1892                 "copy       copy parameters\n"
1893                 "next_step  shows current next_step\n"
1894                 "help       this message\n"
1895                 "go         program the memory controller and continue with u-boot\n"
1896         };
1897
1898         if (var_is_set) {
1899                 if (env_get_f("ddr_interactive", buffer2,
1900                               CONFIG_SYS_CBSIZE) > 0)
1901                         p = buffer2;
1902                 else
1903                         var_is_set = 0;
1904         }
1905
1906         /*
1907          * The strategy for next_step is that it points to the next
1908          * step in the computation process that needs to be done.
1909          */
1910         while (1) {
1911                 if (var_is_set) {
1912                         char *pend = strchr(p, ';');
1913                         if (pend) {
1914                                 /* found command separator, copy sub-command */
1915                                 *pend = '\0';
1916                                 strcpy(buffer, p);
1917                                 p = pend + 1;
1918                         } else {
1919                                 /* separator not found, copy whole string */
1920                                 strcpy(buffer, p);
1921                                 p = NULL;
1922                                 var_is_set = 0;
1923                         }
1924                 } else {
1925                         /*
1926                          * No need to worry for buffer overflow here in
1927                          * this function;  cli_readline() maxes out at
1928                          * CFG_CBSIZE
1929                          */
1930                         cli_readline_into_buffer(prompt, buffer, 0);
1931                 }
1932                 argc = cli_simple_parse_line(buffer, argv);
1933                 if (argc == 0)
1934                         continue;
1935
1936
1937                 if (strcmp(argv[0], "help") == 0) {
1938                         puts(usage);
1939                         continue;
1940                 }
1941
1942                 if (strcmp(argv[0], "next_step") == 0) {
1943                         printf("next_step = 0x%02X (%s)\n",
1944                                next_step,
1945                                step_to_string(next_step));
1946                         continue;
1947                 }
1948
1949                 if (strcmp(argv[0], "copy") == 0) {
1950                         unsigned int error = 0;
1951                         unsigned int step_mask = 0;
1952                         unsigned int src_ctlr_mask = 0;
1953                         unsigned int src_dimm_mask = 0;
1954                         unsigned int dimm_number_required = 0;
1955                         unsigned int src_ctlr_num = 0;
1956                         unsigned int src_dimm_num = 0;
1957                         unsigned int dst_ctlr_num = -1;
1958                         unsigned int dst_dimm_num = -1;
1959                         unsigned int i, num_dest_parms;
1960
1961                         if (argc == 1) {
1962                                 printf("copy <src c#> <src d#> <spd|dimmparms|commonparms|opts|addresses|regs> <dst c#> <dst d#>\n");
1963                                 continue;
1964                         }
1965
1966                         error = fsl_ddr_parse_interactive_cmd(
1967                                 argv, argc,
1968                                 &step_mask,
1969                                 &src_ctlr_mask,
1970                                 &src_dimm_mask,
1971                                 &dimm_number_required
1972                         );
1973
1974                         /* XXX: only dimm_number_required and step_mask will
1975                            be used by this function.  Parse the controller and
1976                            DIMM number separately because it is easier.  */
1977
1978                         if (error)
1979                                 continue;
1980
1981                         /* parse source destination controller / DIMM */
1982
1983                         num_dest_parms = dimm_number_required ? 2 : 1;
1984
1985                         for (i = 0; i < argc; i++) {
1986                                 if (argv[i][0] == 'c') {
1987                                         char c = argv[i][1];
1988                                         if (isdigit(c)) {
1989                                                 src_ctlr_num = (c - '0');
1990                                                 break;
1991                                         }
1992                                 }
1993                         }
1994
1995                         for (i = 0; i < argc; i++) {
1996                                 if (argv[i][0] == 'd') {
1997                                         char c = argv[i][1];
1998                                         if (isdigit(c)) {
1999                                                 src_dimm_num = (c - '0');
2000                                                 break;
2001                                         }
2002                                 }
2003                         }
2004
2005                         /* parse destination controller / DIMM */
2006
2007                         for (i = argc - 1; i >= argc - num_dest_parms; i--) {
2008                                 if (argv[i][0] == 'c') {
2009                                         char c = argv[i][1];
2010                                         if (isdigit(c)) {
2011                                                 dst_ctlr_num = (c - '0');
2012                                                 break;
2013                                         }
2014                                 }
2015                         }
2016
2017                         for (i = argc - 1; i >= argc - num_dest_parms; i--) {
2018                                 if (argv[i][0] == 'd') {
2019                                         char c = argv[i][1];
2020                                         if (isdigit(c)) {
2021                                                 dst_dimm_num = (c - '0');
2022                                                 break;
2023                                         }
2024                                 }
2025                         }
2026
2027                         /* TODO: validate inputs */
2028
2029                         debug("src_ctlr_num = %u, src_dimm_num = %u, dst_ctlr_num = %u, dst_dimm_num = %u, step_mask = %x\n",
2030                                 src_ctlr_num, src_dimm_num, dst_ctlr_num, dst_dimm_num, step_mask);
2031
2032
2033                         switch (step_mask) {
2034
2035                         case STEP_GET_SPD:
2036                                 memcpy(&(pinfo->spd_installed_dimms[dst_ctlr_num][dst_dimm_num]),
2037                                         &(pinfo->spd_installed_dimms[src_ctlr_num][src_dimm_num]),
2038                                         sizeof(pinfo->spd_installed_dimms[0][0]));
2039                                 break;
2040
2041                         case STEP_COMPUTE_DIMM_PARMS:
2042                                 memcpy(&(pinfo->dimm_params[dst_ctlr_num][dst_dimm_num]),
2043                                         &(pinfo->dimm_params[src_ctlr_num][src_dimm_num]),
2044                                         sizeof(pinfo->dimm_params[0][0]));
2045                                 break;
2046
2047                         case STEP_COMPUTE_COMMON_PARMS:
2048                                 memcpy(&(pinfo->common_timing_params[dst_ctlr_num]),
2049                                         &(pinfo->common_timing_params[src_ctlr_num]),
2050                                         sizeof(pinfo->common_timing_params[0]));
2051                                 break;
2052
2053                         case STEP_GATHER_OPTS:
2054                                 memcpy(&(pinfo->memctl_opts[dst_ctlr_num]),
2055                                         &(pinfo->memctl_opts[src_ctlr_num]),
2056                                         sizeof(pinfo->memctl_opts[0]));
2057                                 break;
2058
2059                         /* someday be able to have addresses to copy addresses... */
2060
2061                         case STEP_COMPUTE_REGS:
2062                                 memcpy(&(pinfo->fsl_ddr_config_reg[dst_ctlr_num]),
2063                                         &(pinfo->fsl_ddr_config_reg[src_ctlr_num]),
2064                                         sizeof(pinfo->memctl_opts[0]));
2065                                 break;
2066
2067                         default:
2068                                 printf("unexpected step_mask value\n");
2069                         }
2070
2071                         continue;
2072
2073                 }
2074
2075                 if (strcmp(argv[0], "edit") == 0) {
2076                         unsigned int error = 0;
2077                         unsigned int step_mask = 0;
2078                         unsigned int ctlr_mask = 0;
2079                         unsigned int dimm_mask = 0;
2080                         char *p_element = NULL;
2081                         char *p_value = NULL;
2082                         unsigned int dimm_number_required = 0;
2083                         unsigned int ctrl_num;
2084                         unsigned int dimm_num;
2085
2086                         if (argc == 1) {
2087                                 /* Only the element and value must be last */
2088                                 printf("edit <c#> <d#> "
2089                                         "<spd|dimmparms|commonparms|opts|"
2090                                         "addresses|regs> <element> <value>\n");
2091                                 printf("for spd, specify byte number for "
2092                                         "element\n");
2093                                 continue;
2094                         }
2095
2096                         error = fsl_ddr_parse_interactive_cmd(
2097                                 argv, argc - 2,
2098                                 &step_mask,
2099                                 &ctlr_mask,
2100                                 &dimm_mask,
2101                                 &dimm_number_required
2102                         );
2103
2104                         if (error)
2105                                 continue;
2106
2107
2108                         /* Check arguments */
2109
2110                         /* ERROR: If no steps were found */
2111                         if (step_mask == 0) {
2112                                 printf("Error: No valid steps were specified "
2113                                                 "in argument.\n");
2114                                 continue;
2115                         }
2116
2117                         /* ERROR: If multiple steps were found */
2118                         if (step_mask & (step_mask - 1)) {
2119                                 printf("Error: Multiple steps specified in "
2120                                                 "argument.\n");
2121                                 continue;
2122                         }
2123
2124                         /* ERROR: Controller not specified */
2125                         if (ctlr_mask == 0) {
2126                                 printf("Error: controller number not "
2127                                         "specified or no element and "
2128                                         "value specified\n");
2129                                 continue;
2130                         }
2131
2132                         if (ctlr_mask & (ctlr_mask - 1)) {
2133                                 printf("Error: multiple controllers "
2134                                                 "specified, %X\n", ctlr_mask);
2135                                 continue;
2136                         }
2137
2138                         /* ERROR: DIMM number not specified */
2139                         if (dimm_number_required && dimm_mask == 0) {
2140                                 printf("Error: DIMM number number not "
2141                                         "specified or no element and "
2142                                         "value specified\n");
2143                                 continue;
2144                         }
2145
2146                         if (dimm_mask & (dimm_mask - 1)) {
2147                                 printf("Error: multipled DIMMs specified\n");
2148                                 continue;
2149                         }
2150
2151                         p_element = argv[argc - 2];
2152                         p_value = argv[argc - 1];
2153
2154                         ctrl_num = __ilog2(ctlr_mask);
2155                         dimm_num = __ilog2(dimm_mask);
2156
2157                         switch (step_mask) {
2158                         case STEP_GET_SPD:
2159                                 {
2160                                         unsigned int element_num;
2161                                         unsigned int value;
2162
2163                                         element_num = simple_strtoul(p_element,
2164                                                                      NULL, 0);
2165                                         value = simple_strtoul(p_value,
2166                                                                NULL, 0);
2167                                         fsl_ddr_spd_edit(pinfo,
2168                                                                ctrl_num,
2169                                                                dimm_num,
2170                                                                element_num,
2171                                                                value);
2172                                         next_step = STEP_COMPUTE_DIMM_PARMS;
2173                                 }
2174                                 break;
2175
2176                         case STEP_COMPUTE_DIMM_PARMS:
2177                                 fsl_ddr_dimm_parameters_edit(
2178                                                  pinfo, ctrl_num, dimm_num,
2179                                                  p_element, p_value);
2180                                 next_step = STEP_COMPUTE_COMMON_PARMS;
2181                                 break;
2182
2183                         case STEP_COMPUTE_COMMON_PARMS:
2184                                 lowest_common_dimm_parameters_edit(pinfo,
2185                                                 ctrl_num, p_element, p_value);
2186                                 next_step = STEP_GATHER_OPTS;
2187                                 break;
2188
2189                         case STEP_GATHER_OPTS:
2190                                 fsl_ddr_options_edit(pinfo, ctrl_num,
2191                                                            p_element, p_value);
2192                                 next_step = STEP_ASSIGN_ADDRESSES;
2193                                 break;
2194
2195                         case STEP_ASSIGN_ADDRESSES:
2196                                 printf("editing of address assignment "
2197                                                 "not yet implemented\n");
2198                                 break;
2199
2200                         case STEP_COMPUTE_REGS:
2201                                 {
2202                                         fsl_ddr_regs_edit(pinfo,
2203                                                                 ctrl_num,
2204                                                                 p_element,
2205                                                                 p_value);
2206                                         next_step = STEP_PROGRAM_REGS;
2207                                 }
2208                                 break;
2209
2210                         default:
2211                                 printf("programming error\n");
2212                                 while (1)
2213                                         ;
2214                                 break;
2215                         }
2216                         continue;
2217                 }
2218
2219                 if (strcmp(argv[0], "reset") == 0) {
2220                         /*
2221                          * Reboot machine.
2222                          * Args don't seem to matter because this
2223                          * doesn't return
2224                          */
2225                         do_reset(NULL, 0, 0, NULL);
2226                         printf("Reset didn't work\n");
2227                 }
2228
2229                 if (strcmp(argv[0], "recompute") == 0) {
2230                         /*
2231                          * Recalculate everything, starting with
2232                          * loading SPD EEPROM from DIMMs
2233                          */
2234                         next_step = STEP_GET_SPD;
2235                         ddrsize = fsl_ddr_compute(pinfo, next_step, 0);
2236                         continue;
2237                 }
2238
2239                 if (strcmp(argv[0], "compute") == 0) {
2240                         /*
2241                          * Compute rest of steps starting at
2242                          * the current next_step/
2243                          */
2244                         ddrsize = fsl_ddr_compute(pinfo, next_step, 0);
2245                         continue;
2246                 }
2247
2248                 if (strcmp(argv[0], "print") == 0) {
2249                         unsigned int error = 0;
2250                         unsigned int step_mask = 0;
2251                         unsigned int ctlr_mask = 0;
2252                         unsigned int dimm_mask = 0;
2253                         unsigned int dimm_number_required = 0;
2254
2255                         if (argc == 1) {
2256                                 printf("print [c<n>] [d<n>] [spd] [dimmparms] "
2257                                   "[commonparms] [opts] [addresses] [regs]\n");
2258                                 continue;
2259                         }
2260
2261                         error = fsl_ddr_parse_interactive_cmd(
2262                                 argv, argc,
2263                                 &step_mask,
2264                                 &ctlr_mask,
2265                                 &dimm_mask,
2266                                 &dimm_number_required
2267                         );
2268
2269                         if (error)
2270                                 continue;
2271
2272                         /* If no particular controller was found, print all */
2273                         if (ctlr_mask == 0)
2274                                 ctlr_mask = 0xFF;
2275
2276                         /* If no particular dimm was found, print all dimms. */
2277                         if (dimm_mask == 0)
2278                                 dimm_mask = 0xFF;
2279
2280                         /* If no steps were found, print all steps. */
2281                         if (step_mask == 0)
2282                                 step_mask = STEP_ALL;
2283
2284                         fsl_ddr_printinfo(pinfo, ctlr_mask,
2285                                                 dimm_mask, step_mask);
2286                         continue;
2287                 }
2288
2289                 if (strcmp(argv[0], "go") == 0) {
2290                         if (next_step)
2291                                 ddrsize = fsl_ddr_compute(pinfo, next_step, 0);
2292                         break;
2293                 }
2294
2295                 printf("unknown command %s\n", argv[0]);
2296         }
2297
2298         debug("end of memory = %llu\n", (u64)ddrsize);
2299
2300         return ddrsize;
2301 }