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ARM: mvebu: a38x: sync ddr training code with upstream
[u-boot] / drivers / ddr / marvell / a38x / ddr3_logging_def.h
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright (C) Marvell International Ltd. and its affiliates
4  */
5
6 #ifndef _DDR3_LOGGING_CONFIG_H
7 #define _DDR3_LOGGING_CONFIG_H
8
9 #ifdef SILENT_LIB
10 #define DEBUG_TRAINING_BIST_ENGINE(level, s)
11 #define DEBUG_TRAINING_IP(level, s)
12 #define DEBUG_CENTRALIZATION_ENGINE(level, s)
13 #define DEBUG_TRAINING_HW_ALG(level, s)
14 #define DEBUG_TRAINING_IP_ENGINE(level, s)
15 #define DEBUG_LEVELING(level, s)
16 #define DEBUG_PBS_ENGINE(level, s)
17 #define DEBUG_TRAINING_STATIC_IP(level, s)
18 #define DEBUG_TRAINING_ACCESS(level, s)
19 #else
20 #ifdef LIB_FUNCTIONAL_DEBUG_ONLY
21 #define DEBUG_TRAINING_BIST_ENGINE(level, s)
22 #define DEBUG_TRAINING_IP_ENGINE(level, s)
23 #define DEBUG_TRAINING_IP(level, s)             \
24         if (level >= debug_training)            \
25                 printf s
26 #define DEBUG_CENTRALIZATION_ENGINE(level, s)   \
27         if (level >= debug_centralization)      \
28                 printf s
29 #define DEBUG_TRAINING_HW_ALG(level, s)         \
30         if (level >= debug_training_hw_alg)     \
31                 printf s
32 #define DEBUG_LEVELING(level, s)                \
33         if (level >= debug_leveling)            \
34                 printf s
35 #define DEBUG_PBS_ENGINE(level, s)              \
36         if (level >= debug_pbs)                 \
37                 printf s
38 #define DEBUG_TRAINING_STATIC_IP(level, s)      \
39         if (level >= debug_training_static)     \
40                 printf s
41 #define DEBUG_TRAINING_ACCESS(level, s)         \
42         if (level >= debug_training_access)     \
43                 printf s
44 #else
45 #define DEBUG_TRAINING_BIST_ENGINE(level, s)    \
46         if (level >= debug_training_bist)       \
47                 printf s
48
49 #define DEBUG_TRAINING_IP_ENGINE(level, s)      \
50         if (level >= debug_training_ip)         \
51                 printf s
52 #define DEBUG_TRAINING_IP(level, s)             \
53         if (level >= debug_training)            \
54                 printf s
55 #define DEBUG_CENTRALIZATION_ENGINE(level, s)   \
56         if (level >= debug_centralization)      \
57                 printf s
58 #define DEBUG_TRAINING_HW_ALG(level, s)         \
59         if (level >= debug_training_hw_alg)     \
60                 printf s
61 #define DEBUG_LEVELING(level, s)                \
62         if (level >= debug_leveling)            \
63                 printf s
64 #define DEBUG_PBS_ENGINE(level, s)              \
65         if (level >= debug_pbs)                 \
66                 printf s
67 #define DEBUG_TRAINING_STATIC_IP(level, s)      \
68         if (level >= debug_training_static)     \
69                 printf s
70 #define DEBUG_TRAINING_ACCESS(level, s)         \
71         if (level >= debug_training_access)     \
72                 printf s
73 #endif
74 #endif
75
76
77 /* Logging defines */
78 enum mv_ddr_debug_level {
79         DEBUG_LEVEL_TRACE = 1,
80         DEBUG_LEVEL_INFO = 2,
81         DEBUG_LEVEL_ERROR = 3,
82         DEBUG_LEVEL_LAST
83 };
84
85 enum ddr_lib_debug_block {
86         DEBUG_BLOCK_STATIC,
87         DEBUG_BLOCK_TRAINING_MAIN,
88         DEBUG_BLOCK_LEVELING,
89         DEBUG_BLOCK_CENTRALIZATION,
90         DEBUG_BLOCK_PBS,
91         DEBUG_BLOCK_IP,
92         DEBUG_BLOCK_BIST,
93         DEBUG_BLOCK_ALG,
94         DEBUG_BLOCK_DEVICE,
95         DEBUG_BLOCK_ACCESS,
96         DEBUG_STAGES_REG_DUMP,
97         /* All excluding IP and REG_DUMP, should be enabled separatelly */
98         DEBUG_BLOCK_ALL
99 };
100
101 int ddr3_tip_print_log(u32 dev_num, u32 mem_addr);
102 int ddr3_tip_print_stability_log(u32 dev_num);
103
104 #endif /* _DDR3_LOGGING_CONFIG_H */