1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) Marvell International Ltd. and its affiliates
6 #ifndef _DDR3_TRAINING_IP_STATIC_H_
7 #define _DDR3_TRAINING_IP_STATIC_H_
9 #include "ddr3_training_ip_def.h"
10 #include "ddr3_training_ip.h"
12 struct trip_delay_element {
13 u32 dqs_delay; /* DQS delay (m_sec) */
14 u32 ck_delay; /* CK Delay (m_sec) */
17 struct hws_tip_static_config_info {
19 struct trip_delay_element *package_trace_arr;
20 struct trip_delay_element *board_trace_arr;
23 int ddr3_tip_run_static_alg(u32 dev_num, enum hws_ddr_freq freq);
24 int ddr3_tip_init_static_config_db(
25 u32 dev_num, struct hws_tip_static_config_info *static_config_info);
26 int ddr3_tip_init_specific_reg_config(u32 dev_num,
27 struct reg_data *reg_config_arr);
28 int ddr3_tip_static_phy_init_controller(u32 dev_num);
30 #endif /* _DDR3_TRAINING_IP_STATIC_H_ */