2 * GPIO driver for TI DaVinci DA8xx SOCs.
4 * (C) Copyright 2011 Guralp Systems Ltd.
5 * Laurence Withers <lwithers@guralp.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 #include <asm/arch/hardware.h>
27 #include <asm/arch/davinci_misc.h>
29 static struct gpio_registry {
31 char name[GPIO_NAME_SIZE];
32 } gpio_registry[MAX_NUM_GPIOS];
34 #define pinmux(x) (&davinci_syscfg_regs->pinmux[x])
36 #if defined(CONFIG_SOC_DA8XX) && !defined(CONFIG_SOC_DA850)
37 static const struct pinmux_config gpio_pinmux[] = {
38 { pinmux(13), 8, 6 }, /* GP0[0] */
54 { pinmux(15), 8, 6 }, /* GP1[0] */
70 { pinmux(17), 8, 6 }, /* GP2[0] */
86 { pinmux(10), 8, 1 }, /* GP3[0] */
100 { pinmux(11), 8, 5 },
101 { pinmux(11), 8, 6 },
102 { pinmux(12), 8, 4 }, /* GP4[0] */
103 { pinmux(12), 8, 5 },
104 { pinmux(12), 8, 6 },
105 { pinmux(12), 8, 7 },
106 { pinmux(13), 8, 0 },
107 { pinmux(13), 8, 1 },
108 { pinmux(13), 8, 2 },
109 { pinmux(13), 8, 3 },
110 { pinmux(13), 8, 4 },
111 { pinmux(13), 8, 5 },
112 { pinmux(11), 8, 7 },
113 { pinmux(12), 8, 0 },
114 { pinmux(12), 8, 1 },
115 { pinmux(12), 8, 2 },
116 { pinmux(12), 8, 3 },
118 { pinmux(7), 8, 3 }, /* GP5[0] */
134 { pinmux(5), 8, 1 }, /* GP6[0] */
150 { pinmux(1), 8, 0 }, /* GP7[0] */
168 static const struct pinmux_config gpio_pinmux[] = {
169 { pinmux(1), 8, 7 }, /* GP0[0] */
185 { pinmux(4), 8, 7 }, /* GP1[0] */
201 { pinmux(6), 8, 7 }, /* GP2[0] */
217 { pinmux(8), 8, 7 }, /* GP3[0] */
233 { pinmux(10), 8, 7 }, /* GP4[0] */
234 { pinmux(10), 8, 6 },
235 { pinmux(10), 8, 5 },
236 { pinmux(10), 8, 4 },
237 { pinmux(10), 8, 3 },
238 { pinmux(10), 8, 2 },
239 { pinmux(10), 8, 1 },
240 { pinmux(10), 8, 0 },
249 { pinmux(12), 8, 7 }, /* GP5[0] */
250 { pinmux(12), 8, 6 },
251 { pinmux(12), 8, 5 },
252 { pinmux(12), 8, 4 },
253 { pinmux(12), 8, 3 },
254 { pinmux(12), 8, 2 },
255 { pinmux(12), 8, 1 },
256 { pinmux(12), 8, 0 },
257 { pinmux(11), 8, 7 },
258 { pinmux(11), 8, 6 },
259 { pinmux(11), 8, 5 },
260 { pinmux(11), 8, 4 },
261 { pinmux(11), 8, 3 },
262 { pinmux(11), 8, 2 },
263 { pinmux(11), 8, 1 },
264 { pinmux(11), 8, 0 },
265 { pinmux(19), 8, 6 }, /* GP6[0] */
266 { pinmux(19), 8, 5 },
267 { pinmux(19), 8, 4 },
268 { pinmux(19), 8, 3 },
269 { pinmux(19), 8, 2 },
270 { pinmux(16), 8, 1 },
271 { pinmux(14), 8, 1 },
272 { pinmux(14), 8, 0 },
273 { pinmux(13), 8, 7 },
274 { pinmux(13), 8, 6 },
275 { pinmux(13), 8, 5 },
276 { pinmux(13), 8, 4 },
277 { pinmux(13), 8, 3 },
278 { pinmux(13), 8, 2 },
279 { pinmux(13), 8, 1 },
280 { pinmux(13), 8, 0 },
281 { pinmux(18), 8, 1 }, /* GP7[0] */
282 { pinmux(18), 8, 0 },
283 { pinmux(17), 8, 7 },
284 { pinmux(17), 8, 6 },
285 { pinmux(17), 8, 5 },
286 { pinmux(17), 8, 4 },
287 { pinmux(17), 8, 3 },
288 { pinmux(17), 8, 2 },
289 { pinmux(17), 8, 1 },
290 { pinmux(17), 8, 0 },
291 { pinmux(16), 8, 7 },
292 { pinmux(16), 8, 6 },
293 { pinmux(16), 8, 5 },
294 { pinmux(16), 8, 4 },
295 { pinmux(16), 8, 3 },
296 { pinmux(16), 8, 2 },
297 { pinmux(19), 8, 0 }, /* GP8[0] */
305 { pinmux(19), 8, 1 },
306 { pinmux(19), 8, 0 },
307 { pinmux(18), 8, 7 },
308 { pinmux(18), 8, 6 },
309 { pinmux(18), 8, 5 },
310 { pinmux(18), 8, 4 },
311 { pinmux(18), 8, 3 },
312 { pinmux(18), 8, 2 },
316 int gpio_request(unsigned gpio, const char *label)
318 if (gpio >= MAX_NUM_GPIOS)
321 if (gpio_registry[gpio].is_registered)
324 gpio_registry[gpio].is_registered = 1;
325 strncpy(gpio_registry[gpio].name, label, GPIO_NAME_SIZE);
326 gpio_registry[gpio].name[GPIO_NAME_SIZE - 1] = 0;
328 davinci_configure_pin_mux(&gpio_pinmux[gpio], 1);
333 int gpio_free(unsigned gpio)
335 if (gpio >= MAX_NUM_GPIOS)
338 if (!gpio_registry[gpio].is_registered)
341 gpio_registry[gpio].is_registered = 0;
342 gpio_registry[gpio].name[0] = '\0';
343 /* Do not configure as input or change pin mux here */
347 int gpio_direction_input(unsigned gpio)
349 struct davinci_gpio *bank;
351 bank = GPIO_BANK(gpio);
352 setbits_le32(&bank->dir, 1U << GPIO_BIT(gpio));
356 int gpio_direction_output(unsigned gpio, int value)
358 struct davinci_gpio *bank;
360 bank = GPIO_BANK(gpio);
361 clrbits_le32(&bank->dir, 1U << GPIO_BIT(gpio));
362 gpio_set_value(gpio, value);
366 int gpio_get_value(unsigned gpio)
368 struct davinci_gpio *bank;
371 bank = GPIO_BANK(gpio);
372 ip = in_le32(&bank->in_data) & (1U << GPIO_BIT(gpio));
376 int gpio_set_value(unsigned gpio, int value)
378 struct davinci_gpio *bank;
380 bank = GPIO_BANK(gpio);
383 bank->set_data = 1U << GPIO_BIT(gpio);
385 bank->clr_data = 1U << GPIO_BIT(gpio);
392 unsigned gpio, dir, val;
393 struct davinci_gpio *bank;
395 for (gpio = 0; gpio < MAX_NUM_GPIOS; ++gpio) {
396 bank = GPIO_BANK(gpio);
397 dir = in_le32(&bank->dir) & (1U << GPIO_BIT(gpio));
398 val = gpio_get_value(gpio);
400 printf("% 4d: %s: %d [%c] %s\n",
401 gpio, dir ? " in" : "out", val,
402 gpio_registry[gpio].is_registered ? 'x' : ' ',
403 gpio_registry[gpio].name);