2 * GPIO driver for TI DaVinci DA8xx SOCs.
4 * (C) Copyright 2011 Guralp Systems Ltd.
5 * Laurence Withers <lwithers@guralp.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 #include <asm/arch/hardware.h>
27 #include <asm/arch/davinci_misc.h>
29 static struct gpio_registry {
31 char name[GPIO_NAME_SIZE];
32 } gpio_registry[MAX_NUM_GPIOS];
34 #if defined(CONFIG_SOC_DA8XX)
35 #define pinmux(x) (&davinci_syscfg_regs->pinmux[x])
37 #if defined(CONFIG_SOC_DA8XX) && !defined(CONFIG_SOC_DA850)
38 static const struct pinmux_config gpio_pinmux[] = {
39 { pinmux(13), 8, 6 }, /* GP0[0] */
55 { pinmux(15), 8, 6 }, /* GP1[0] */
71 { pinmux(17), 8, 6 }, /* GP2[0] */
87 { pinmux(10), 8, 1 }, /* GP3[0] */
101 { pinmux(11), 8, 5 },
102 { pinmux(11), 8, 6 },
103 { pinmux(12), 8, 4 }, /* GP4[0] */
104 { pinmux(12), 8, 5 },
105 { pinmux(12), 8, 6 },
106 { pinmux(12), 8, 7 },
107 { pinmux(13), 8, 0 },
108 { pinmux(13), 8, 1 },
109 { pinmux(13), 8, 2 },
110 { pinmux(13), 8, 3 },
111 { pinmux(13), 8, 4 },
112 { pinmux(13), 8, 5 },
113 { pinmux(11), 8, 7 },
114 { pinmux(12), 8, 0 },
115 { pinmux(12), 8, 1 },
116 { pinmux(12), 8, 2 },
117 { pinmux(12), 8, 3 },
119 { pinmux(7), 8, 3 }, /* GP5[0] */
135 { pinmux(5), 8, 1 }, /* GP6[0] */
151 { pinmux(1), 8, 0 }, /* GP7[0] */
168 #else /* CONFIG_SOC_DA8XX && CONFIG_SOC_DA850 */
169 static const struct pinmux_config gpio_pinmux[] = {
170 { pinmux(1), 8, 7 }, /* GP0[0] */
186 { pinmux(4), 8, 7 }, /* GP1[0] */
202 { pinmux(6), 8, 7 }, /* GP2[0] */
218 { pinmux(8), 8, 7 }, /* GP3[0] */
234 { pinmux(10), 8, 7 }, /* GP4[0] */
235 { pinmux(10), 8, 6 },
236 { pinmux(10), 8, 5 },
237 { pinmux(10), 8, 4 },
238 { pinmux(10), 8, 3 },
239 { pinmux(10), 8, 2 },
240 { pinmux(10), 8, 1 },
241 { pinmux(10), 8, 0 },
250 { pinmux(12), 8, 7 }, /* GP5[0] */
251 { pinmux(12), 8, 6 },
252 { pinmux(12), 8, 5 },
253 { pinmux(12), 8, 4 },
254 { pinmux(12), 8, 3 },
255 { pinmux(12), 8, 2 },
256 { pinmux(12), 8, 1 },
257 { pinmux(12), 8, 0 },
258 { pinmux(11), 8, 7 },
259 { pinmux(11), 8, 6 },
260 { pinmux(11), 8, 5 },
261 { pinmux(11), 8, 4 },
262 { pinmux(11), 8, 3 },
263 { pinmux(11), 8, 2 },
264 { pinmux(11), 8, 1 },
265 { pinmux(11), 8, 0 },
266 { pinmux(19), 8, 6 }, /* GP6[0] */
267 { pinmux(19), 8, 5 },
268 { pinmux(19), 8, 4 },
269 { pinmux(19), 8, 3 },
270 { pinmux(19), 8, 2 },
271 { pinmux(16), 8, 1 },
272 { pinmux(14), 8, 1 },
273 { pinmux(14), 8, 0 },
274 { pinmux(13), 8, 7 },
275 { pinmux(13), 8, 6 },
276 { pinmux(13), 8, 5 },
277 { pinmux(13), 8, 4 },
278 { pinmux(13), 8, 3 },
279 { pinmux(13), 8, 2 },
280 { pinmux(13), 8, 1 },
281 { pinmux(13), 8, 0 },
282 { pinmux(18), 8, 1 }, /* GP7[0] */
283 { pinmux(18), 8, 0 },
284 { pinmux(17), 8, 7 },
285 { pinmux(17), 8, 6 },
286 { pinmux(17), 8, 5 },
287 { pinmux(17), 8, 4 },
288 { pinmux(17), 8, 3 },
289 { pinmux(17), 8, 2 },
290 { pinmux(17), 8, 1 },
291 { pinmux(17), 8, 0 },
292 { pinmux(16), 8, 7 },
293 { pinmux(16), 8, 6 },
294 { pinmux(16), 8, 5 },
295 { pinmux(16), 8, 4 },
296 { pinmux(16), 8, 3 },
297 { pinmux(16), 8, 2 },
298 { pinmux(19), 8, 0 }, /* GP8[0] */
306 { pinmux(19), 8, 1 },
307 { pinmux(19), 8, 0 },
308 { pinmux(18), 8, 7 },
309 { pinmux(18), 8, 6 },
310 { pinmux(18), 8, 5 },
311 { pinmux(18), 8, 4 },
312 { pinmux(18), 8, 3 },
313 { pinmux(18), 8, 2 },
315 #endif /* CONFIG_SOC_DA8XX && !CONFIG_SOC_DA850 */
316 #else /* !CONFIG_SOC_DA8XX */
317 #define davinci_configure_pin_mux(a, b)
318 #endif /* CONFIG_SOC_DA8XX */
320 int gpio_request(unsigned gpio, const char *label)
322 if (gpio >= MAX_NUM_GPIOS)
325 if (gpio_registry[gpio].is_registered)
328 gpio_registry[gpio].is_registered = 1;
329 strncpy(gpio_registry[gpio].name, label, GPIO_NAME_SIZE);
330 gpio_registry[gpio].name[GPIO_NAME_SIZE - 1] = 0;
332 davinci_configure_pin_mux(&gpio_pinmux[gpio], 1);
337 int gpio_free(unsigned gpio)
339 if (gpio >= MAX_NUM_GPIOS)
342 if (!gpio_registry[gpio].is_registered)
345 gpio_registry[gpio].is_registered = 0;
346 gpio_registry[gpio].name[0] = '\0';
347 /* Do not configure as input or change pin mux here */
351 int gpio_direction_input(unsigned gpio)
353 struct davinci_gpio *bank;
355 bank = GPIO_BANK(gpio);
356 setbits_le32(&bank->dir, 1U << GPIO_BIT(gpio));
360 int gpio_direction_output(unsigned gpio, int value)
362 struct davinci_gpio *bank;
364 bank = GPIO_BANK(gpio);
365 clrbits_le32(&bank->dir, 1U << GPIO_BIT(gpio));
366 gpio_set_value(gpio, value);
370 int gpio_get_value(unsigned gpio)
372 struct davinci_gpio *bank;
375 bank = GPIO_BANK(gpio);
376 ip = in_le32(&bank->in_data) & (1U << GPIO_BIT(gpio));
380 int gpio_set_value(unsigned gpio, int value)
382 struct davinci_gpio *bank;
384 bank = GPIO_BANK(gpio);
387 bank->set_data = 1U << GPIO_BIT(gpio);
389 bank->clr_data = 1U << GPIO_BIT(gpio);
396 unsigned gpio, dir, val;
397 struct davinci_gpio *bank;
399 for (gpio = 0; gpio < MAX_NUM_GPIOS; ++gpio) {
400 bank = GPIO_BANK(gpio);
401 dir = in_le32(&bank->dir) & (1U << GPIO_BIT(gpio));
402 val = gpio_get_value(gpio);
404 printf("% 4d: %s: %d [%c] %s\n",
405 gpio, dir ? " in" : "out", val,
406 gpio_registry[gpio].is_registered ? 'x' : ' ',
407 gpio_registry[gpio].name);