1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2015 Marek Vasut <marex@denx.de>
5 * DesignWare APB GPIO driver
10 #include <asm/arch/gpio.h>
14 #include <dm/device-internal.h>
19 DECLARE_GLOBAL_DATA_PTR;
21 #define GPIO_SWPORT_DR(p) (0x00 + (p) * 0xc)
22 #define GPIO_SWPORT_DDR(p) (0x04 + (p) * 0xc)
23 #define GPIO_INTEN 0x30
24 #define GPIO_INTMASK 0x34
25 #define GPIO_INTTYPE_LEVEL 0x38
26 #define GPIO_INT_POLARITY 0x3c
27 #define GPIO_INTSTATUS 0x40
28 #define GPIO_PORTA_DEBOUNCE 0x48
29 #define GPIO_PORTA_EOI 0x4c
30 #define GPIO_EXT_PORT(p) (0x50 + (p) * 4)
32 struct gpio_dwapb_platdata {
39 static int dwapb_gpio_direction_input(struct udevice *dev, unsigned pin)
41 struct gpio_dwapb_platdata *plat = dev_get_platdata(dev);
43 clrbits_le32(plat->base + GPIO_SWPORT_DDR(plat->bank), 1 << pin);
47 static int dwapb_gpio_direction_output(struct udevice *dev, unsigned pin,
50 struct gpio_dwapb_platdata *plat = dev_get_platdata(dev);
52 setbits_le32(plat->base + GPIO_SWPORT_DDR(plat->bank), 1 << pin);
55 setbits_le32(plat->base + GPIO_SWPORT_DR(plat->bank), 1 << pin);
57 clrbits_le32(plat->base + GPIO_SWPORT_DR(plat->bank), 1 << pin);
62 static int dwapb_gpio_get_value(struct udevice *dev, unsigned pin)
64 struct gpio_dwapb_platdata *plat = dev_get_platdata(dev);
65 return !!(readl(plat->base + GPIO_EXT_PORT(plat->bank)) & (1 << pin));
69 static int dwapb_gpio_set_value(struct udevice *dev, unsigned pin, int val)
71 struct gpio_dwapb_platdata *plat = dev_get_platdata(dev);
74 setbits_le32(plat->base + GPIO_SWPORT_DR(plat->bank), 1 << pin);
76 clrbits_le32(plat->base + GPIO_SWPORT_DR(plat->bank), 1 << pin);
81 static const struct dm_gpio_ops gpio_dwapb_ops = {
82 .direction_input = dwapb_gpio_direction_input,
83 .direction_output = dwapb_gpio_direction_output,
84 .get_value = dwapb_gpio_get_value,
85 .set_value = dwapb_gpio_set_value,
88 static int gpio_dwapb_probe(struct udevice *dev)
90 struct gpio_dev_priv *priv = dev_get_uclass_priv(dev);
91 struct gpio_dwapb_platdata *plat = dev->platdata;
96 priv->gpio_count = plat->pins;
97 priv->bank_name = plat->name;
102 static int gpio_dwapb_bind(struct udevice *dev)
104 struct gpio_dwapb_platdata *plat = dev_get_platdata(dev);
105 const void *blob = gd->fdt_blob;
106 struct udevice *subdev;
108 int ret, node, bank = 0;
110 /* If this is a child device, there is nothing to do here */
114 base = fdtdec_get_addr(blob, dev_of_offset(dev), "reg");
115 if (base == FDT_ADDR_T_NONE) {
116 debug("Can't get the GPIO register base address\n");
120 for (node = fdt_first_subnode(blob, dev_of_offset(dev));
122 node = fdt_next_subnode(blob, node)) {
123 if (!fdtdec_get_bool(blob, node, "gpio-controller"))
127 plat = calloc(1, sizeof(*plat));
133 plat->pins = fdtdec_get_int(blob, node, "snps,nr-gpios", 0);
134 plat->name = fdt_stringlist_get(blob, node, "bank-name", 0,
139 ret = device_bind(dev, dev->driver, plat->name,
144 dev_set_of_offset(subdev, node);
155 static const struct udevice_id gpio_dwapb_ids[] = {
156 { .compatible = "snps,dw-apb-gpio" },
160 U_BOOT_DRIVER(gpio_dwapb) = {
161 .name = "gpio-dwapb",
163 .of_match = gpio_dwapb_ids,
164 .ops = &gpio_dwapb_ops,
165 .bind = gpio_dwapb_bind,
166 .probe = gpio_dwapb_probe,