4 * (C) Copyright 2014 DENX Software Engineering GmbH
5 * Written-by: Albert ARIBAUD <albert.aribaud@3adev.fr>
7 * SPDX-License-Identifier: GPL-2.0+
12 #include <asm/arch-lpc32xx/cpu.h>
13 #include <asm/arch-lpc32xx/gpio.h>
14 #include <asm-generic/gpio.h>
18 * LPC32xx GPIOs work in banks but are non-homogeneous:
19 * - each bank holds a different number of GPIOs
20 * - some GPIOs are input/ouput, some input only, some output only;
21 * - some GPIOs have different meanings as an input and as an output;
22 * - some GPIOs are controlled on a given port and bit index, but
23 * read on another one.
25 * In order to keep this code simple, GPIOS are considered here as
26 * homogeneous and linear, from 0 to 159.
30 * Client code is responsible for properly using valid GPIO numbers,
31 * including cases where a single physical GPIO has differing numbers
32 * for setting its direction, reading it and/or writing to it.
36 * Please read NOTE in description of lpc32xx_gpio_get_function().
39 #define LPC32XX_GPIOS 160
41 struct lpc32xx_gpio_priv {
42 struct gpio_regs *regs;
43 /* GPIO FUNCTION: SEE WARNING #2 */
44 signed char function[LPC32XX_GPIOS];
48 * We have 4 GPIO ports of 32 bits each
50 * Port mapping offset (32 bits each):
54 * - Port 3: GPO / GPIO (output): 96
60 #define GPIO_TO_PORT(gpio) ((gpio / 32) & 7)
61 #define GPIO_TO_RANK(gpio) (gpio % 32)
62 #define GPIO_TO_MASK(gpio) (1 << (gpio % 32))
65 * Configure a GPIO number 'offset' as input
68 static int lpc32xx_gpio_direction_input(struct udevice *dev, unsigned offset)
71 struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
72 struct gpio_regs *regs = gpio_priv->regs;
74 port = GPIO_TO_PORT(offset);
75 mask = GPIO_TO_MASK(offset);
79 writel(mask, ®s->p0_dir_clr);
82 writel(mask, ®s->p1_dir_clr);
85 /* ports 2 and 3 share a common direction */
86 writel(mask, ®s->p2_p3_dir_clr);
89 /* Setup direction only for GPIO_xx. */
90 if ((mask >= 25) && (mask <= 30))
91 writel(mask, ®s->p2_p3_dir_clr);
94 /* GPI_xx; nothing to do. */
100 /* GPIO FUNCTION: SEE WARNING #2 */
101 gpio_priv->function[offset] = GPIOF_INPUT;
107 * Get the value of a GPIO
110 static int lpc32xx_gpio_get_value(struct udevice *dev, unsigned offset)
112 int port, rank, mask, value;
113 struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
114 struct gpio_regs *regs = gpio_priv->regs;
116 port = GPIO_TO_PORT(offset);
120 value = readl(®s->p0_inp_state);
123 value = readl(®s->p1_inp_state);
126 value = readl(®s->p2_inp_state);
129 /* Read GPO_xx and GPIO_xx (as output) using p3_outp_state. */
130 value = readl(®s->p3_outp_state);
133 /* Read GPI_xx and GPIO_xx (as input) using p3_inp_state. */
134 value = readl(®s->p3_inp_state);
140 rank = GPIO_TO_RANK(offset);
141 mask = GPIO_TO_MASK(offset);
143 return (value & mask) >> rank;
150 static int gpio_set(struct udevice *dev, unsigned gpio)
153 struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
154 struct gpio_regs *regs = gpio_priv->regs;
156 port = GPIO_TO_PORT(gpio);
157 mask = GPIO_TO_MASK(gpio);
161 writel(mask, ®s->p0_outp_set);
164 writel(mask, ®s->p1_outp_set);
167 writel(mask, ®s->p2_outp_set);
170 writel(mask, ®s->p3_outp_set);
173 /* GPI_xx; invalid. */
184 static int gpio_clr(struct udevice *dev, unsigned gpio)
187 struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
188 struct gpio_regs *regs = gpio_priv->regs;
190 port = GPIO_TO_PORT(gpio);
191 mask = GPIO_TO_MASK(gpio);
195 writel(mask, ®s->p0_outp_clr);
198 writel(mask, ®s->p1_outp_clr);
201 writel(mask, ®s->p2_outp_clr);
204 writel(mask, ®s->p3_outp_clr);
207 /* GPI_xx; invalid. */
215 * Set the value of a GPIO
218 static int lpc32xx_gpio_set_value(struct udevice *dev, unsigned offset,
222 return gpio_set(dev, offset);
224 return gpio_clr(dev, offset);
228 * Configure a GPIO number 'offset' as output with given initial value.
231 static int lpc32xx_gpio_direction_output(struct udevice *dev, unsigned offset,
235 struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
236 struct gpio_regs *regs = gpio_priv->regs;
238 port = GPIO_TO_PORT(offset);
239 mask = GPIO_TO_MASK(offset);
243 writel(mask, ®s->p0_dir_set);
246 writel(mask, ®s->p1_dir_set);
249 /* ports 2 and 3 share a common direction */
250 writel(mask, ®s->p2_p3_dir_set);
253 /* Setup direction only for GPIO_xx. */
254 if ((mask >= 25) && (mask <= 30))
255 writel(mask, ®s->p2_p3_dir_set);
258 /* GPI_xx; invalid. */
263 /* GPIO FUNCTION: SEE WARNING #2 */
264 gpio_priv->function[offset] = GPIOF_OUTPUT;
266 return lpc32xx_gpio_set_value(dev, offset, value);
270 * GPIO functions are supposed to be computed from their current
271 * configuration, but that's way too complicated in LPC32XX. A simpler
272 * approach is used, where the GPIO functions are cached in an array.
273 * When the GPIO is in use, its function is either "input" or "output"
274 * depending on its direction, otherwise its function is "unknown".
278 * THIS APPROACH WAS CHOSEN DU TO THE COMPLEX NATURE OF THE LPC32XX
279 * GPIOS; DO NOT TAKE THIS AS AN EXAMPLE FOR NEW CODE.
282 static int lpc32xx_gpio_get_function(struct udevice *dev, unsigned offset)
284 struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
285 return gpio_priv->function[offset];
288 static const struct dm_gpio_ops gpio_lpc32xx_ops = {
289 .direction_input = lpc32xx_gpio_direction_input,
290 .direction_output = lpc32xx_gpio_direction_output,
291 .get_value = lpc32xx_gpio_get_value,
292 .set_value = lpc32xx_gpio_set_value,
293 .get_function = lpc32xx_gpio_get_function,
296 static int lpc32xx_gpio_probe(struct udevice *dev)
298 struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
299 struct gpio_dev_priv *uc_priv = dev->uclass_priv;
301 if (dev_of_offset(dev) == -1) {
302 /* Tell the uclass how many GPIOs we have */
303 uc_priv->gpio_count = LPC32XX_GPIOS;
306 /* set base address for GPIO registers */
307 gpio_priv->regs = (struct gpio_regs *)GPIO_BASE;
309 /* all GPIO functions are unknown until requested */
310 /* GPIO FUNCTION: SEE WARNING #2 */
311 memset(gpio_priv->function, GPIOF_UNKNOWN, sizeof(gpio_priv->function));
316 U_BOOT_DRIVER(gpio_lpc32xx) = {
317 .name = "gpio_lpc32xx",
319 .ops = &gpio_lpc32xx_ops,
320 .probe = lpc32xx_gpio_probe,
321 .priv_auto_alloc_size = sizeof(struct lpc32xx_gpio_priv),