4 * (C) Copyright 2014 DENX Software Engineering GmbH
5 * Written-by: Albert ARIBAUD <albert.aribaud@3adev.fr>
7 * SPDX-License-Identifier: GPL-2.0+
11 #include <asm/arch-lpc32xx/cpu.h>
12 #include <asm/arch-lpc32xx/gpio.h>
13 #include <asm-generic/gpio.h>
17 * LPC32xx GPIOs work in banks but are non-homogeneous:
18 * - each bank holds a different number of GPIOs
19 * - some GPIOs are input/ouput, some input only, some output only;
20 * - some GPIOs have different meanings as an input and as an output;
21 * - some GPIOs are controlled on a given port and bit index, but
22 * read on another one.
24 * In order to keep this code simple, GPIOS are considered here as
25 * homogeneous and linear, from 0 to 127.
29 * Client code is responsible for properly using valid GPIO numbers,
30 * including cases where a single physical GPIO has differing numbers
31 * for setting its direction, reading it and/or writing to it.
35 * Please read NOTE in description of lpc32xx_gpio_get_function().
38 #define LPC32XX_GPIOS 128
40 struct lpc32xx_gpio_priv {
41 struct gpio_regs *regs;
42 /* GPIO FUNCTION: SEE WARNING #2 */
43 signed char function[LPC32XX_GPIOS];
47 * We have 4 GPIO ports of 32 bits each
52 #define GPIO_TO_PORT(gpio) ((gpio / 32) & 3)
53 #define GPIO_TO_RANK(gpio) (gpio % 32)
54 #define GPIO_TO_MASK(gpio) (1 << (gpio % 32))
57 * Configure a GPIO number 'offset' as input
60 static int lpc32xx_gpio_direction_input(struct udevice *dev, unsigned offset)
63 struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
64 struct gpio_regs *regs = gpio_priv->regs;
66 port = GPIO_TO_PORT(offset);
67 mask = GPIO_TO_MASK(offset);
71 writel(mask, ®s->p0_dir_clr);
74 writel(mask, ®s->p1_dir_clr);
77 /* ports 2 and 3 share a common direction */
79 writel(mask, ®s->p2_p3_dir_clr);
85 /* GPIO FUNCTION: SEE WARNING #2 */
86 gpio_priv->function[offset] = GPIOF_INPUT;
92 * Get the value of a GPIO
95 static int lpc32xx_gpio_get_value(struct udevice *dev, unsigned offset)
97 int port, rank, mask, value;
98 struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
99 struct gpio_regs *regs = gpio_priv->regs;
101 port = GPIO_TO_PORT(offset);
105 value = readl(®s->p0_inp_state);
108 value = readl(®s->p1_inp_state);
111 value = readl(®s->p2_inp_state);
114 value = readl(®s->p3_inp_state);
120 rank = GPIO_TO_RANK(offset);
121 mask = GPIO_TO_MASK(offset);
123 return (value & mask) >> rank;
130 static int gpio_set(struct udevice *dev, unsigned gpio)
133 struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
134 struct gpio_regs *regs = gpio_priv->regs;
136 port = GPIO_TO_PORT(gpio);
137 mask = GPIO_TO_MASK(gpio);
141 writel(mask, ®s->p0_outp_set);
144 writel(mask, ®s->p1_outp_set);
147 writel(mask, ®s->p2_outp_set);
150 writel(mask, ®s->p3_outp_set);
162 static int gpio_clr(struct udevice *dev, unsigned gpio)
165 struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
166 struct gpio_regs *regs = gpio_priv->regs;
168 port = GPIO_TO_PORT(gpio);
169 mask = GPIO_TO_MASK(gpio);
173 writel(mask, ®s->p0_outp_clr);
176 writel(mask, ®s->p1_outp_clr);
179 writel(mask, ®s->p2_outp_clr);
182 writel(mask, ®s->p3_outp_clr);
191 * Set the value of a GPIO
194 static int lpc32xx_gpio_set_value(struct udevice *dev, unsigned offset,
198 return gpio_set(dev, offset);
200 return gpio_clr(dev, offset);
204 * Configure a GPIO number 'offset' as output with given initial value.
207 static int lpc32xx_gpio_direction_output(struct udevice *dev, unsigned offset,
211 struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
212 struct gpio_regs *regs = gpio_priv->regs;
214 port = GPIO_TO_PORT(offset);
215 mask = GPIO_TO_MASK(offset);
219 writel(mask, ®s->p0_dir_set);
222 writel(mask, ®s->p1_dir_set);
225 /* ports 2 and 3 share a common direction */
227 writel(mask, ®s->p2_p3_dir_set);
233 /* GPIO FUNCTION: SEE WARNING #2 */
234 gpio_priv->function[offset] = GPIOF_OUTPUT;
236 return lpc32xx_gpio_set_value(dev, offset, value);
240 * GPIO functions are supposed to be computed from their current
241 * configuration, but that's way too complicated in LPC32XX. A simpler
242 * approach is used, where the GPIO functions are cached in an array.
243 * When the GPIO is in use, its function is either "input" or "output"
244 * depending on its direction, otherwise its function is "unknown".
248 * THIS APPROACH WAS CHOSEN DU TO THE COMPLEX NATURE OF THE LPC32XX
249 * GPIOS; DO NOT TAKE THIS AS AN EXAMPLE FOR NEW CODE.
252 static int lpc32xx_gpio_get_function(struct udevice *dev, unsigned offset)
254 struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
255 return gpio_priv->function[offset];
258 static const struct dm_gpio_ops gpio_lpc32xx_ops = {
259 .direction_input = lpc32xx_gpio_direction_input,
260 .direction_output = lpc32xx_gpio_direction_output,
261 .get_value = lpc32xx_gpio_get_value,
262 .set_value = lpc32xx_gpio_set_value,
263 .get_function = lpc32xx_gpio_get_function,
266 static int lpc32xx_gpio_probe(struct udevice *dev)
268 struct lpc32xx_gpio_priv *gpio_priv = dev_get_priv(dev);
269 struct gpio_dev_priv *uc_priv = dev->uclass_priv;
271 if (dev->of_offset == -1) {
272 /* Tell the uclass how many GPIOs we have */
273 uc_priv->gpio_count = LPC32XX_GPIOS;
276 /* set base address for GPIO registers */
277 gpio_priv->regs = (struct gpio_regs *)GPIO_BASE;
279 /* all GPIO functions are unknown until requested */
280 /* GPIO FUNCTION: SEE WARNING #2 */
281 memset(gpio_priv->function, GPIOF_UNKNOWN, sizeof(gpio_priv->function));
286 U_BOOT_DRIVER(gpio_lpc32xx) = {
287 .name = "gpio_lpc32xx",
289 .ops = &gpio_lpc32xx_ops,
290 .probe = lpc32xx_gpio_probe,
291 .priv_auto_alloc_size = sizeof(struct lpc32xx_gpio_priv),