git.sur5r.net Git - u-boot/blob - drivers/i2c/davinci_i2c.c

   1 /*
   2  * TI DaVinci (TMS320DM644x) I2C driver.
   3  *
   4  * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
   5  *
   6  * --------------------------------------------------------
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10
  11 #include <common.h>
  12 #include <i2c.h>
  13 #include <asm/arch/hardware.h>
  14 #include <asm/arch/i2c_defs.h>
  15 #include "davinci_i2c.h"
  16
  17 #define CHECK_NACK() \
  18         do {\
  19                 if (tmp & (I2C_TIMEOUT | I2C_STAT_NACK)) {\
  20                         REG(I2C_CON) = 0;\
  21                         return(1);\
  22                 }\
  23         } while (0)
  24
  25
  26 static int wait_for_bus(void)
  27 {
  28         int     stat, timeout;
  29
  30         REG(I2C_STAT) = 0xffff;
  31
  32         for (timeout = 0; timeout < 10; timeout++) {
  33                 if (!((stat = REG(I2C_STAT)) & I2C_STAT_BB)) {
  34                         REG(I2C_STAT) = 0xffff;
  35                         return(0);
  36                 }
  37
  38                 REG(I2C_STAT) = stat;
  39                 udelay(50000);
  40         }
  41
  42         REG(I2C_STAT) = 0xffff;
  43         return(1);
  44 }
  45
  46
  47 static int poll_i2c_irq(int mask)
  48 {
  49         int     stat, timeout;
  50
  51         for (timeout = 0; timeout < 10; timeout++) {
  52                 udelay(1000);
  53                 stat = REG(I2C_STAT);
  54                 if (stat & mask) {
  55                         return(stat);
  56                 }
  57         }
  58
  59         REG(I2C_STAT) = 0xffff;
  60         return(stat | I2C_TIMEOUT);
  61 }
  62
  63
  64 void flush_rx(void)
  65 {
  66         while (1) {
  67                 if (!(REG(I2C_STAT) & I2C_STAT_RRDY))
  68                         break;
  69
  70                 REG(I2C_DRR);
  71                 REG(I2C_STAT) = I2C_STAT_RRDY;
  72                 udelay(1000);
  73         }
  74 }
  75
  76
  77 void i2c_init(int speed, int slaveadd)
  78 {
  79         u_int32_t       div, psc;
  80
  81         if (REG(I2C_CON) & I2C_CON_EN) {
  82                 REG(I2C_CON) = 0;
  83                 udelay (50000);
  84         }
  85
  86         psc = 2;
  87         div = (CONFIG_SYS_HZ_CLOCK / ((psc + 1) * speed)) - 10; /* SCLL + SCLH */
  88         REG(I2C_PSC) = psc;                     /* 27MHz / (2 + 1) = 9MHz */
  89         REG(I2C_SCLL) = (div * 50) / 100;       /* 50% Duty */
  90         REG(I2C_SCLH) = div - REG(I2C_SCLL);
  91
  92         REG(I2C_OA) = slaveadd;
  93         REG(I2C_CNT) = 0;
  94
  95         /* Interrupts must be enabled or I2C module won't work */
  96         REG(I2C_IE) = I2C_IE_SCD_IE | I2C_IE_XRDY_IE |
  97                 I2C_IE_RRDY_IE | I2C_IE_ARDY_IE | I2C_IE_NACK_IE;
  98
  99         /* Now enable I2C controller (get it out of reset) */
 100         REG(I2C_CON) = I2C_CON_EN;
 101
 102         udelay(1000);
 103 }
 104
 105 int i2c_set_bus_speed(unsigned int speed)
 106 {
 107         i2c_init(speed, CONFIG_SYS_I2C_SLAVE);
 108         return 0;
 109 }
 110
 111 int i2c_probe(u_int8_t chip)
 112 {
 113         int     rc = 1;
 114
 115         if (chip == REG(I2C_OA)) {
 116                 return(rc);
 117         }
 118
 119         REG(I2C_CON) = 0;
 120         if (wait_for_bus()) {return(1);}
 121
 122         /* try to read one byte from current (or only) address */
 123         REG(I2C_CNT) = 1;
 124         REG(I2C_SA) = chip;
 125         REG(I2C_CON) = (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_STP);
 126         udelay (50000);
 127
 128         if (!(REG(I2C_STAT) & I2C_STAT_NACK)) {
 129                 rc = 0;
 130                 flush_rx();
 131                 REG(I2C_STAT) = 0xffff;
 132         } else {
 133                 REG(I2C_STAT) = 0xffff;
 134                 REG(I2C_CON) |= I2C_CON_STP;
 135                 udelay(20000);
 136                 if (wait_for_bus()) {return(1);}
 137         }
 138
 139         flush_rx();
 140         REG(I2C_STAT) = 0xffff;
 141         REG(I2C_CNT) = 0;
 142         return(rc);
 143 }
 144
 145
 146 int i2c_read(u_int8_t chip, u_int32_t addr, int alen, u_int8_t *buf, int len)
 147 {
 148         u_int32_t       tmp;
 149         int             i;
 150
 151         if ((alen < 0) || (alen > 2)) {
 152                 printf("%s(): bogus address length %x\n", __FUNCTION__, alen);
 153                 return(1);
 154         }
 155
 156         if (wait_for_bus()) {return(1);}
 157
 158         if (alen != 0) {
 159                 /* Start address phase */
 160                 tmp = I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX;
 161                 REG(I2C_CNT) = alen;
 162                 REG(I2C_SA) = chip;
 163                 REG(I2C_CON) = tmp;
 164
 165                 tmp = poll_i2c_irq(I2C_STAT_XRDY | I2C_STAT_NACK);
 166
 167                 CHECK_NACK();
 168
 169                 switch (alen) {
 170                         case 2:
 171                                 /* Send address MSByte */
 172                                 if (tmp & I2C_STAT_XRDY) {
 173                                         REG(I2C_DXR) = (addr >> 8) & 0xff;
 174                                 } else {
 175                                         REG(I2C_CON) = 0;
 176                                         return(1);
 177                                 }
 178
 179                                 tmp = poll_i2c_irq(I2C_STAT_XRDY | I2C_STAT_NACK);
 180
 181                                 CHECK_NACK();
 182                                 /* No break, fall through */
 183                         case 1:
 184                                 /* Send address LSByte */
 185                                 if (tmp & I2C_STAT_XRDY) {
 186                                         REG(I2C_DXR) = addr & 0xff;
 187                                 } else {
 188                                         REG(I2C_CON) = 0;
 189                                         return(1);
 190                                 }
 191
 192                                 tmp = poll_i2c_irq(I2C_STAT_XRDY | I2C_STAT_NACK | I2C_STAT_ARDY);
 193
 194                                 CHECK_NACK();
 195
 196                                 if (!(tmp & I2C_STAT_ARDY)) {
 197                                         REG(I2C_CON) = 0;
 198                                         return(1);
 199                                 }
 200                 }
 201         }
 202
 203         /* Address phase is over, now read 'len' bytes and stop */
 204         tmp = I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_STP;
 205         REG(I2C_CNT) = len & 0xffff;
 206         REG(I2C_SA) = chip;
 207         REG(I2C_CON) = tmp;
 208
 209         for (i = 0; i < len; i++) {
 210                 tmp = poll_i2c_irq(I2C_STAT_RRDY | I2C_STAT_NACK | I2C_STAT_ROVR);
 211
 212                 CHECK_NACK();
 213
 214                 if (tmp & I2C_STAT_RRDY) {
 215                         buf[i] = REG(I2C_DRR);
 216                 } else {
 217                         REG(I2C_CON) = 0;
 218                         return(1);
 219                 }
 220         }
 221
 222         tmp = poll_i2c_irq(I2C_STAT_SCD | I2C_STAT_NACK);
 223
 224         CHECK_NACK();
 225
 226         if (!(tmp & I2C_STAT_SCD)) {
 227                 REG(I2C_CON) = 0;
 228                 return(1);
 229         }
 230
 231         flush_rx();
 232         REG(I2C_STAT) = 0xffff;
 233         REG(I2C_CNT) = 0;
 234         REG(I2C_CON) = 0;
 235
 236         return(0);
 237 }
 238
 239
 240 int i2c_write(u_int8_t chip, u_int32_t addr, int alen, u_int8_t *buf, int len)
 241 {
 242         u_int32_t       tmp;
 243         int             i;
 244
 245         if ((alen < 0) || (alen > 2)) {
 246                 printf("%s(): bogus address length %x\n", __FUNCTION__, alen);
 247                 return(1);
 248         }
 249         if (len < 0) {
 250                 printf("%s(): bogus length %x\n", __FUNCTION__, len);
 251                 return(1);
 252         }
 253
 254         if (wait_for_bus()) {return(1);}
 255
 256         /* Start address phase */
 257         tmp = I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX | I2C_CON_STP;
 258         REG(I2C_CNT) = (alen == 0) ? len & 0xffff : (len & 0xffff) + alen;
 259         REG(I2C_SA) = chip;
 260         REG(I2C_CON) = tmp;
 261
 262         switch (alen) {
 263                 case 2:
 264                         /* Send address MSByte */
 265                         tmp = poll_i2c_irq(I2C_STAT_XRDY | I2C_STAT_NACK);
 266
 267                         CHECK_NACK();
 268
 269                         if (tmp & I2C_STAT_XRDY) {
 270                                 REG(I2C_DXR) = (addr >> 8) & 0xff;
 271                         } else {
 272                                 REG(I2C_CON) = 0;
 273                                 return(1);
 274                         }
 275                         /* No break, fall through */
 276                 case 1:
 277                         /* Send address LSByte */
 278                         tmp = poll_i2c_irq(I2C_STAT_XRDY | I2C_STAT_NACK);
 279
 280                         CHECK_NACK();
 281
 282                         if (tmp & I2C_STAT_XRDY) {
 283                                 REG(I2C_DXR) = addr & 0xff;
 284                         } else {
 285                                 REG(I2C_CON) = 0;
 286                                 return(1);
 287                         }
 288         }
 289
 290         for (i = 0; i < len; i++) {
 291                 tmp = poll_i2c_irq(I2C_STAT_XRDY | I2C_STAT_NACK);
 292
 293                 CHECK_NACK();
 294
 295                 if (tmp & I2C_STAT_XRDY) {
 296                         REG(I2C_DXR) = buf[i];
 297                 } else {
 298                         return(1);
 299                 }
 300         }
 301
 302         tmp = poll_i2c_irq(I2C_STAT_SCD | I2C_STAT_NACK);
 303
 304         CHECK_NACK();
 305
 306         if (!(tmp & I2C_STAT_SCD)) {
 307                 REG(I2C_CON) = 0;
 308                 return(1);
 309         }
 310
 311         flush_rx();
 312         REG(I2C_STAT) = 0xffff;
 313         REG(I2C_CNT) = 0;
 314         REG(I2C_CON) = 0;
 315
 316         return(0);
 317 }