2 * (C) Copyright 2004-2014
3 * Texas Instruments, <www.ti.com>
5 * Some changes copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
7 * SPDX-License-Identifier: GPL-2.0+
9 #ifndef _DAVINCI_I2C_H_
10 #define _DAVINCI_I2C_H_
15 #define I2C_OA (I2C_BASE + 0x00)
16 #define I2C_IE (I2C_BASE + 0x04)
17 #define I2C_STAT (I2C_BASE + 0x08)
18 #define I2C_SCLL (I2C_BASE + 0x0c)
19 #define I2C_SCLH (I2C_BASE + 0x10)
20 #define I2C_CNT (I2C_BASE + 0x14)
21 #define I2C_DRR (I2C_BASE + 0x18)
22 #define I2C_SA (I2C_BASE + 0x1c)
23 #define I2C_DXR (I2C_BASE + 0x20)
24 #define I2C_CON (I2C_BASE + 0x24)
25 #define I2C_IV (I2C_BASE + 0x28)
26 #define I2C_PSC (I2C_BASE + 0x30)
30 /* I2C Interrupt Enable Register (I2C_IE): */
31 #define I2C_IE_SCD_IE (1 << 5) /* Stop condition detect interrupt enable */
32 #define I2C_IE_XRDY_IE (1 << 4) /* Transmit data ready interrupt enable */
33 #define I2C_IE_RRDY_IE (1 << 3) /* Receive data ready interrupt enable */
34 #define I2C_IE_ARDY_IE (1 << 2) /* Register access ready interrupt enable */
35 #define I2C_IE_NACK_IE (1 << 1) /* No acknowledgment interrupt enable */
36 #define I2C_IE_AL_IE (1 << 0) /* Arbitration lost interrupt enable */
38 /* I2C Status Register (I2C_STAT): */
40 #define I2C_STAT_BB (1 << 12) /* Bus busy */
41 #define I2C_STAT_ROVR (1 << 11) /* Receive overrun */
42 #define I2C_STAT_XUDF (1 << 10) /* Transmit underflow */
43 #define I2C_STAT_AAS (1 << 9) /* Address as slave */
44 #define I2C_STAT_SCD (1 << 5) /* Stop condition detect */
45 #define I2C_STAT_XRDY (1 << 4) /* Transmit data ready */
46 #define I2C_STAT_RRDY (1 << 3) /* Receive data ready */
47 #define I2C_STAT_ARDY (1 << 2) /* Register access ready */
48 #define I2C_STAT_NACK (1 << 1) /* No acknowledgment interrupt enable */
49 #define I2C_STAT_AL (1 << 0) /* Arbitration lost interrupt enable */
51 /* I2C Interrupt Code Register (I2C_INTCODE): */
53 #define I2C_INTCODE_MASK 7
54 #define I2C_INTCODE_NONE 0
55 #define I2C_INTCODE_AL 1 /* Arbitration lost */
56 #define I2C_INTCODE_NAK 2 /* No acknowledgement/general call */
57 #define I2C_INTCODE_ARDY 3 /* Register access ready */
58 #define I2C_INTCODE_RRDY 4 /* Rcv data ready */
59 #define I2C_INTCODE_XRDY 5 /* Xmit data ready */
60 #define I2C_INTCODE_SCD 6 /* Stop condition detect */
62 /* I2C Configuration Register (I2C_CON): */
64 #define I2C_CON_EN (1 << 5) /* I2C module enable */
65 #define I2C_CON_STB (1 << 4) /* Start byte mode (master mode only) */
66 #define I2C_CON_MST (1 << 10) /* Master/slave mode */
67 #define I2C_CON_TRX (1 << 9) /* Tx/Rx mode (master mode only) */
68 #define I2C_CON_XA (1 << 8) /* Expand address */
69 #define I2C_CON_STP (1 << 11) /* Stop condition (master mode only) */
70 #define I2C_CON_STT (1 << 13) /* Start condition (master mode only) */
71 #define I2C_CON_FREE (1 << 14) /* Free run on emulation */
73 #define I2C_TIMEOUT 0xffff0000 /* Timeout mask for poll_i2c_irq() */