3 * Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arsenio@tin.it
5 * (C) Copyright 2000 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
6 * Marius Groeger <mgroeger@sysgo.de>
8 * (C) Copyright 2003 Pengutronix e.K.
9 * Robert Schwebel <r.schwebel@pengutronix.de>
11 * (C) Copyright 2011 Marvell Inc.
12 * Lei Wen <leiwen@marvell.com>
14 * SPDX-License-Identifier: GPL-2.0+
16 * Back ported to the 8xx platform (from the 8260 platform) by
17 * Murray.Jensen@cmst.csiro.au, 27-Jan-01.
23 #ifdef CONFIG_HARD_I2C
27 /* All transfers are described by this data structure */
47 static struct mv_i2c *base;
48 static void i2c_board_init(struct mv_i2c *base)
50 #ifdef CONFIG_SYS_I2C_INIT_BOARD
53 * call board specific i2c bus reset routine before accessing the
54 * environment, which might be in a chip on that bus. For details
55 * about this problem see doc/I2C_Edge_Conditions.
57 * disable I2C controller first, otherwhise it thinks we want to
58 * talk to the slave port...
60 icr = readl(&base->icr);
61 writel(readl(&base->icr) & ~(ICR_SCLE | ICR_IUE), &base->icr);
65 writel(icr, &base->icr);
69 #ifdef CONFIG_I2C_MULTI_BUS
70 static unsigned long i2c_regs[CONFIG_MV_I2C_NUM] = CONFIG_MV_I2C_REG;
71 static unsigned int bus_initialized[CONFIG_MV_I2C_NUM];
72 static unsigned int current_bus;
74 int i2c_set_bus_num(unsigned int bus)
76 if ((bus < 0) || (bus >= CONFIG_MV_I2C_NUM)) {
77 printf("Bad bus: %d\n", bus);
81 base = (struct mv_i2c *)i2c_regs[bus];
84 if (!bus_initialized[current_bus]) {
86 bus_initialized[current_bus] = 1;
92 unsigned int i2c_get_bus_num(void)
99 * i2c_reset: - reset the host controller
102 static void i2c_reset(void)
104 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */
105 writel(readl(&base->icr) | ICR_UR, &base->icr); /* reset the unit */
107 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */
111 writel(CONFIG_SYS_I2C_SLAVE, &base->isar); /* set our slave address */
112 writel(I2C_ICR_INIT, &base->icr); /* set control reg values */
113 writel(I2C_ISR_INIT, &base->isr); /* set clear interrupt bits */
114 writel(readl(&base->icr) | ICR_IUE, &base->icr); /* enable unit */
119 * i2c_isr_set_cleared: - wait until certain bits of the I2C status register
120 * are set and cleared
122 * @return: 1 in case of success, 0 means timeout (no match within 10 ms).
124 static int i2c_isr_set_cleared(unsigned long set_mask,
125 unsigned long cleared_mask)
127 int timeout = 1000, isr;
130 isr = readl(&base->isr);
134 } while (((isr & set_mask) != set_mask)
135 || ((isr & cleared_mask) != 0));
141 * i2c_transfer: - Transfer one byte over the i2c bus
143 * This function can tranfer a byte over the i2c bus in both directions.
144 * It is used by the public API functions.
146 * @return: 0: transfer successful
147 * -1: message is empty
148 * -2: transmit timeout
150 * -4: receive timeout
151 * -5: illegal parameters
152 * -6: bus is busy and couldn't be aquired
154 int i2c_transfer(struct mv_i2c_msg *msg)
159 goto transfer_error_msg_empty;
161 switch (msg->direction) {
163 /* check if bus is not busy */
164 if (!i2c_isr_set_cleared(0, ISR_IBB))
165 goto transfer_error_bus_busy;
167 /* start transmission */
168 writel(readl(&base->icr) & ~ICR_START, &base->icr);
169 writel(readl(&base->icr) & ~ICR_STOP, &base->icr);
170 writel(msg->data, &base->idbr);
171 if (msg->condition == I2C_COND_START)
172 writel(readl(&base->icr) | ICR_START, &base->icr);
173 if (msg->condition == I2C_COND_STOP)
174 writel(readl(&base->icr) | ICR_STOP, &base->icr);
175 if (msg->acknack == I2C_ACKNAK_SENDNAK)
176 writel(readl(&base->icr) | ICR_ACKNAK, &base->icr);
177 if (msg->acknack == I2C_ACKNAK_SENDACK)
178 writel(readl(&base->icr) & ~ICR_ACKNAK, &base->icr);
179 writel(readl(&base->icr) & ~ICR_ALDIE, &base->icr);
180 writel(readl(&base->icr) | ICR_TB, &base->icr);
182 /* transmit register empty? */
183 if (!i2c_isr_set_cleared(ISR_ITE, 0))
184 goto transfer_error_transmit_timeout;
186 /* clear 'transmit empty' state */
187 writel(readl(&base->isr) | ISR_ITE, &base->isr);
189 /* wait for ACK from slave */
190 if (msg->acknack == I2C_ACKNAK_WAITACK)
191 if (!i2c_isr_set_cleared(0, ISR_ACKNAK))
192 goto transfer_error_ack_missing;
197 /* check if bus is not busy */
198 if (!i2c_isr_set_cleared(0, ISR_IBB))
199 goto transfer_error_bus_busy;
202 writel(readl(&base->icr) & ~ICR_START, &base->icr);
203 writel(readl(&base->icr) & ~ICR_STOP, &base->icr);
204 if (msg->condition == I2C_COND_START)
205 writel(readl(&base->icr) | ICR_START, &base->icr);
206 if (msg->condition == I2C_COND_STOP)
207 writel(readl(&base->icr) | ICR_STOP, &base->icr);
208 if (msg->acknack == I2C_ACKNAK_SENDNAK)
209 writel(readl(&base->icr) | ICR_ACKNAK, &base->icr);
210 if (msg->acknack == I2C_ACKNAK_SENDACK)
211 writel(readl(&base->icr) & ~ICR_ACKNAK, &base->icr);
212 writel(readl(&base->icr) & ~ICR_ALDIE, &base->icr);
213 writel(readl(&base->icr) | ICR_TB, &base->icr);
215 /* receive register full? */
216 if (!i2c_isr_set_cleared(ISR_IRF, 0))
217 goto transfer_error_receive_timeout;
219 msg->data = readl(&base->idbr);
221 /* clear 'receive empty' state */
222 writel(readl(&base->isr) | ISR_IRF, &base->isr);
225 goto transfer_error_illegal_param;
230 transfer_error_msg_empty:
231 debug("i2c_transfer: error: 'msg' is empty\n");
233 goto i2c_transfer_finish;
235 transfer_error_transmit_timeout:
236 debug("i2c_transfer: error: transmit timeout\n");
238 goto i2c_transfer_finish;
240 transfer_error_ack_missing:
241 debug("i2c_transfer: error: ACK missing\n");
243 goto i2c_transfer_finish;
245 transfer_error_receive_timeout:
246 debug("i2c_transfer: error: receive timeout\n");
248 goto i2c_transfer_finish;
250 transfer_error_illegal_param:
251 debug("i2c_transfer: error: illegal parameters\n");
253 goto i2c_transfer_finish;
255 transfer_error_bus_busy:
256 debug("i2c_transfer: error: bus is busy\n");
258 goto i2c_transfer_finish;
261 debug("i2c_transfer: ISR: 0x%04x\n", readl(&base->isr));
266 /* ------------------------------------------------------------------------ */
268 /* ------------------------------------------------------------------------ */
269 void i2c_init(int speed, int slaveaddr)
271 #ifdef CONFIG_I2C_MULTI_BUS
273 base = (struct mv_i2c *)i2c_regs[current_bus];
275 base = (struct mv_i2c *)CONFIG_MV_I2C_REG;
278 i2c_board_init(base);
282 * i2c_probe: - Test if a chip answers for a given i2c address
284 * @chip: address of the chip which is searched for
285 * @return: 0 if a chip was found, -1 otherwhise
287 int i2c_probe(uchar chip)
289 struct mv_i2c_msg msg;
293 msg.condition = I2C_COND_START;
294 msg.acknack = I2C_ACKNAK_WAITACK;
295 msg.direction = I2C_WRITE;
296 msg.data = (chip << 1) + 1;
297 if (i2c_transfer(&msg))
300 msg.condition = I2C_COND_STOP;
301 msg.acknack = I2C_ACKNAK_SENDNAK;
302 msg.direction = I2C_READ;
304 if (i2c_transfer(&msg))
311 * i2c_read: - Read multiple bytes from an i2c device
313 * The higher level routines take into account that this function is only
314 * called with len < page length of the device (see configuration file)
316 * @chip: address of the chip which is to be read
317 * @addr: i2c data address within the chip
318 * @alen: length of the i2c data address (1..2 bytes)
319 * @buffer: where to write the data
320 * @len: how much byte do we want to read
321 * @return: 0 in case of success
323 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
325 struct mv_i2c_msg msg;
326 u8 addr_bytes[3]; /* lowest...highest byte of data address */
328 debug("i2c_read(chip=0x%02x, addr=0x%02x, alen=0x%02x, "
329 "len=0x%02x)\n", chip, addr, alen, len);
333 /* dummy chip address write */
334 debug("i2c_read: dummy chip address write\n");
335 msg.condition = I2C_COND_START;
336 msg.acknack = I2C_ACKNAK_WAITACK;
337 msg.direction = I2C_WRITE;
338 msg.data = (chip << 1);
340 if (i2c_transfer(&msg))
344 * send memory address bytes;
345 * alen defines how much bytes we have to send.
347 /*addr &= ((1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)-1); */
348 addr_bytes[0] = (u8)((addr >> 0) & 0x000000FF);
349 addr_bytes[1] = (u8)((addr >> 8) & 0x000000FF);
350 addr_bytes[2] = (u8)((addr >> 16) & 0x000000FF);
352 while (--alen >= 0) {
353 debug("i2c_read: send memory word address byte %1d\n", alen);
354 msg.condition = I2C_COND_NORMAL;
355 msg.acknack = I2C_ACKNAK_WAITACK;
356 msg.direction = I2C_WRITE;
357 msg.data = addr_bytes[alen];
358 if (i2c_transfer(&msg))
362 /* start read sequence */
363 debug("i2c_read: start read sequence\n");
364 msg.condition = I2C_COND_START;
365 msg.acknack = I2C_ACKNAK_WAITACK;
366 msg.direction = I2C_WRITE;
367 msg.data = (chip << 1);
369 if (i2c_transfer(&msg))
372 /* read bytes; send NACK at last byte */
375 msg.condition = I2C_COND_STOP;
376 msg.acknack = I2C_ACKNAK_SENDNAK;
378 msg.condition = I2C_COND_NORMAL;
379 msg.acknack = I2C_ACKNAK_SENDACK;
382 msg.direction = I2C_READ;
384 if (i2c_transfer(&msg))
388 debug("i2c_read: reading byte (0x%08x)=0x%02x\n",
389 (unsigned int)buffer, *buffer);
399 * i2c_write: - Write multiple bytes to an i2c device
401 * The higher level routines take into account that this function is only
402 * called with len < page length of the device (see configuration file)
404 * @chip: address of the chip which is to be written
405 * @addr: i2c data address within the chip
406 * @alen: length of the i2c data address (1..2 bytes)
407 * @buffer: where to find the data to be written
408 * @len: how much byte do we want to read
409 * @return: 0 in case of success
411 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
413 struct mv_i2c_msg msg;
414 u8 addr_bytes[3]; /* lowest...highest byte of data address */
416 debug("i2c_write(chip=0x%02x, addr=0x%02x, alen=0x%02x, "
417 "len=0x%02x)\n", chip, addr, alen, len);
421 /* chip address write */
422 debug("i2c_write: chip address write\n");
423 msg.condition = I2C_COND_START;
424 msg.acknack = I2C_ACKNAK_WAITACK;
425 msg.direction = I2C_WRITE;
426 msg.data = (chip << 1);
428 if (i2c_transfer(&msg))
432 * send memory address bytes;
433 * alen defines how much bytes we have to send.
435 addr_bytes[0] = (u8)((addr >> 0) & 0x000000FF);
436 addr_bytes[1] = (u8)((addr >> 8) & 0x000000FF);
437 addr_bytes[2] = (u8)((addr >> 16) & 0x000000FF);
439 while (--alen >= 0) {
440 debug("i2c_write: send memory word address\n");
441 msg.condition = I2C_COND_NORMAL;
442 msg.acknack = I2C_ACKNAK_WAITACK;
443 msg.direction = I2C_WRITE;
444 msg.data = addr_bytes[alen];
445 if (i2c_transfer(&msg))
449 /* write bytes; send NACK at last byte */
451 debug("i2c_write: writing byte (0x%08x)=0x%02x\n",
452 (unsigned int)buffer, *buffer);
455 msg.condition = I2C_COND_STOP;
457 msg.condition = I2C_COND_NORMAL;
459 msg.acknack = I2C_ACKNAK_WAITACK;
460 msg.direction = I2C_WRITE;
461 msg.data = *(buffer++);
463 if (i2c_transfer(&msg))
471 #endif /* CONFIG_HARD_I2C */