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[u-boot] / drivers / i2c / omap24xx_i2c.c
1 /*
2  * Basic I2C functions
3  *
4  * Copyright (c) 2004 Texas Instruments
5  *
6  * This package is free software;  you can redistribute it and/or
7  * modify it under the terms of the license found in the file
8  * named COPYING that should have accompanied this file.
9  *
10  * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
11  * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
12  * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
13  *
14  * Author: Jian Zhang jzhang@ti.com, Texas Instruments
15  *
16  * Copyright (c) 2003 Wolfgang Denk, wd@denx.de
17  * Rewritten to fit into the current U-Boot framework
18  *
19  * Adapted for OMAP2420 I2C, r-woodruff2@ti.com
20  *
21  */
22
23 #include <common.h>
24
25 #include <asm/arch/i2c.h>
26 #include <asm/io.h>
27
28 #include "omap24xx_i2c.h"
29
30 DECLARE_GLOBAL_DATA_PTR;
31
32 #define I2C_TIMEOUT     1000
33
34 static void wait_for_bb(void);
35 static u16 wait_for_pin(void);
36 static void flush_fifo(void);
37
38 /*
39  * For SPL boot some boards need i2c before SDRAM is initialised so force
40  * variables to live in SRAM
41  */
42 static struct i2c __attribute__((section (".data"))) *i2c_base =
43                                         (struct i2c *)I2C_DEFAULT_BASE;
44 static unsigned int __attribute__((section (".data"))) bus_initialized[I2C_BUS_MAX] =
45                                         { [0 ... (I2C_BUS_MAX-1)] = 0 };
46 static unsigned int __attribute__((section (".data"))) current_bus = 0;
47
48 void i2c_init(int speed, int slaveadd)
49 {
50         int psc, fsscll, fssclh;
51         int hsscll = 0, hssclh = 0;
52         u32 scll, sclh;
53         int timeout = I2C_TIMEOUT;
54
55         /* Only handle standard, fast and high speeds */
56         if ((speed != OMAP_I2C_STANDARD) &&
57             (speed != OMAP_I2C_FAST_MODE) &&
58             (speed != OMAP_I2C_HIGH_SPEED)) {
59                 printf("Error : I2C unsupported speed %d\n", speed);
60                 return;
61         }
62
63         psc = I2C_IP_CLK / I2C_INTERNAL_SAMPLING_CLK;
64         psc -= 1;
65         if (psc < I2C_PSC_MIN) {
66                 printf("Error : I2C unsupported prescalar %d\n", psc);
67                 return;
68         }
69
70         if (speed == OMAP_I2C_HIGH_SPEED) {
71                 /* High speed */
72
73                 /* For first phase of HS mode */
74                 fsscll = fssclh = I2C_INTERNAL_SAMPLING_CLK /
75                         (2 * OMAP_I2C_FAST_MODE);
76
77                 fsscll -= I2C_HIGHSPEED_PHASE_ONE_SCLL_TRIM;
78                 fssclh -= I2C_HIGHSPEED_PHASE_ONE_SCLH_TRIM;
79                 if (((fsscll < 0) || (fssclh < 0)) ||
80                     ((fsscll > 255) || (fssclh > 255))) {
81                         puts("Error : I2C initializing first phase clock\n");
82                         return;
83                 }
84
85                 /* For second phase of HS mode */
86                 hsscll = hssclh = I2C_INTERNAL_SAMPLING_CLK / (2 * speed);
87
88                 hsscll -= I2C_HIGHSPEED_PHASE_TWO_SCLL_TRIM;
89                 hssclh -= I2C_HIGHSPEED_PHASE_TWO_SCLH_TRIM;
90                 if (((fsscll < 0) || (fssclh < 0)) ||
91                     ((fsscll > 255) || (fssclh > 255))) {
92                         puts("Error : I2C initializing second phase clock\n");
93                         return;
94                 }
95
96                 scll = (unsigned int)hsscll << 8 | (unsigned int)fsscll;
97                 sclh = (unsigned int)hssclh << 8 | (unsigned int)fssclh;
98
99         } else {
100                 /* Standard and fast speed */
101                 fsscll = fssclh = I2C_INTERNAL_SAMPLING_CLK / (2 * speed);
102
103                 fsscll -= I2C_FASTSPEED_SCLL_TRIM;
104                 fssclh -= I2C_FASTSPEED_SCLH_TRIM;
105                 if (((fsscll < 0) || (fssclh < 0)) ||
106                     ((fsscll > 255) || (fssclh > 255))) {
107                         puts("Error : I2C initializing clock\n");
108                         return;
109                 }
110
111                 scll = (unsigned int)fsscll;
112                 sclh = (unsigned int)fssclh;
113         }
114
115         if (readw(&i2c_base->con) & I2C_CON_EN) {
116                 writew(0, &i2c_base->con);
117                 udelay(50000);
118         }
119
120         writew(0x2, &i2c_base->sysc); /* for ES2 after soft reset */
121         udelay(1000);
122
123         writew(I2C_CON_EN, &i2c_base->con);
124         while (!(readw(&i2c_base->syss) & I2C_SYSS_RDONE) && timeout--) {
125                 if (timeout <= 0) {
126                         puts("ERROR: Timeout in soft-reset\n");
127                         return;
128                 }
129                 udelay(1000);
130         }
131
132         writew(0, &i2c_base->con);
133         writew(psc, &i2c_base->psc);
134         writew(scll, &i2c_base->scll);
135         writew(sclh, &i2c_base->sclh);
136
137         /* own address */
138         writew(slaveadd, &i2c_base->oa);
139         writew(I2C_CON_EN, &i2c_base->con);
140
141         /* have to enable intrrupts or OMAP i2c module doesn't work */
142         writew(I2C_IE_XRDY_IE | I2C_IE_RRDY_IE | I2C_IE_ARDY_IE |
143                 I2C_IE_NACK_IE | I2C_IE_AL_IE, &i2c_base->ie);
144         udelay(1000);
145         flush_fifo();
146         writew(0xFFFF, &i2c_base->stat);
147         writew(0, &i2c_base->cnt);
148
149         if (gd->flags & GD_FLG_RELOC)
150                 bus_initialized[current_bus] = 1;
151 }
152
153 static int i2c_read_byte(u8 devaddr, u16 regoffset, u8 alen, u8 *value)
154 {
155         int i2c_error = 0;
156         u16 status;
157         int i = 2 - alen;
158         u8 tmpbuf[2] = {(regoffset) >> 8, regoffset & 0xff};
159         u16 w;
160
161         /* wait until bus not busy */
162         wait_for_bb();
163
164         /* one byte only */
165         writew(alen, &i2c_base->cnt);
166         /* set slave address */
167         writew(devaddr, &i2c_base->sa);
168         /* no stop bit needed here */
169         writew(I2C_CON_EN | I2C_CON_MST | I2C_CON_STT |
170               I2C_CON_TRX, &i2c_base->con);
171
172         /* send register offset */
173         while (1) {
174                 status = wait_for_pin();
175                 if (status == 0 || status & I2C_STAT_NACK) {
176                         i2c_error = 1;
177                         goto read_exit;
178                 }
179                 if (status & I2C_STAT_XRDY) {
180                         w = tmpbuf[i++];
181 #if !(defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) || \
182         defined(CONFIG_OMAP44XX) || defined(CONFIG_AM33XX) || \
183         defined(CONFIG_OMAP54XX))
184                         w |= tmpbuf[i++] << 8;
185 #endif
186                         writew(w, &i2c_base->data);
187                         writew(I2C_STAT_XRDY, &i2c_base->stat);
188                 }
189                 if (status & I2C_STAT_ARDY) {
190                         writew(I2C_STAT_ARDY, &i2c_base->stat);
191                         break;
192                 }
193         }
194
195         /* set slave address */
196         writew(devaddr, &i2c_base->sa);
197         /* read one byte from slave */
198         writew(1, &i2c_base->cnt);
199         /* need stop bit here */
200         writew(I2C_CON_EN | I2C_CON_MST |
201                 I2C_CON_STT | I2C_CON_STP,
202                 &i2c_base->con);
203
204         /* receive data */
205         while (1) {
206                 status = wait_for_pin();
207                 if (status == 0 || status & I2C_STAT_NACK) {
208                         i2c_error = 1;
209                         goto read_exit;
210                 }
211                 if (status & I2C_STAT_RRDY) {
212 #if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) || \
213         defined(CONFIG_OMAP44XX) || defined(CONFIG_AM33XX) || \
214         defined(CONFIG_OMAP54XX)
215                         *value = readb(&i2c_base->data);
216 #else
217                         *value = readw(&i2c_base->data);
218 #endif
219                         writew(I2C_STAT_RRDY, &i2c_base->stat);
220                 }
221                 if (status & I2C_STAT_ARDY) {
222                         writew(I2C_STAT_ARDY, &i2c_base->stat);
223                         break;
224                 }
225         }
226
227 read_exit:
228         flush_fifo();
229         writew(0xFFFF, &i2c_base->stat);
230         writew(0, &i2c_base->cnt);
231         return i2c_error;
232 }
233
234 static void flush_fifo(void)
235 {       u16 stat;
236
237         /* note: if you try and read data when its not there or ready
238          * you get a bus error
239          */
240         while (1) {
241                 stat = readw(&i2c_base->stat);
242                 if (stat == I2C_STAT_RRDY) {
243 #if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) || \
244         defined(CONFIG_OMAP44XX) || defined(CONFIG_AM33XX) || \
245         defined(CONFIG_OMAP54XX)
246                         readb(&i2c_base->data);
247 #else
248                         readw(&i2c_base->data);
249 #endif
250                         writew(I2C_STAT_RRDY, &i2c_base->stat);
251                         udelay(1000);
252                 } else
253                         break;
254         }
255 }
256
257 int i2c_probe(uchar chip)
258 {
259         u16 status;
260         int res = 1; /* default = fail */
261
262         if (chip == readw(&i2c_base->oa))
263                 return res;
264
265         /* wait until bus not busy */
266         wait_for_bb();
267
268         /* try to read one byte */
269         writew(1, &i2c_base->cnt);
270         /* set slave address */
271         writew(chip, &i2c_base->sa);
272         /* stop bit needed here */
273         writew (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_STP, &i2c_base->con);
274
275         while (1) {
276                 status = wait_for_pin();
277                 if (status == 0 || status & I2C_STAT_AL) {
278                         res = 1;
279                         goto probe_exit;
280                 }
281                 if (status & I2C_STAT_NACK) {
282                         res = 1;
283                         writew(0xff, &i2c_base->stat);
284                         writew (readw (&i2c_base->con) | I2C_CON_STP, &i2c_base->con);
285                         wait_for_bb ();
286                         break;
287                 }
288                 if (status & I2C_STAT_ARDY) {
289                         writew(I2C_STAT_ARDY, &i2c_base->stat);
290                         break;
291                 }
292                 if (status & I2C_STAT_RRDY) {
293                         res = 0;
294 #if defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) || \
295         defined(CONFIG_OMAP44XX) || defined(CONFIG_AM33XX) || \
296         defined(CONFIG_OMAP54XX)
297                         readb(&i2c_base->data);
298 #else
299                         readw(&i2c_base->data);
300 #endif
301                         writew(I2C_STAT_RRDY, &i2c_base->stat);
302                 }
303         }
304
305 probe_exit:
306         flush_fifo();
307         /* don't allow any more data in... we don't want it. */
308         writew(0, &i2c_base->cnt);
309         writew(0xFFFF, &i2c_base->stat);
310         return res;
311 }
312
313 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
314 {
315         int i;
316
317         if (alen > 2) {
318                 printf("I2C read: addr len %d not supported\n", alen);
319                 return 1;
320         }
321
322         if (addr + len > (1 << 16)) {
323                 puts("I2C read: address out of range\n");
324                 return 1;
325         }
326
327         for (i = 0; i < len; i++) {
328                 if (i2c_read_byte(chip, addr + i, alen, &buffer[i])) {
329                         puts("I2C read: I/O error\n");
330                         i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
331                         return 1;
332                 }
333         }
334
335         return 0;
336 }
337
338 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
339 {
340         int i;
341         u16 status;
342         int i2c_error = 0;
343         u16 w;
344         u8 tmpbuf[2] = {addr >> 8, addr & 0xff};
345
346         if (alen > 2) {
347                 printf("I2C write: addr len %d not supported\n", alen);
348                 return 1;
349         }
350
351         if (addr + len > (1 << 16)) {
352                 printf("I2C write: address 0x%x + 0x%x out of range\n",
353                                 addr, len);
354                 return 1;
355         }
356
357         /* wait until bus not busy */
358         wait_for_bb();
359
360         /* start address phase - will write regoffset + len bytes data */
361         /* TODO consider case when !CONFIG_OMAP243X/34XX/44XX */
362         writew(alen + len, &i2c_base->cnt);
363         /* set slave address */
364         writew(chip, &i2c_base->sa);
365         /* stop bit needed here */
366         writew(I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX |
367                 I2C_CON_STP, &i2c_base->con);
368
369         /* Send address and data */
370         for (i = -alen; i < len; i++) {
371                 status = wait_for_pin();
372
373                 if (status == 0 || status & I2C_STAT_NACK) {
374                         i2c_error = 1;
375                         printf("i2c error waiting for data ACK (status=0x%x)\n",
376                                         status);
377                         goto write_exit;
378                 }
379
380                 if (status & I2C_STAT_XRDY) {
381                         w = (i < 0) ? tmpbuf[2+i] : buffer[i];
382 #if !(defined(CONFIG_OMAP243X) || defined(CONFIG_OMAP34XX) || \
383         defined(CONFIG_OMAP44XX) || defined(CONFIG_AM33XX) || \
384         defined(CONFIG_OMAP54XX))
385                         w |= ((++i < 0) ? tmpbuf[2+i] : buffer[i]) << 8;
386 #endif
387                         writew(w, &i2c_base->data);
388                         writew(I2C_STAT_XRDY, &i2c_base->stat);
389                 } else {
390                         i2c_error = 1;
391                         printf("i2c bus not ready for Tx (i=%d)\n", i);
392                         goto write_exit;
393                 }
394         }
395
396 write_exit:
397         flush_fifo();
398         writew(0xFFFF, &i2c_base->stat);
399         return i2c_error;
400 }
401
402 static void wait_for_bb(void)
403 {
404         int timeout = I2C_TIMEOUT;
405         u16 stat;
406
407         writew(0xFFFF, &i2c_base->stat);        /* clear current interrupts...*/
408         while ((stat = readw(&i2c_base->stat) & I2C_STAT_BB) && timeout--) {
409                 writew(stat, &i2c_base->stat);
410                 udelay(1000);
411         }
412
413         if (timeout <= 0) {
414                 printf("timed out in wait_for_bb: I2C_STAT=%x\n",
415                         readw(&i2c_base->stat));
416         }
417         writew(0xFFFF, &i2c_base->stat);         /* clear delayed stuff*/
418 }
419
420 static u16 wait_for_pin(void)
421 {
422         u16 status;
423         int timeout = I2C_TIMEOUT;
424
425         do {
426                 udelay(1000);
427                 status = readw(&i2c_base->stat);
428         } while (!(status &
429                    (I2C_STAT_ROVR | I2C_STAT_XUDF | I2C_STAT_XRDY |
430                     I2C_STAT_RRDY | I2C_STAT_ARDY | I2C_STAT_NACK |
431                     I2C_STAT_AL)) && timeout--);
432
433         if (timeout <= 0) {
434                 printf("timed out in wait_for_pin: I2C_STAT=%x\n",
435                         readw(&i2c_base->stat));
436                 writew(0xFFFF, &i2c_base->stat);
437                 status = 0;
438         }
439
440         return status;
441 }
442
443 int i2c_set_bus_num(unsigned int bus)
444 {
445         if ((bus < 0) || (bus >= I2C_BUS_MAX)) {
446                 printf("Bad bus: %d\n", bus);
447                 return -1;
448         }
449
450 #if I2C_BUS_MAX == 4
451         if (bus == 3)
452                 i2c_base = (struct i2c *)I2C_BASE4;
453         else
454         if (bus == 2)
455                 i2c_base = (struct i2c *)I2C_BASE3;
456         else
457 #endif
458 #if I2C_BUS_MAX == 3
459         if (bus == 2)
460                 i2c_base = (struct i2c *)I2C_BASE3;
461         else
462 #endif
463         if (bus == 1)
464                 i2c_base = (struct i2c *)I2C_BASE2;
465         else
466                 i2c_base = (struct i2c *)I2C_BASE1;
467
468         current_bus = bus;
469
470         if (!bus_initialized[current_bus])
471                 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
472
473         return 0;
474 }
475
476 int i2c_get_bus_num(void)
477 {
478         return (int) current_bus;
479 }