2 * (C) Copyright 2001, 2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * SPDX-License-Identifier: GPL-2.0+
7 * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
8 * vanbaren@cideas.com. It was heavily influenced by LiMon, written by
13 #ifdef CONFIG_MPC8260 /* only valid for MPC8260 */
17 #if defined(CONFIG_AVR32)
18 #include <asm/arch/portmux.h>
20 #if defined(CONFIG_AT91FAMILY)
22 #include <asm/arch/hardware.h>
23 #include <asm/arch/at91_pio.h>
24 #ifdef CONFIG_AT91_LEGACY
25 #include <asm/arch/gpio.h>
28 #ifdef CONFIG_IXP425 /* only valid for IXP425 */
29 #include <asm/arch/ixp425.h>
31 #if defined(CONFIG_MPC852T) || defined(CONFIG_MPC866)
36 #if defined(CONFIG_SOFT_I2C_GPIO_SCL)
37 # include <asm/gpio.h>
39 # ifndef I2C_GPIO_SYNC
40 # define I2C_GPIO_SYNC
46 gpio_request(CONFIG_SOFT_I2C_GPIO_SCL, "soft_i2c"); \
47 gpio_request(CONFIG_SOFT_I2C_GPIO_SDA, "soft_i2c"); \
52 # define I2C_ACTIVE do { } while (0)
56 # define I2C_TRISTATE do { } while (0)
60 # define I2C_READ gpio_get_value(CONFIG_SOFT_I2C_GPIO_SDA)
64 # define I2C_SDA(bit) \
67 gpio_direction_input(CONFIG_SOFT_I2C_GPIO_SDA); \
69 gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SDA, 0); \
75 # define I2C_SCL(bit) \
77 gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SCL, bit); \
83 # define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
88 /* #define DEBUG_I2C */
91 DECLARE_GLOBAL_DATA_PTR;
94 /*-----------------------------------------------------------------------
100 #define I2C_ACK 0 /* PD_SDA level to ack a byte */
101 #define I2C_NOACK 1 /* PD_SDA level to noack a byte */
105 #define PRINTD(fmt,args...) do { \
106 printf (fmt ,##args); \
109 #define PRINTD(fmt,args...)
112 #if defined(CONFIG_I2C_MULTI_BUS)
113 static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = 0;
114 #endif /* CONFIG_I2C_MULTI_BUS */
116 /*-----------------------------------------------------------------------
119 #if !defined(CONFIG_SYS_I2C_INIT_BOARD)
120 static void send_reset (void);
122 static void send_start (void);
123 static void send_stop (void);
124 static void send_ack (int);
125 static int write_byte (uchar byte);
126 static uchar read_byte (int);
128 #if !defined(CONFIG_SYS_I2C_INIT_BOARD)
129 /*-----------------------------------------------------------------------
130 * Send a reset sequence consisting of 9 clocks with the data signal high
131 * to clock any confused device back into an idle state. Also send a
132 * <stop> at the end of the sequence for belts & suspenders.
134 static void send_reset(void)
136 I2C_SOFT_DECLARATIONS /* intentional without ';' */
145 for(j = 0; j < 9; j++) {
158 /*-----------------------------------------------------------------------
159 * START: High -> Low on SDA while SCL is High
161 static void send_start(void)
163 I2C_SOFT_DECLARATIONS /* intentional without ';' */
175 /*-----------------------------------------------------------------------
176 * STOP: Low -> High on SDA while SCL is High
178 static void send_stop(void)
180 I2C_SOFT_DECLARATIONS /* intentional without ';' */
194 /*-----------------------------------------------------------------------
195 * ack should be I2C_ACK or I2C_NOACK
197 static void send_ack(int ack)
199 I2C_SOFT_DECLARATIONS /* intentional without ';' */
213 /*-----------------------------------------------------------------------
214 * Send 8 bits and look for an acknowledgement.
216 static int write_byte(uchar data)
218 I2C_SOFT_DECLARATIONS /* intentional without ';' */
223 for(j = 0; j < 8; j++) {
226 I2C_SDA(data & 0x80);
236 * Look for an <ACK>(negative logic) and return it.
251 return(nack); /* not a nack is an ack */
254 #if defined(CONFIG_I2C_MULTI_BUS)
256 * Functions for multiple I2C bus handling
258 unsigned int i2c_get_bus_num(void)
263 int i2c_set_bus_num(unsigned int bus)
265 #if defined(CONFIG_I2C_MUX)
266 if (bus < CONFIG_SYS_MAX_I2C_BUS) {
271 ret = i2x_mux_select_mux(bus);
279 if (bus >= CONFIG_SYS_MAX_I2C_BUS)
287 /*-----------------------------------------------------------------------
288 * if ack == I2C_ACK, ACK the byte so can continue reading, else
289 * send I2C_NOACK to end the read.
291 static uchar read_byte(int ack)
293 I2C_SOFT_DECLARATIONS /* intentional without ';' */
298 * Read 8 bits, MSB first.
303 for(j = 0; j < 8; j++) {
317 /*=====================================================================*/
318 /* Public Functions */
319 /*=====================================================================*/
321 /*-----------------------------------------------------------------------
324 void i2c_init (int speed, int slaveaddr)
326 #if defined(CONFIG_SYS_I2C_INIT_BOARD)
327 /* call board specific i2c bus reset routine before accessing the */
328 /* environment, which might be in a chip on that bus. For details */
329 /* about this problem see doc/I2C_Edge_Conditions. */
333 * WARNING: Do NOT save speed in a static variable: if the
334 * I2C routines are called before RAM is initialized (to read
335 * the DIMM SPD, for instance), RAM won't be usable and your
342 /*-----------------------------------------------------------------------
343 * Probe to see if a chip is present. Also good for checking for the
344 * completion of EEPROM writes since the chip stops responding until
345 * the write completes (typically 10mSec).
347 int i2c_probe(uchar addr)
352 * perform 1 byte write transaction with just address byte
356 rc = write_byte ((addr << 1) | 0);
362 /*-----------------------------------------------------------------------
365 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
368 PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
369 chip, addr, alen, buffer, len);
371 #ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
373 * EEPROM chips that implement "address overflow" are ones
374 * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
375 * address and the extra bits end up in the "chip address"
376 * bit slots. This makes a 24WC08 (1Kbyte) chip look like
377 * four 256 byte chips.
379 * Note that we consider the length of the address field to
380 * still be one byte because the extra address bits are
381 * hidden in the chip address.
383 chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
385 PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
390 * Do the addressing portion of a write cycle to set the
391 * chip's address pointer. If the address length is zero,
392 * don't do the normal write cycle to set the address pointer,
393 * there is no address pointer in this chip.
397 if(write_byte(chip << 1)) { /* write cycle */
399 PRINTD("i2c_read, no chip responded %02X\n", chip);
402 shift = (alen-1) * 8;
404 if(write_byte(addr >> shift)) {
405 PRINTD("i2c_read, address not <ACK>ed\n");
411 /* Some I2C chips need a stop/start sequence here,
412 * other chips don't work with a full stop and need
413 * only a start. Default behaviour is to send the
414 * stop/start sequence.
416 #ifdef CONFIG_SOFT_I2C_READ_REPEATED_START
424 * Send the chip address again, this time for a read cycle.
425 * Then read the data. On the last byte, we do a NACK instead
426 * of an ACK(len == 0) to terminate the read.
428 write_byte((chip << 1) | 1); /* read cycle */
430 *buffer++ = read_byte(len == 0);
436 /*-----------------------------------------------------------------------
439 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
441 int shift, failures = 0;
443 PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
444 chip, addr, alen, buffer, len);
447 if(write_byte(chip << 1)) { /* write cycle */
449 PRINTD("i2c_write, no chip responded %02X\n", chip);
452 shift = (alen-1) * 8;
454 if(write_byte(addr >> shift)) {
455 PRINTD("i2c_write, address not <ACK>ed\n");
462 if(write_byte(*buffer++)) {