2 * (C) Copyright 2001, 2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
24 * vanbaren@cideas.com. It was heavily influenced by LiMon, written by
29 #ifdef CONFIG_MPC8260 /* only valid for MPC8260 */
33 #ifdef CONFIG_AT91RM9200 /* need this for the at91rm9200 */
35 #include <asm/arch/hardware.h>
37 #ifdef CONFIG_IXP425 /* only valid for IXP425 */
38 #include <asm/arch/ixp425.h>
41 #include <asm/arch/hardware.h>
43 #if defined(CONFIG_MPC852T) || defined(CONFIG_MPC866)
48 /* #define DEBUG_I2C */
51 DECLARE_GLOBAL_DATA_PTR;
54 /*-----------------------------------------------------------------------
60 #define I2C_ACK 0 /* PD_SDA level to ack a byte */
61 #define I2C_NOACK 1 /* PD_SDA level to noack a byte */
65 #define PRINTD(fmt,args...) do { \
66 if (gd->have_console) \
67 printf (fmt ,##args); \
70 #define PRINTD(fmt,args...)
73 #if defined(CONFIG_I2C_MULTI_BUS)
74 static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = 0;
75 #endif /* CONFIG_I2C_MULTI_BUS */
77 /*-----------------------------------------------------------------------
80 #if !defined(CONFIG_SYS_I2C_INIT_BOARD)
81 static void send_reset (void);
83 static void send_start (void);
84 static void send_stop (void);
85 static void send_ack (int);
86 static int write_byte (uchar byte);
87 static uchar read_byte (int);
89 #if !defined(CONFIG_SYS_I2C_INIT_BOARD)
90 /*-----------------------------------------------------------------------
91 * Send a reset sequence consisting of 9 clocks with the data signal high
92 * to clock any confused device back into an idle state. Also send a
93 * <stop> at the end of the sequence for belts & suspenders.
95 static void send_reset(void)
97 I2C_SOFT_DECLARATIONS /* intentional without ';' */
106 for(j = 0; j < 9; j++) {
119 /*-----------------------------------------------------------------------
120 * START: High -> Low on SDA while SCL is High
122 static void send_start(void)
124 I2C_SOFT_DECLARATIONS /* intentional without ';' */
136 /*-----------------------------------------------------------------------
137 * STOP: Low -> High on SDA while SCL is High
139 static void send_stop(void)
141 I2C_SOFT_DECLARATIONS /* intentional without ';' */
155 /*-----------------------------------------------------------------------
156 * ack should be I2C_ACK or I2C_NOACK
158 static void send_ack(int ack)
160 I2C_SOFT_DECLARATIONS /* intentional without ';' */
174 /*-----------------------------------------------------------------------
175 * Send 8 bits and look for an acknowledgement.
177 static int write_byte(uchar data)
179 I2C_SOFT_DECLARATIONS /* intentional without ';' */
184 for(j = 0; j < 8; j++) {
187 I2C_SDA(data & 0x80);
197 * Look for an <ACK>(negative logic) and return it.
212 return(nack); /* not a nack is an ack */
215 #if defined(CONFIG_I2C_MULTI_BUS)
217 * Functions for multiple I2C bus handling
219 unsigned int i2c_get_bus_num(void)
224 int i2c_set_bus_num(unsigned int bus)
226 #if defined(CONFIG_I2C_MUX)
227 if (bus < CONFIG_SYS_MAX_I2C_BUS) {
232 ret = i2x_mux_select_mux(bus);
239 if (bus >= CONFIG_SYS_MAX_I2C_BUS)
247 /*-----------------------------------------------------------------------
248 * if ack == I2C_ACK, ACK the byte so can continue reading, else
249 * send I2C_NOACK to end the read.
251 static uchar read_byte(int ack)
253 I2C_SOFT_DECLARATIONS /* intentional without ';' */
258 * Read 8 bits, MSB first.
263 for(j = 0; j < 8; j++) {
277 /*=====================================================================*/
278 /* Public Functions */
279 /*=====================================================================*/
281 /*-----------------------------------------------------------------------
284 void i2c_init (int speed, int slaveaddr)
286 #if defined(CONFIG_SYS_I2C_INIT_BOARD)
287 /* call board specific i2c bus reset routine before accessing the */
288 /* environment, which might be in a chip on that bus. For details */
289 /* about this problem see doc/I2C_Edge_Conditions. */
293 * WARNING: Do NOT save speed in a static variable: if the
294 * I2C routines are called before RAM is initialized (to read
295 * the DIMM SPD, for instance), RAM won't be usable and your
302 /*-----------------------------------------------------------------------
303 * Probe to see if a chip is present. Also good for checking for the
304 * completion of EEPROM writes since the chip stops responding until
305 * the write completes (typically 10mSec).
307 int i2c_probe(uchar addr)
312 * perform 1 byte write transaction with just address byte
316 rc = write_byte ((addr << 1) | 0);
322 /*-----------------------------------------------------------------------
325 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
328 PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
329 chip, addr, alen, buffer, len);
331 #ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
333 * EEPROM chips that implement "address overflow" are ones
334 * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
335 * address and the extra bits end up in the "chip address"
336 * bit slots. This makes a 24WC08 (1Kbyte) chip look like
337 * four 256 byte chips.
339 * Note that we consider the length of the address field to
340 * still be one byte because the extra address bits are
341 * hidden in the chip address.
343 chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
345 PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
350 * Do the addressing portion of a write cycle to set the
351 * chip's address pointer. If the address length is zero,
352 * don't do the normal write cycle to set the address pointer,
353 * there is no address pointer in this chip.
357 if(write_byte(chip << 1)) { /* write cycle */
359 PRINTD("i2c_read, no chip responded %02X\n", chip);
362 shift = (alen-1) * 8;
364 if(write_byte(addr >> shift)) {
365 PRINTD("i2c_read, address not <ACK>ed\n");
371 /* Some I2C chips need a stop/start sequence here,
372 * other chips don't work with a full stop and need
373 * only a start. Default behaviour is to send the
374 * stop/start sequence.
376 #ifdef CONFIG_SOFT_I2C_READ_REPEATED_START
384 * Send the chip address again, this time for a read cycle.
385 * Then read the data. On the last byte, we do a NACK instead
386 * of an ACK(len == 0) to terminate the read.
388 write_byte((chip << 1) | 1); /* read cycle */
390 *buffer++ = read_byte(len == 0);
396 /*-----------------------------------------------------------------------
399 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
401 int shift, failures = 0;
403 PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
404 chip, addr, alen, buffer, len);
407 if(write_byte(chip << 1)) { /* write cycle */
409 PRINTD("i2c_write, no chip responded %02X\n", chip);
412 shift = (alen-1) * 8;
414 if(write_byte(addr >> shift)) {
415 PRINTD("i2c_write, address not <ACK>ed\n");
422 if(write_byte(*buffer++)) {