2 * Copyright 2008-2011 Freescale Semiconductor, Inc.
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 #include <asm/fsl_law.h>
30 DECLARE_GLOBAL_DATA_PTR;
32 /* number of LAWs in the hw implementation */
33 #if defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
34 defined(CONFIG_MPC8560) || defined(CONFIG_MPC8555)
35 #define FSL_HW_NUM_LAWS 8
36 #elif defined(CONFIG_MPC8548) || defined(CONFIG_MPC8544) || \
37 defined(CONFIG_MPC8568) || defined(CONFIG_MPC8569) || \
38 defined(CONFIG_MPC8641) || defined(CONFIG_MPC8610)
39 #define FSL_HW_NUM_LAWS 10
40 #elif defined(CONFIG_MPC8536) || defined(CONFIG_MPC8572) || \
41 defined(CONFIG_P1010) || defined(CONFIG_P1014) || \
42 defined(CONFIG_P1011) || defined(CONFIG_P1020) || \
43 defined(CONFIG_P1012) || defined(CONFIG_P1021) || \
44 defined(CONFIG_P1013) || defined(CONFIG_P1022) || \
45 defined(CONFIG_P2010) || defined(CONFIG_P2020)
46 #define FSL_HW_NUM_LAWS 12
47 #elif defined(CONFIG_PPC_P3041) || defined(CONFIG_PPC_P4080) || \
48 defined(CONFIG_PPC_P5020)
49 #define FSL_HW_NUM_LAWS 32
51 #error FSL_HW_NUM_LAWS not defined for this platform
54 #ifdef CONFIG_FSL_CORENET
55 #define LAW_BASE (CONFIG_SYS_FSL_CORENET_CCM_ADDR)
56 #define LAWAR_ADDR(x) (&((ccsr_local_t *)LAW_BASE)->law[x].lawar)
57 #define LAWBARH_ADDR(x) (&((ccsr_local_t *)LAW_BASE)->law[x].lawbarh)
58 #define LAWBARL_ADDR(x) (&((ccsr_local_t *)LAW_BASE)->law[x].lawbarl)
59 #define LAWBAR_SHIFT 0
61 #define LAW_BASE (CONFIG_SYS_IMMR + 0xc08)
62 #define LAWAR_ADDR(x) ((u32 *)LAW_BASE + 8 * x + 2)
63 #define LAWBAR_ADDR(x) ((u32 *)LAW_BASE + 8 * x)
64 #define LAWBAR_SHIFT 12
68 static inline phys_addr_t get_law_base_addr(int idx)
70 #ifdef CONFIG_FSL_CORENET
72 ((u64)in_be32(LAWBARH_ADDR(idx)) << 32) |
73 in_be32(LAWBARL_ADDR(idx));
75 return (phys_addr_t)in_be32(LAWBAR_ADDR(idx)) << LAWBAR_SHIFT;
79 static inline void set_law_base_addr(int idx, phys_addr_t addr)
81 #ifdef CONFIG_FSL_CORENET
82 out_be32(LAWBARL_ADDR(idx), addr & 0xffffffff);
83 out_be32(LAWBARH_ADDR(idx), (u64)addr >> 32);
85 out_be32(LAWBAR_ADDR(idx), addr >> LAWBAR_SHIFT);
89 void set_law(u8 idx, phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
91 gd->used_laws |= (1 << idx);
93 out_be32(LAWAR_ADDR(idx), 0);
94 set_law_base_addr(idx, addr);
95 out_be32(LAWAR_ADDR(idx), LAW_EN | ((u32)id << 20) | (u32)sz);
97 /* Read back so that we sync the writes */
98 in_be32(LAWAR_ADDR(idx));
101 void disable_law(u8 idx)
103 gd->used_laws &= ~(1 << idx);
105 out_be32(LAWAR_ADDR(idx), 0);
106 set_law_base_addr(idx, 0);
108 /* Read back so that we sync the writes */
109 in_be32(LAWAR_ADDR(idx));
114 #ifndef CONFIG_NAND_SPL
115 static int get_law_entry(u8 i, struct law_entry *e)
119 lawar = in_be32(LAWAR_ADDR(i));
121 if (!(lawar & LAW_EN))
124 e->addr = get_law_base_addr(i);
125 e->size = lawar & 0x3f;
126 e->trgt_id = (lawar >> 20) & 0xff;
132 int set_next_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
134 u32 idx = ffz(gd->used_laws);
136 if (idx >= FSL_HW_NUM_LAWS)
139 set_law(idx, addr, sz, id);
144 #ifndef CONFIG_NAND_SPL
145 int set_last_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
149 /* we have no LAWs free */
150 if (gd->used_laws == -1)
153 /* grab the last free law */
154 idx = __ilog2(~(gd->used_laws));
156 if (idx >= FSL_HW_NUM_LAWS)
159 set_law(idx, addr, sz, id);
164 struct law_entry find_law(phys_addr_t addr)
166 struct law_entry entry;
174 for (i = 0; i < FSL_HW_NUM_LAWS; i++) {
177 if (!get_law_entry(i, &entry))
180 upper = entry.addr + (2ull << entry.size);
181 if ((addr >= entry.addr) && (addr < upper)) {
190 void print_laws(void)
195 printf("\nLocal Access Window Configuration\n");
196 for (i = 0; i < FSL_HW_NUM_LAWS; i++) {
197 lawar = in_be32(LAWAR_ADDR(i));
198 #ifdef CONFIG_FSL_CORENET
199 printf("LAWBARH%02d: 0x%08x LAWBARL%02d: 0x%08x",
200 i, in_be32(LAWBARH_ADDR(i)),
201 i, in_be32(LAWBARL_ADDR(i)));
203 printf("LAWBAR%02d: 0x%08x", i, in_be32(LAWBAR_ADDR(i)));
205 printf(" LAWAR0x%02d: 0x%08x\n", i, lawar);
206 printf("\t(EN: %d TGT: 0x%02x SIZE: ",
207 (lawar & LAW_EN) ? 1 : 0, (lawar >> 20) & 0xff);
208 print_size(lawar_size(lawar), ")\n");
214 /* use up to 2 LAWs for DDR, used the last available LAWs */
215 int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id)
217 u64 start_align, law_sz;
221 start_align = 1ull << (LAW_SIZE_32G + 1);
223 start_align = 1ull << (ffs64(start) - 1);
224 law_sz = min(start_align, sz);
225 law_sz_enc = __ilog2_u64(law_sz) - 1;
227 if (set_last_law(start, law_sz_enc, id) < 0)
230 /* recalculate size based on what was actually covered by the law */
231 law_sz = 1ull << __ilog2_u64(law_sz);
233 /* do we still have anything to map */
238 start_align = 1ull << (ffs64(start) - 1);
239 law_sz = min(start_align, sz);
240 law_sz_enc = __ilog2_u64(law_sz) - 1;
242 if (set_last_law(start, law_sz_enc, id) < 0)
248 /* do we still have anything to map */
261 #if FSL_HW_NUM_LAWS < 32
262 gd->used_laws = ~((1 << FSL_HW_NUM_LAWS) - 1);
263 #elif FSL_HW_NUM_LAWS == 32
266 #error FSL_HW_NUM_LAWS can not be greater than 32 w/o code changes
269 for (i = 0; i < num_law_entries; i++) {
270 if (law_table[i].index == -1)
271 set_next_law(law_table[i].addr, law_table[i].size,
272 law_table[i].trgt_id);
274 set_law(law_table[i].index, law_table[i].addr,
275 law_table[i].size, law_table[i].trgt_id);