2 * Copyright 2008-2010 Freescale Semiconductor, Inc.
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 #include <asm/fsl_law.h>
30 DECLARE_GLOBAL_DATA_PTR;
32 /* number of LAWs in the hw implementation */
33 #if defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
34 defined(CONFIG_MPC8560) || defined(CONFIG_MPC8555)
35 #define FSL_HW_NUM_LAWS 8
36 #elif defined(CONFIG_MPC8548) || defined(CONFIG_MPC8544) || \
37 defined(CONFIG_MPC8568) || defined(CONFIG_MPC8569) || \
38 defined(CONFIG_MPC8641) || defined(CONFIG_MPC8610)
39 #define FSL_HW_NUM_LAWS 10
40 #elif defined(CONFIG_MPC8536) || defined(CONFIG_MPC8572) || \
41 defined(CONFIG_P1011) || defined(CONFIG_P1020) || \
42 defined(CONFIG_P1012) || defined(CONFIG_P1021) || \
43 defined(CONFIG_P1013) || defined(CONFIG_P1022) || \
44 defined(CONFIG_P2010) || defined(CONFIG_P2020)
45 #define FSL_HW_NUM_LAWS 12
46 #elif defined(CONFIG_PPC_P4080)
47 #define FSL_HW_NUM_LAWS 32
49 #error FSL_HW_NUM_LAWS not defined for this platform
52 #ifdef CONFIG_FSL_CORENET
53 #define LAW_BASE (CONFIG_SYS_FSL_CORENET_CCM_ADDR)
54 #define LAWAR_ADDR(x) (&((ccsr_local_t *)LAW_BASE)->law[x].lawar)
55 #define LAWBARH_ADDR(x) (&((ccsr_local_t *)LAW_BASE)->law[x].lawbarh)
56 #define LAWBARL_ADDR(x) (&((ccsr_local_t *)LAW_BASE)->law[x].lawbarl)
57 #define LAWBAR_SHIFT 0
59 #define LAW_BASE (CONFIG_SYS_IMMR + 0xc08)
60 #define LAWAR_ADDR(x) ((u32 *)LAW_BASE + 8 * x + 2)
61 #define LAWBAR_ADDR(x) ((u32 *)LAW_BASE + 8 * x)
62 #define LAWBAR_SHIFT 12
66 static inline phys_addr_t get_law_base_addr(int idx)
68 #ifdef CONFIG_FSL_CORENET
70 ((u64)in_be32(LAWBARH_ADDR(idx)) << 32) |
71 in_be32(LAWBARL_ADDR(idx));
73 return (phys_addr_t)in_be32(LAWBAR_ADDR(idx)) << LAWBAR_SHIFT;
77 static inline void set_law_base_addr(int idx, phys_addr_t addr)
79 #ifdef CONFIG_FSL_CORENET
80 out_be32(LAWBARL_ADDR(idx), addr & 0xffffffff);
81 out_be32(LAWBARH_ADDR(idx), (u64)addr >> 32);
83 out_be32(LAWBAR_ADDR(idx), addr >> LAWBAR_SHIFT);
87 void set_law(u8 idx, phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
89 gd->used_laws |= (1 << idx);
91 out_be32(LAWAR_ADDR(idx), 0);
92 set_law_base_addr(idx, addr);
93 out_be32(LAWAR_ADDR(idx), LAW_EN | ((u32)id << 20) | (u32)sz);
95 /* Read back so that we sync the writes */
96 in_be32(LAWAR_ADDR(idx));
99 void disable_law(u8 idx)
101 gd->used_laws &= ~(1 << idx);
103 out_be32(LAWAR_ADDR(idx), 0);
104 set_law_base_addr(idx, 0);
106 /* Read back so that we sync the writes */
107 in_be32(LAWAR_ADDR(idx));
112 #ifndef CONFIG_NAND_SPL
113 static int get_law_entry(u8 i, struct law_entry *e)
117 lawar = in_be32(LAWAR_ADDR(i));
119 if (!(lawar & LAW_EN))
122 e->addr = get_law_base_addr(i);
123 e->size = lawar & 0x3f;
124 e->trgt_id = (lawar >> 20) & 0xff;
130 int set_next_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
132 u32 idx = ffz(gd->used_laws);
134 if (idx >= FSL_HW_NUM_LAWS)
137 set_law(idx, addr, sz, id);
142 #ifndef CONFIG_NAND_SPL
143 int set_last_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
147 /* we have no LAWs free */
148 if (gd->used_laws == -1)
151 /* grab the last free law */
152 idx = __ilog2(~(gd->used_laws));
154 if (idx >= FSL_HW_NUM_LAWS)
157 set_law(idx, addr, sz, id);
162 struct law_entry find_law(phys_addr_t addr)
164 struct law_entry entry;
172 for (i = 0; i < FSL_HW_NUM_LAWS; i++) {
175 if (!get_law_entry(i, &entry))
178 upper = entry.addr + (2ull << entry.size);
179 if ((addr >= entry.addr) && (addr < upper)) {
188 void print_laws(void)
193 printf("\nLocal Access Window Configuration\n");
194 for (i = 0; i < FSL_HW_NUM_LAWS; i++) {
195 lawar = in_be32(LAWAR_ADDR(i));
196 #ifdef CONFIG_FSL_CORENET
197 printf("LAWBARH%02d: 0x%08x LAWBARL%02d: 0x%08x",
198 i, in_be32(LAWBARH_ADDR(i)),
199 i, in_be32(LAWBARL_ADDR(i)));
201 printf("LAWBAR%02d: 0x%08x", i, in_be32(LAWBAR_ADDR(i)));
203 printf(" LAWAR0x%02d: 0x%08x\n", i, lawar);
204 printf("\t(EN: %d TGT: 0x%02x SIZE: ",
205 (lawar & LAW_EN) ? 1 : 0, (lawar >> 20) & 0xff);
206 print_size(lawar_size(lawar), ")\n");
212 /* use up to 2 LAWs for DDR, used the last available LAWs */
213 int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id)
215 u64 start_align, law_sz;
219 start_align = 1ull << (LAW_SIZE_32G + 1);
221 start_align = 1ull << (ffs64(start) - 1);
222 law_sz = min(start_align, sz);
223 law_sz_enc = __ilog2_u64(law_sz) - 1;
225 if (set_last_law(start, law_sz_enc, id) < 0)
228 /* recalculate size based on what was actually covered by the law */
229 law_sz = 1ull << __ilog2_u64(law_sz);
231 /* do we still have anything to map */
236 start_align = 1ull << (ffs64(start) - 1);
237 law_sz = min(start_align, sz);
238 law_sz_enc = __ilog2_u64(law_sz) - 1;
240 if (set_last_law(start, law_sz_enc, id) < 0)
246 /* do we still have anything to map */
259 #if FSL_HW_NUM_LAWS < 32
260 gd->used_laws = ~((1 << FSL_HW_NUM_LAWS) - 1);
261 #elif FSL_HW_NUM_LAWS == 32
264 #error FSL_HW_NUM_LAWS can not be greater than 32 w/o code changes
267 for (i = 0; i < num_law_entries; i++) {
268 if (law_table[i].index == -1)
269 set_next_law(law_table[i].addr, law_table[i].size,
270 law_table[i].trgt_id);
272 set_law(law_table[i].index, law_table[i].addr,
273 law_table[i].size, law_table[i].trgt_id);