3 * Rob Emanuele <rob@emanuele.us>
4 * Reinhard Meyer, EMK Elektronik <reinhard.meyer@emk-elektronik.de>
7 * Copyright (C) 2004-2006 Atmel Corporation
9 * SPDX-License-Identifier: GPL-2.0+
19 #include <linux/errno.h>
20 #include <asm/byteorder.h>
21 #include <asm/arch/clk.h>
22 #include <asm/arch/hardware.h>
23 #include "atmel_mci.h"
25 #ifndef CONFIG_SYS_MMC_CLK_OD
26 # define CONFIG_SYS_MMC_CLK_OD 150000
29 #define MMC_DEFAULT_BLKLEN 512
31 #if defined(CONFIG_ATMEL_MCI_PORTB)
38 struct atmel_mci_plat {
40 struct mmc_config cfg;
41 struct atmel_mci *mci;
45 struct atmel_mci_priv {
47 struct mmc_config cfg;
48 struct atmel_mci *mci;
50 unsigned int initialized:1;
51 unsigned int curr_clk;
57 /* Read Atmel MCI IP version */
58 static unsigned int atmel_mci_get_version(struct atmel_mci *mci)
60 return readl(&mci->version) & 0x00000fff;
64 * Print command and status:
66 * - always when DEBUG is defined
69 static void dump_cmd(u32 cmdr, u32 arg, u32 status, const char* msg)
71 debug("gen_atmel_mci: CMDR %08x (%2u) ARGR %08x (SR: %08x) %s\n",
72 cmdr, cmdr & 0x3F, arg, status, msg);
75 static inline void mci_set_blklen(atmel_mci_t *mci, int blklen)
77 unsigned int version = atmel_mci_get_version(mci);
81 /* MCI IP version >= 0x200 has blkr */
83 writel(MMCI_BFINS(BLKLEN, blklen, readl(&mci->blkr)),
86 writel(MMCI_BFINS(BLKLEN, blklen, readl(&mci->mr)), &mci->mr);
89 /* Setup for MCI Clock and Block Size */
91 static void mci_set_mode(struct udevice *dev, u32 hz, u32 blklen)
93 struct atmel_mci_plat *plat = dev_get_platdata(dev);
94 struct atmel_mci_priv *priv = dev_get_priv(dev);
95 struct mmc *mmc = &plat->mmc;
96 u32 bus_hz = priv->bus_clk_rate;
97 atmel_mci_t *mci = plat->mci;
99 static void mci_set_mode(struct mmc *mmc, u32 hz, u32 blklen)
101 struct atmel_mci_priv *priv = mmc->priv;
102 u32 bus_hz = get_mci_clk_rate();
103 atmel_mci_t *mci = priv->mci;
107 unsigned int version = atmel_mci_get_version(mci);
111 debug("mci: bus_hz is %u, setting clock %u Hz, block size %u\n",
114 if (version >= 0x500) {
115 clkdiv = DIV_ROUND_UP(bus_hz, hz) - 2;
122 debug("mci: setting clock %u Hz, block size %u\n",
123 bus_hz / (clkdiv * 2 + clkodd + 2), blklen);
125 /* find clkdiv yielding a rate <= than requested */
126 for (clkdiv = 0; clkdiv < 255; clkdiv++) {
127 if ((bus_hz / (clkdiv + 1) / 2) <= hz)
130 debug("mci: setting clock %u Hz, block size %u\n",
131 (bus_hz / (clkdiv + 1)) / 2, blklen);
135 if (version >= 0x500)
136 priv->curr_clk = bus_hz / (clkdiv * 2 + clkodd + 2);
138 priv->curr_clk = (bus_hz / (clkdiv + 1)) / 2;
140 mr = MMCI_BF(CLKDIV, clkdiv);
142 /* MCI IP version >= 0x200 has R/WPROOF */
143 if (version >= 0x200)
144 mr |= MMCI_BIT(RDPROOF) | MMCI_BIT(WRPROOF);
147 * MCI IP version >= 0x500 use bit 16 as clkodd.
148 * MCI IP version < 0x500 use upper 16 bits for blklen.
150 if (version >= 0x500)
151 mr |= MMCI_BF(CLKODD, clkodd);
153 writel(mr, &mci->mr);
155 mci_set_blklen(mci, blklen);
157 if (mmc->card_caps & mmc->cfg->host_caps & MMC_MODE_HS)
158 writel(MMCI_BIT(HSMODE), &mci->cfg);
160 priv->initialized = 1;
163 /* Return the CMDR with flags for a given command and data packet */
164 static u32 mci_encode_cmd(
165 struct mmc_cmd *cmd, struct mmc_data *data, u32* error_flags)
169 /* Default Flags for Errors */
170 *error_flags |= (MMCI_BIT(DTOE) | MMCI_BIT(RDIRE) | MMCI_BIT(RENDE) |
171 MMCI_BIT(RINDE) | MMCI_BIT(RTOE));
173 /* Default Flags for the Command */
174 cmdr |= MMCI_BIT(MAXLAT);
177 cmdr |= MMCI_BF(TRCMD, 1);
178 if (data->blocks > 1)
179 cmdr |= MMCI_BF(TRTYP, 1);
180 if (data->flags & MMC_DATA_READ)
181 cmdr |= MMCI_BIT(TRDIR);
184 if (cmd->resp_type & MMC_RSP_CRC)
185 *error_flags |= MMCI_BIT(RCRCE);
186 if (cmd->resp_type & MMC_RSP_136)
187 cmdr |= MMCI_BF(RSPTYP, 2);
188 else if (cmd->resp_type & MMC_RSP_BUSY)
189 cmdr |= MMCI_BF(RSPTYP, 3);
190 else if (cmd->resp_type & MMC_RSP_PRESENT)
191 cmdr |= MMCI_BF(RSPTYP, 1);
193 return cmdr | MMCI_BF(CMDNB, cmd->cmdidx);
196 /* Entered into function pointer in mci_send_cmd */
197 static u32 mci_data_read(atmel_mci_t *mci, u32* data, u32 error_flags)
202 status = readl(&mci->sr);
203 if (status & (error_flags | MMCI_BIT(OVRE)))
205 } while (!(status & MMCI_BIT(RXRDY)));
207 if (status & MMCI_BIT(RXRDY)) {
208 *data = readl(&mci->rdr);
215 /* Entered into function pointer in mci_send_cmd */
216 static u32 mci_data_write(atmel_mci_t *mci, u32* data, u32 error_flags)
221 status = readl(&mci->sr);
222 if (status & (error_flags | MMCI_BIT(UNRE)))
224 } while (!(status & MMCI_BIT(TXRDY)));
226 if (status & MMCI_BIT(TXRDY)) {
227 writel(*data, &mci->tdr);
235 * Entered into mmc structure during driver init
237 * Sends a command out on the bus and deals with the block data.
238 * Takes the mmc pointer, a command pointer, and an optional data pointer.
241 static int atmel_mci_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
242 struct mmc_data *data)
244 struct atmel_mci_plat *plat = dev_get_platdata(dev);
245 struct atmel_mci_priv *priv = dev_get_priv(dev);
246 atmel_mci_t *mci = plat->mci;
249 mci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
251 struct atmel_mci_priv *priv = mmc->priv;
252 atmel_mci_t *mci = priv->mci;
258 if (!priv->initialized) {
259 puts ("MCI not initialized!\n");
263 /* Figure out the transfer arguments */
264 cmdr = mci_encode_cmd(cmd, data, &error_flags);
266 mci_set_blklen(mci, data->blocksize);
268 /* For multi blocks read/write, set the block register */
269 if ((cmd->cmdidx == MMC_CMD_READ_MULTIPLE_BLOCK)
270 || (cmd->cmdidx == MMC_CMD_WRITE_MULTIPLE_BLOCK))
271 writel(data->blocks | MMCI_BF(BLKLEN, data->blocksize),
274 /* Send the command */
275 writel(cmd->cmdarg, &mci->argr);
276 writel(cmdr, &mci->cmdr);
279 dump_cmd(cmdr, cmd->cmdarg, 0, "DEBUG");
282 /* Wait for the command to complete */
283 while (!((status = readl(&mci->sr)) & MMCI_BIT(CMDRDY)));
285 if ((status & error_flags) & MMCI_BIT(RTOE)) {
286 dump_cmd(cmdr, cmd->cmdarg, status, "Command Time Out");
288 } else if (status & error_flags) {
289 dump_cmd(cmdr, cmd->cmdarg, status, "Command Failed");
293 /* Copy the response to the response buffer */
294 if (cmd->resp_type & MMC_RSP_136) {
295 cmd->response[0] = readl(&mci->rspr);
296 cmd->response[1] = readl(&mci->rspr1);
297 cmd->response[2] = readl(&mci->rspr2);
298 cmd->response[3] = readl(&mci->rspr3);
300 cmd->response[0] = readl(&mci->rspr);
302 /* transfer all of the blocks */
304 u32 word_count, block_count;
308 (atmel_mci_t *mci, u32* data, u32 error_flags);
310 if (data->flags & MMC_DATA_READ) {
311 mci_data_op = mci_data_read;
312 ioptr = (u32*)data->dest;
314 mci_data_op = mci_data_write;
315 ioptr = (u32*)data->src;
319 for (block_count = 0;
320 block_count < data->blocks && !status;
324 status = mci_data_op(mci, ioptr, error_flags);
327 } while (!status && word_count < (data->blocksize/4));
329 if (data->flags & MMC_DATA_READ)
331 u32 cnt = word_count * 4;
332 printf("Read Data:\n");
333 print_buffer(0, data->dest + cnt * block_count,
338 dump_cmd(cmdr, cmd->cmdarg, status,
339 "Data Transfer Failed");
344 /* Wait for Transfer End */
347 status = readl(&mci->sr);
349 if (status & error_flags) {
350 dump_cmd(cmdr, cmd->cmdarg, status,
355 } while ((status & MMCI_BIT(DTIP)) && i < 10000);
356 if (status & MMCI_BIT(DTIP)) {
357 dump_cmd(cmdr, cmd->cmdarg, status,
358 "XFER DTIP never unset, ignoring");
363 * After the switch command, wait for 8 clocks before the next
366 if (cmd->cmdidx == MMC_CMD_SWITCH)
367 udelay(8*1000000 / priv->curr_clk); /* 8 clk in us */
373 static int atmel_mci_set_ios(struct udevice *dev)
375 struct atmel_mci_plat *plat = dev_get_platdata(dev);
376 struct mmc *mmc = mmc_get_mmc_dev(dev);
377 atmel_mci_t *mci = plat->mci;
379 /* Entered into mmc structure during driver init */
380 static int mci_set_ios(struct mmc *mmc)
382 struct atmel_mci_priv *priv = mmc->priv;
383 atmel_mci_t *mci = priv->mci;
385 int bus_width = mmc->bus_width;
386 unsigned int version = atmel_mci_get_version(mci);
389 /* Set the clock speed */
391 mci_set_mode(dev, mmc->clock, MMC_DEFAULT_BLKLEN);
393 mci_set_mode(mmc, mmc->clock, MMC_DEFAULT_BLKLEN);
397 * set the bus width and select slot for this interface
398 * there is no capability for multiple slots on the same interface yet
400 if ((version & 0xf00) >= 0x300) {
413 writel(busw << 6 | MMCI_BF(SCDSEL, MCI_BUS), &mci->sdcr);
415 busw = (bus_width == 4) ? 1 : 0;
417 writel(busw << 7 | MMCI_BF(SCDSEL, MCI_BUS), &mci->sdcr);
424 static int atmel_mci_hw_init(struct udevice *dev)
426 struct atmel_mci_plat *plat = dev_get_platdata(dev);
427 atmel_mci_t *mci = plat->mci;
429 /* Entered into mmc structure during driver init */
430 static int mci_init(struct mmc *mmc)
432 struct atmel_mci_priv *priv = mmc->priv;
433 atmel_mci_t *mci = priv->mci;
436 /* Initialize controller */
437 writel(MMCI_BIT(SWRST), &mci->cr); /* soft reset */
438 writel(MMCI_BIT(PWSDIS), &mci->cr); /* disable power save */
439 writel(MMCI_BIT(MCIEN), &mci->cr); /* enable mci */
440 writel(MMCI_BF(SCDSEL, MCI_BUS), &mci->sdcr); /* select port */
442 /* This delay can be optimized, but stick with max value */
443 writel(0x7f, &mci->dtor);
444 /* Disable Interrupts */
445 writel(~0UL, &mci->idr);
447 /* Set default clocks and blocklen */
449 mci_set_mode(dev, CONFIG_SYS_MMC_CLK_OD, MMC_DEFAULT_BLKLEN);
451 mci_set_mode(mmc, CONFIG_SYS_MMC_CLK_OD, MMC_DEFAULT_BLKLEN);
457 #ifndef CONFIG_DM_MMC
458 static const struct mmc_ops atmel_mci_ops = {
459 .send_cmd = mci_send_cmd,
460 .set_ios = mci_set_ios,
465 * This is the only exported function
467 * Call it with the MCI register base address
469 int atmel_mci_init(void *regs)
472 struct mmc_config *cfg;
473 struct atmel_mci_priv *priv;
474 unsigned int version;
476 priv = calloc(1, sizeof(*priv));
483 cfg->ops = &atmel_mci_ops;
485 priv->mci = (struct atmel_mci *)regs;
486 priv->initialized = 0;
488 /* need to be able to pass these in on a board by board basis */
489 cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
490 version = atmel_mci_get_version(priv->mci);
491 if ((version & 0xf00) >= 0x300) {
492 cfg->host_caps = MMC_MODE_8BIT;
493 cfg->host_caps |= MMC_MODE_HS | MMC_MODE_HS_52MHz;
496 cfg->host_caps |= MMC_MODE_4BIT;
499 * min and max frequencies determined by
500 * max and min of clock divider
502 cfg->f_min = get_mci_clk_rate() / (2*256);
503 cfg->f_max = get_mci_clk_rate() / (2*1);
505 cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
507 mmc = mmc_create(cfg, priv);
513 /* NOTE: possibly leaking the priv structure */
520 static const struct dm_mmc_ops atmel_mci_mmc_ops = {
521 .send_cmd = atmel_mci_send_cmd,
522 .set_ios = atmel_mci_set_ios,
525 static void atmel_mci_setup_cfg(struct udevice *dev)
527 struct atmel_mci_plat *plat = dev_get_platdata(dev);
528 struct atmel_mci_priv *priv = dev_get_priv(dev);
529 struct mmc_config *cfg;
533 cfg->name = "Atmel mci";
534 cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
537 * If the version is above 3.0, the capabilities of the 8-bit
538 * bus width and high speed are supported.
540 version = atmel_mci_get_version(plat->mci);
541 if ((version & 0xf00) >= 0x300) {
542 cfg->host_caps = MMC_MODE_8BIT |
543 MMC_MODE_HS | MMC_MODE_HS_52MHz;
546 cfg->host_caps |= MMC_MODE_4BIT;
547 cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
548 cfg->f_min = priv->bus_clk_rate / (2 * 256);
549 cfg->f_max = priv->bus_clk_rate / 2;
552 static int atmel_mci_enable_clk(struct udevice *dev)
554 struct atmel_mci_priv *priv = dev_get_priv(dev);
559 ret = clk_get_by_index(dev, 0, &clk);
565 ret = clk_enable(&clk);
569 clk_rate = clk_get_rate(&clk);
575 priv->bus_clk_rate = clk_rate;
583 static int atmel_mci_probe(struct udevice *dev)
585 struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
586 struct atmel_mci_plat *plat = dev_get_platdata(dev);
590 ret = atmel_mci_enable_clk(dev);
594 plat->mci = (struct atmel_mci *)devfdt_get_addr_ptr(dev);
596 atmel_mci_setup_cfg(dev);
599 mmc->cfg = &plat->cfg;
603 atmel_mci_hw_init(dev);
608 static int atmel_mci_bind(struct udevice *dev)
610 struct atmel_mci_plat *plat = dev_get_platdata(dev);
612 return mmc_bind(dev, &plat->mmc, &plat->cfg);
615 static const struct udevice_id atmel_mci_ids[] = {
616 { .compatible = "atmel,hsmci" },
620 U_BOOT_DRIVER(atmel_mci) = {
623 .of_match = atmel_mci_ids,
624 .bind = atmel_mci_bind,
625 .probe = atmel_mci_probe,
626 .platdata_auto_alloc_size = sizeof(struct atmel_mci_plat),
627 .priv_auto_alloc_size = sizeof(struct atmel_mci_priv),
628 .ops = &atmel_mci_mmc_ops,