git.sur5r.net Git - u-boot/blob - drivers/mmc/rockchip_dw_mmc.c

   1 /*
   2  * Copyright (c) 2013 Google, Inc
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <common.h>
   8 #include <clk.h>
   9 #include <dm.h>
  10 #include <dt-structs.h>
  11 #include <dwmmc.h>
  12 #include <errno.h>
  13 #include <mapmem.h>
  14 #include <pwrseq.h>
  15 #include <syscon.h>
  16 #include <asm/gpio.h>
  17 #include <asm/arch/clock.h>
  18 #include <asm/arch/periph.h>
  19 #include <linux/err.h>
  20
  21 struct rockchip_mmc_plat {
  22 #if CONFIG_IS_ENABLED(OF_PLATDATA)
  23         struct dtd_rockchip_rk3288_dw_mshc dtplat;
  24 #endif
  25         struct mmc_config cfg;
  26         struct mmc mmc;
  27 };
  28
  29 struct rockchip_dwmmc_priv {
  30         struct clk clk;
  31         struct dwmci_host host;
  32         int fifo_depth;
  33         bool fifo_mode;
  34         u32 minmax[2];
  35 };
  36
  37 static uint rockchip_dwmmc_get_mmc_clk(struct dwmci_host *host, uint freq)
  38 {
  39         struct udevice *dev = host->priv;
  40         struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
  41         int ret;
  42
  43         ret = clk_set_rate(&priv->clk, freq);
  44         if (ret < 0) {
  45                 debug("%s: err=%d\n", __func__, ret);
  46                 return ret;
  47         }
  48
  49         return freq;
  50 }
  51
  52 static int rockchip_dwmmc_ofdata_to_platdata(struct udevice *dev)
  53 {
  54 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
  55         struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
  56         struct dwmci_host *host = &priv->host;
  57
  58         host->name = dev->name;
  59         host->ioaddr = dev_read_addr_ptr(dev);
  60         host->buswidth = dev_read_u32_default(dev, "bus-width", 4);
  61         host->get_mmc_clk = rockchip_dwmmc_get_mmc_clk;
  62         host->priv = dev;
  63
  64         /* use non-removeable as sdcard and emmc as judgement */
  65         if (dev_read_bool(dev, "non-removable"))
  66                 host->dev_index = 0;
  67         else
  68                 host->dev_index = 1;
  69
  70         priv->fifo_depth = dev_read_u32_default(dev, "fifo-depth", 0);
  71
  72         if (priv->fifo_depth < 0)
  73                 return -EINVAL;
  74         priv->fifo_mode = dev_read_bool(dev, "fifo-mode");
  75
  76         /*
  77          * 'clock-freq-min-max' is deprecated
  78          * (see https://github.com/torvalds/linux/commit/b023030f10573de738bbe8df63d43acab64c9f7b)
  79          */
  80         if (dev_read_u32_array(dev, "clock-freq-min-max", priv->minmax, 2)) {
  81                 int val = dev_read_u32_default(dev, "max-frequency", -EINVAL);
  82
  83                 if (val < 0)
  84                         return val;
  85
  86                 priv->minmax[0] = 400000;  /* 400 kHz */
  87                 priv->minmax[1] = val;
  88         } else {
  89                 debug("%s: 'clock-freq-min-max' property was deprecated.\n",
  90                       __func__);
  91         }
  92 #endif
  93         return 0;
  94 }
  95
  96 static int rockchip_dwmmc_probe(struct udevice *dev)
  97 {
  98         struct rockchip_mmc_plat *plat = dev_get_platdata(dev);
  99         struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
 100         struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
 101         struct dwmci_host *host = &priv->host;
 102         struct udevice *pwr_dev __maybe_unused;
 103         int ret;
 104
 105 #if CONFIG_IS_ENABLED(OF_PLATDATA)
 106         struct dtd_rockchip_rk3288_dw_mshc *dtplat = &plat->dtplat;
 107
 108         host->name = dev->name;
 109         host->ioaddr = map_sysmem(dtplat->reg[0], dtplat->reg[1]);
 110         host->buswidth = dtplat->bus_width;
 111         host->get_mmc_clk = rockchip_dwmmc_get_mmc_clk;
 112         host->priv = dev;
 113         host->dev_index = 0;
 114         priv->fifo_depth = dtplat->fifo_depth;
 115         priv->fifo_mode = 0;
 116         priv->minmax[0] = 400000;  /*  400 kHz */
 117         priv->minmax[1] = dtplat->max_frequency;
 118
 119         ret = clk_get_by_index_platdata(dev, 0, dtplat->clocks, &priv->clk);
 120         if (ret < 0)
 121                 return ret;
 122 #else
 123         ret = clk_get_by_index(dev, 0, &priv->clk);
 124         if (ret < 0)
 125                 return ret;
 126 #endif
 127         host->fifoth_val = MSIZE(0x2) |
 128                 RX_WMARK(priv->fifo_depth / 2 - 1) |
 129                 TX_WMARK(priv->fifo_depth / 2);
 130
 131         host->fifo_mode = priv->fifo_mode;
 132
 133 #ifdef CONFIG_PWRSEQ
 134         /* Enable power if needed */
 135         ret = uclass_get_device_by_phandle(UCLASS_PWRSEQ, dev, "mmc-pwrseq",
 136                                            &pwr_dev);
 137         if (!ret) {
 138                 ret = pwrseq_set_power(pwr_dev, true);
 139                 if (ret)
 140                         return ret;
 141         }
 142 #endif
 143         dwmci_setup_cfg(&plat->cfg, host, priv->minmax[1], priv->minmax[0]);
 144         host->mmc = &plat->mmc;
 145         host->mmc->priv = &priv->host;
 146         host->mmc->dev = dev;
 147         upriv->mmc = host->mmc;
 148
 149         return dwmci_probe(dev);
 150 }
 151
 152 static int rockchip_dwmmc_bind(struct udevice *dev)
 153 {
 154         struct rockchip_mmc_plat *plat = dev_get_platdata(dev);
 155
 156         return dwmci_bind(dev, &plat->mmc, &plat->cfg);
 157 }
 158
 159 static const struct udevice_id rockchip_dwmmc_ids[] = {
 160         { .compatible = "rockchip,rk3288-dw-mshc" },
 161         { }
 162 };
 163
 164 U_BOOT_DRIVER(rockchip_dwmmc_drv) = {
 165         .name           = "rockchip_rk3288_dw_mshc",
 166         .id             = UCLASS_MMC,
 167         .of_match       = rockchip_dwmmc_ids,
 168         .ofdata_to_platdata = rockchip_dwmmc_ofdata_to_platdata,
 169         .ops            = &dm_dwmci_ops,
 170         .bind           = rockchip_dwmmc_bind,
 171         .probe          = rockchip_dwmmc_probe,
 172         .priv_auto_alloc_size = sizeof(struct rockchip_dwmmc_priv),
 173         .platdata_auto_alloc_size = sizeof(struct rockchip_mmc_plat),
 174 };
 175
 176 #ifdef CONFIG_PWRSEQ
 177 static int rockchip_dwmmc_pwrseq_set_power(struct udevice *dev, bool enable)
 178 {
 179         struct gpio_desc reset;
 180         int ret;
 181
 182         ret = gpio_request_by_name(dev, "reset-gpios", 0, &reset, GPIOD_IS_OUT);
 183         if (ret)
 184                 return ret;
 185         dm_gpio_set_value(&reset, 1);
 186         udelay(1);
 187         dm_gpio_set_value(&reset, 0);
 188         udelay(200);
 189
 190         return 0;
 191 }
 192
 193 static const struct pwrseq_ops rockchip_dwmmc_pwrseq_ops = {
 194         .set_power      = rockchip_dwmmc_pwrseq_set_power,
 195 };
 196
 197 static const struct udevice_id rockchip_dwmmc_pwrseq_ids[] = {
 198         { .compatible = "mmc-pwrseq-emmc" },
 199         { }
 200 };
 201
 202 U_BOOT_DRIVER(rockchip_dwmmc_pwrseq_drv) = {
 203         .name           = "mmc_pwrseq_emmc",
 204         .id             = UCLASS_PWRSEQ,
 205         .of_match       = rockchip_dwmmc_pwrseq_ids,
 206         .ops            = &rockchip_dwmmc_pwrseq_ops,
 207 };
 208 #endif