git.sur5r.net Git - u-boot/blob - drivers/mmc/sdhci.c

   1 /*
   2  * Copyright 2011, Marvell Semiconductor Inc.
   3  * Lei Wen <leiwen@marvell.com>
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  *
   7  * Back ported to the 8xx platform (from the 8260 platform) by
   8  * Murray.Jensen@cmst.csiro.au, 27-Jan-01.
   9  */
  10
  11 #include <common.h>
  12 #include <errno.h>
  13 #include <malloc.h>
  14 #include <mmc.h>
  15 #include <sdhci.h>
  16
  17 #if defined(CONFIG_FIXED_SDHCI_ALIGNED_BUFFER)
  18 void *aligned_buffer = (void *)CONFIG_FIXED_SDHCI_ALIGNED_BUFFER;
  19 #else
  20 void *aligned_buffer;
  21 #endif
  22
  23 static void sdhci_reset(struct sdhci_host *host, u8 mask)
  24 {
  25         unsigned long timeout;
  26
  27         /* Wait max 100 ms */
  28         timeout = 100;
  29         sdhci_writeb(host, mask, SDHCI_SOFTWARE_RESET);
  30         while (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask) {
  31                 if (timeout == 0) {
  32                         printf("%s: Reset 0x%x never completed.\n",
  33                                __func__, (int)mask);
  34                         return;
  35                 }
  36                 timeout--;
  37                 udelay(1000);
  38         }
  39 }
  40
  41 static void sdhci_cmd_done(struct sdhci_host *host, struct mmc_cmd *cmd)
  42 {
  43         int i;
  44         if (cmd->resp_type & MMC_RSP_136) {
  45                 /* CRC is stripped so we need to do some shifting. */
  46                 for (i = 0; i < 4; i++) {
  47                         cmd->response[i] = sdhci_readl(host,
  48                                         SDHCI_RESPONSE + (3-i)*4) << 8;
  49                         if (i != 3)
  50                                 cmd->response[i] |= sdhci_readb(host,
  51                                                 SDHCI_RESPONSE + (3-i)*4-1);
  52                 }
  53         } else {
  54                 cmd->response[0] = sdhci_readl(host, SDHCI_RESPONSE);
  55         }
  56 }
  57
  58 static void sdhci_transfer_pio(struct sdhci_host *host, struct mmc_data *data)
  59 {
  60         int i;
  61         char *offs;
  62         for (i = 0; i < data->blocksize; i += 4) {
  63                 offs = data->dest + i;
  64                 if (data->flags == MMC_DATA_READ)
  65                         *(u32 *)offs = sdhci_readl(host, SDHCI_BUFFER);
  66                 else
  67                         sdhci_writel(host, *(u32 *)offs, SDHCI_BUFFER);
  68         }
  69 }
  70
  71 static int sdhci_transfer_data(struct sdhci_host *host, struct mmc_data *data,
  72                                 unsigned int start_addr)
  73 {
  74         unsigned int stat, rdy, mask, timeout, block = 0;
  75 #ifdef CONFIG_MMC_SDMA
  76         unsigned char ctrl;
  77         ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
  78         ctrl &= ~SDHCI_CTRL_DMA_MASK;
  79         sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
  80 #endif
  81
  82         timeout = 1000000;
  83         rdy = SDHCI_INT_SPACE_AVAIL | SDHCI_INT_DATA_AVAIL;
  84         mask = SDHCI_DATA_AVAILABLE | SDHCI_SPACE_AVAILABLE;
  85         do {
  86                 stat = sdhci_readl(host, SDHCI_INT_STATUS);
  87                 if (stat & SDHCI_INT_ERROR) {
  88                         printf("%s: Error detected in status(0x%X)!\n",
  89                                __func__, stat);
  90                         return -1;
  91                 }
  92                 if (stat & rdy) {
  93                         if (!(sdhci_readl(host, SDHCI_PRESENT_STATE) & mask))
  94                                 continue;
  95                         sdhci_writel(host, rdy, SDHCI_INT_STATUS);
  96                         sdhci_transfer_pio(host, data);
  97                         data->dest += data->blocksize;
  98                         if (++block >= data->blocks)
  99                                 break;
 100                 }
 101 #ifdef CONFIG_MMC_SDMA
 102                 if (stat & SDHCI_INT_DMA_END) {
 103                         sdhci_writel(host, SDHCI_INT_DMA_END, SDHCI_INT_STATUS);
 104                         start_addr &= ~(SDHCI_DEFAULT_BOUNDARY_SIZE - 1);
 105                         start_addr += SDHCI_DEFAULT_BOUNDARY_SIZE;
 106                         sdhci_writel(host, start_addr, SDHCI_DMA_ADDRESS);
 107                 }
 108 #endif
 109                 if (timeout-- > 0)
 110                         udelay(10);
 111                 else {
 112                         printf("%s: Transfer data timeout\n", __func__);
 113                         return -1;
 114                 }
 115         } while (!(stat & SDHCI_INT_DATA_END));
 116         return 0;
 117 }
 118
 119 /*
 120  * No command will be sent by driver if card is busy, so driver must wait
 121  * for card ready state.
 122  * Every time when card is busy after timeout then (last) timeout value will be
 123  * increased twice but only if it doesn't exceed global defined maximum.
 124  * Each function call will use last timeout value. Max timeout can be redefined
 125  * in board config file.
 126  */
 127 #ifndef CONFIG_SDHCI_CMD_MAX_TIMEOUT
 128 #define CONFIG_SDHCI_CMD_MAX_TIMEOUT            3200
 129 #endif
 130 #define CONFIG_SDHCI_CMD_DEFAULT_TIMEOUT        100
 131 #define SDHCI_READ_STATUS_TIMEOUT               1000
 132
 133 static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd,
 134                        struct mmc_data *data)
 135 {
 136         struct sdhci_host *host = mmc->priv;
 137         unsigned int stat = 0;
 138         int ret = 0;
 139         int trans_bytes = 0, is_aligned = 1;
 140         u32 mask, flags, mode;
 141         unsigned int time = 0, start_addr = 0;
 142         int mmc_dev = mmc_get_blk_desc(mmc)->devnum;
 143         unsigned start = get_timer(0);
 144
 145         /* Timeout unit - ms */
 146         static unsigned int cmd_timeout = CONFIG_SDHCI_CMD_DEFAULT_TIMEOUT;
 147
 148         sdhci_writel(host, SDHCI_INT_ALL_MASK, SDHCI_INT_STATUS);
 149         mask = SDHCI_CMD_INHIBIT | SDHCI_DATA_INHIBIT;
 150
 151         /* We shouldn't wait for data inihibit for stop commands, even
 152            though they might use busy signaling */
 153         if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION)
 154                 mask &= ~SDHCI_DATA_INHIBIT;
 155
 156         while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) {
 157                 if (time >= cmd_timeout) {
 158                         printf("%s: MMC: %d busy ", __func__, mmc_dev);
 159                         if (2 * cmd_timeout <= CONFIG_SDHCI_CMD_MAX_TIMEOUT) {
 160                                 cmd_timeout += cmd_timeout;
 161                                 printf("timeout increasing to: %u ms.\n",
 162                                        cmd_timeout);
 163                         } else {
 164                                 puts("timeout.\n");
 165                                 return COMM_ERR;
 166                         }
 167                 }
 168                 time++;
 169                 udelay(1000);
 170         }
 171
 172         mask = SDHCI_INT_RESPONSE;
 173         if (!(cmd->resp_type & MMC_RSP_PRESENT))
 174                 flags = SDHCI_CMD_RESP_NONE;
 175         else if (cmd->resp_type & MMC_RSP_136)
 176                 flags = SDHCI_CMD_RESP_LONG;
 177         else if (cmd->resp_type & MMC_RSP_BUSY) {
 178                 flags = SDHCI_CMD_RESP_SHORT_BUSY;
 179                 mask |= SDHCI_INT_DATA_END;
 180         } else
 181                 flags = SDHCI_CMD_RESP_SHORT;
 182
 183         if (cmd->resp_type & MMC_RSP_CRC)
 184                 flags |= SDHCI_CMD_CRC;
 185         if (cmd->resp_type & MMC_RSP_OPCODE)
 186                 flags |= SDHCI_CMD_INDEX;
 187         if (data)
 188                 flags |= SDHCI_CMD_DATA;
 189
 190         /* Set Transfer mode regarding to data flag */
 191         if (data != 0) {
 192                 sdhci_writeb(host, 0xe, SDHCI_TIMEOUT_CONTROL);
 193                 mode = SDHCI_TRNS_BLK_CNT_EN;
 194                 trans_bytes = data->blocks * data->blocksize;
 195                 if (data->blocks > 1)
 196                         mode |= SDHCI_TRNS_MULTI;
 197
 198                 if (data->flags == MMC_DATA_READ)
 199                         mode |= SDHCI_TRNS_READ;
 200
 201 #ifdef CONFIG_MMC_SDMA
 202                 if (data->flags == MMC_DATA_READ)
 203                         start_addr = (unsigned long)data->dest;
 204                 else
 205                         start_addr = (unsigned long)data->src;
 206                 if ((host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) &&
 207                                 (start_addr & 0x7) != 0x0) {
 208                         is_aligned = 0;
 209                         start_addr = (unsigned long)aligned_buffer;
 210                         if (data->flags != MMC_DATA_READ)
 211                                 memcpy(aligned_buffer, data->src, trans_bytes);
 212                 }
 213
 214 #if defined(CONFIG_FIXED_SDHCI_ALIGNED_BUFFER)
 215                 /*
 216                  * Always use this bounce-buffer when
 217                  * CONFIG_FIXED_SDHCI_ALIGNED_BUFFER is defined
 218                  */
 219                 is_aligned = 0;
 220                 start_addr = (unsigned long)aligned_buffer;
 221                 if (data->flags != MMC_DATA_READ)
 222                         memcpy(aligned_buffer, data->src, trans_bytes);
 223 #endif
 224
 225                 sdhci_writel(host, start_addr, SDHCI_DMA_ADDRESS);
 226                 mode |= SDHCI_TRNS_DMA;
 227 #endif
 228                 sdhci_writew(host, SDHCI_MAKE_BLKSZ(SDHCI_DEFAULT_BOUNDARY_ARG,
 229                                 data->blocksize),
 230                                 SDHCI_BLOCK_SIZE);
 231                 sdhci_writew(host, data->blocks, SDHCI_BLOCK_COUNT);
 232                 sdhci_writew(host, mode, SDHCI_TRANSFER_MODE);
 233         } else if (cmd->resp_type & MMC_RSP_BUSY) {
 234                 sdhci_writeb(host, 0xe, SDHCI_TIMEOUT_CONTROL);
 235         }
 236
 237         sdhci_writel(host, cmd->cmdarg, SDHCI_ARGUMENT);
 238 #ifdef CONFIG_MMC_SDMA
 239         flush_cache(start_addr, trans_bytes);
 240 #endif
 241         sdhci_writew(host, SDHCI_MAKE_CMD(cmd->cmdidx, flags), SDHCI_COMMAND);
 242         start = get_timer(0);
 243         do {
 244                 stat = sdhci_readl(host, SDHCI_INT_STATUS);
 245                 if (stat & SDHCI_INT_ERROR)
 246                         break;
 247         } while (((stat & mask) != mask) &&
 248                  (get_timer(start) < SDHCI_READ_STATUS_TIMEOUT));
 249
 250         if (get_timer(start) >= SDHCI_READ_STATUS_TIMEOUT) {
 251                 if (host->quirks & SDHCI_QUIRK_BROKEN_R1B)
 252                         return 0;
 253                 else {
 254                         printf("%s: Timeout for status update!\n", __func__);
 255                         return TIMEOUT;
 256                 }
 257         }
 258
 259         if ((stat & (SDHCI_INT_ERROR | mask)) == mask) {
 260                 sdhci_cmd_done(host, cmd);
 261                 sdhci_writel(host, mask, SDHCI_INT_STATUS);
 262         } else
 263                 ret = -1;
 264
 265         if (!ret && data)
 266                 ret = sdhci_transfer_data(host, data, start_addr);
 267
 268         if (host->quirks & SDHCI_QUIRK_WAIT_SEND_CMD)
 269                 udelay(1000);
 270
 271         stat = sdhci_readl(host, SDHCI_INT_STATUS);
 272         sdhci_writel(host, SDHCI_INT_ALL_MASK, SDHCI_INT_STATUS);
 273         if (!ret) {
 274                 if ((host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) &&
 275                                 !is_aligned && (data->flags == MMC_DATA_READ))
 276                         memcpy(data->dest, aligned_buffer, trans_bytes);
 277                 return 0;
 278         }
 279
 280         sdhci_reset(host, SDHCI_RESET_CMD);
 281         sdhci_reset(host, SDHCI_RESET_DATA);
 282         if (stat & SDHCI_INT_TIMEOUT)
 283                 return TIMEOUT;
 284         else
 285                 return COMM_ERR;
 286 }
 287
 288 static int sdhci_set_clock(struct mmc *mmc, unsigned int clock)
 289 {
 290         struct sdhci_host *host = mmc->priv;
 291         unsigned int div, clk, timeout, reg;
 292
 293         /* Wait max 20 ms */
 294         timeout = 200;
 295         while (sdhci_readl(host, SDHCI_PRESENT_STATE) &
 296                            (SDHCI_CMD_INHIBIT | SDHCI_DATA_INHIBIT)) {
 297                 if (timeout == 0) {
 298                         printf("%s: Timeout to wait cmd & data inhibit\n",
 299                                __func__);
 300                         return -1;
 301                 }
 302
 303                 timeout--;
 304                 udelay(100);
 305         }
 306
 307         reg = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
 308         reg &= ~SDHCI_CLOCK_CARD_EN;
 309         sdhci_writew(host, reg, SDHCI_CLOCK_CONTROL);
 310
 311         if (clock == 0)
 312                 return 0;
 313
 314         if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) {
 315                 /* Version 3.00 divisors must be a multiple of 2. */
 316                 if (mmc->cfg->f_max <= clock)
 317                         div = 1;
 318                 else {
 319                         for (div = 2; div < SDHCI_MAX_DIV_SPEC_300; div += 2) {
 320                                 if ((mmc->cfg->f_max / div) <= clock)
 321                                         break;
 322                         }
 323                 }
 324         } else {
 325                 /* Version 2.00 divisors must be a power of 2. */
 326                 for (div = 1; div < SDHCI_MAX_DIV_SPEC_200; div *= 2) {
 327                         if ((mmc->cfg->f_max / div) <= clock)
 328                                 break;
 329                 }
 330         }
 331         div >>= 1;
 332
 333         if (host->set_clock)
 334                 host->set_clock(host->index, div);
 335
 336         clk = (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT;
 337         clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN)
 338                 << SDHCI_DIVIDER_HI_SHIFT;
 339         clk |= SDHCI_CLOCK_INT_EN;
 340         sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
 341
 342         /* Wait max 20 ms */
 343         timeout = 20;
 344         while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL))
 345                 & SDHCI_CLOCK_INT_STABLE)) {
 346                 if (timeout == 0) {
 347                         printf("%s: Internal clock never stabilised.\n",
 348                                __func__);
 349                         return -1;
 350                 }
 351                 timeout--;
 352                 udelay(1000);
 353         }
 354
 355         clk |= SDHCI_CLOCK_CARD_EN;
 356         sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
 357         return 0;
 358 }
 359
 360 static void sdhci_set_power(struct sdhci_host *host, unsigned short power)
 361 {
 362         u8 pwr = 0;
 363
 364         if (power != (unsigned short)-1) {
 365                 switch (1 << power) {
 366                 case MMC_VDD_165_195:
 367                         pwr = SDHCI_POWER_180;
 368                         break;
 369                 case MMC_VDD_29_30:
 370                 case MMC_VDD_30_31:
 371                         pwr = SDHCI_POWER_300;
 372                         break;
 373                 case MMC_VDD_32_33:
 374                 case MMC_VDD_33_34:
 375                         pwr = SDHCI_POWER_330;
 376                         break;
 377                 }
 378         }
 379
 380         if (pwr == 0) {
 381                 sdhci_writeb(host, 0, SDHCI_POWER_CONTROL);
 382                 return;
 383         }
 384
 385         if (host->quirks & SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER)
 386                 sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL);
 387
 388         pwr |= SDHCI_POWER_ON;
 389
 390         sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL);
 391 }
 392
 393 static void sdhci_set_ios(struct mmc *mmc)
 394 {
 395         u32 ctrl;
 396         struct sdhci_host *host = mmc->priv;
 397
 398         if (host->set_control_reg)
 399                 host->set_control_reg(host);
 400
 401         if (mmc->clock != host->clock)
 402                 sdhci_set_clock(mmc, mmc->clock);
 403
 404         /* Set bus width */
 405         ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
 406         if (mmc->bus_width == 8) {
 407                 ctrl &= ~SDHCI_CTRL_4BITBUS;
 408                 if ((SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) ||
 409                                 (host->quirks & SDHCI_QUIRK_USE_WIDE8))
 410                         ctrl |= SDHCI_CTRL_8BITBUS;
 411         } else {
 412                 if ((SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) ||
 413                                 (host->quirks & SDHCI_QUIRK_USE_WIDE8))
 414                         ctrl &= ~SDHCI_CTRL_8BITBUS;
 415                 if (mmc->bus_width == 4)
 416                         ctrl |= SDHCI_CTRL_4BITBUS;
 417                 else
 418                         ctrl &= ~SDHCI_CTRL_4BITBUS;
 419         }
 420
 421         if (mmc->clock > 26000000)
 422                 ctrl |= SDHCI_CTRL_HISPD;
 423         else
 424                 ctrl &= ~SDHCI_CTRL_HISPD;
 425
 426         if (host->quirks & SDHCI_QUIRK_NO_HISPD_BIT)
 427                 ctrl &= ~SDHCI_CTRL_HISPD;
 428
 429         sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
 430 }
 431
 432 static int sdhci_init(struct mmc *mmc)
 433 {
 434         struct sdhci_host *host = mmc->priv;
 435
 436         if ((host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) && !aligned_buffer) {
 437                 aligned_buffer = memalign(8, 512*1024);
 438                 if (!aligned_buffer) {
 439                         printf("%s: Aligned buffer alloc failed!!!\n",
 440                                __func__);
 441                         return -1;
 442                 }
 443         }
 444
 445         sdhci_set_power(host, fls(mmc->cfg->voltages) - 1);
 446
 447         if (host->quirks & SDHCI_QUIRK_NO_CD) {
 448 #if defined(CONFIG_PIC32_SDHCI)
 449                 /* PIC32 SDHCI CD errata:
 450                  * - set CD_TEST and clear CD_TEST_INS bit
 451                  */
 452                 sdhci_writeb(host, SDHCI_CTRL_CD_TEST, SDHCI_HOST_CONTROL);
 453 #else
 454                 unsigned int status;
 455
 456                 sdhci_writeb(host, SDHCI_CTRL_CD_TEST_INS | SDHCI_CTRL_CD_TEST,
 457                         SDHCI_HOST_CONTROL);
 458
 459                 status = sdhci_readl(host, SDHCI_PRESENT_STATE);
 460                 while ((!(status & SDHCI_CARD_PRESENT)) ||
 461                     (!(status & SDHCI_CARD_STATE_STABLE)) ||
 462                     (!(status & SDHCI_CARD_DETECT_PIN_LEVEL)))
 463                         status = sdhci_readl(host, SDHCI_PRESENT_STATE);
 464 #endif
 465         }
 466
 467         /* Enable only interrupts served by the SD controller */
 468         sdhci_writel(host, SDHCI_INT_DATA_MASK | SDHCI_INT_CMD_MASK,
 469                      SDHCI_INT_ENABLE);
 470         /* Mask all sdhci interrupt sources */
 471         sdhci_writel(host, 0x0, SDHCI_SIGNAL_ENABLE);
 472
 473         return 0;
 474 }
 475
 476
 477 static const struct mmc_ops sdhci_ops = {
 478         .send_cmd       = sdhci_send_command,
 479         .set_ios        = sdhci_set_ios,
 480         .init           = sdhci_init,
 481 };
 482
 483 int sdhci_setup_cfg(struct mmc_config *cfg, const char *name, int buswidth,
 484                     uint caps, u32 max_clk, u32 min_clk, uint version,
 485                     uint quirks, uint host_caps)
 486 {
 487         cfg->name = name;
 488 #ifndef CONFIG_DM_MMC_OPS
 489         cfg->ops = &sdhci_ops;
 490 #endif
 491         if (max_clk)
 492                 cfg->f_max = max_clk;
 493         else {
 494                 if (version >= SDHCI_SPEC_300)
 495                         cfg->f_max = (caps & SDHCI_CLOCK_V3_BASE_MASK) >>
 496                                 SDHCI_CLOCK_BASE_SHIFT;
 497                 else
 498                         cfg->f_max = (caps & SDHCI_CLOCK_BASE_MASK) >>
 499                                 SDHCI_CLOCK_BASE_SHIFT;
 500                 cfg->f_max *= 1000000;
 501         }
 502         if (cfg->f_max == 0)
 503                 return -EINVAL;
 504         if (min_clk)
 505                 cfg->f_min = min_clk;
 506         else {
 507                 if (version >= SDHCI_SPEC_300)
 508                         cfg->f_min = cfg->f_max / SDHCI_MAX_DIV_SPEC_300;
 509                 else
 510                         cfg->f_min = cfg->f_max / SDHCI_MAX_DIV_SPEC_200;
 511         }
 512         cfg->voltages = 0;
 513         if (caps & SDHCI_CAN_VDD_330)
 514                 cfg->voltages |= MMC_VDD_32_33 | MMC_VDD_33_34;
 515         if (caps & SDHCI_CAN_VDD_300)
 516                 cfg->voltages |= MMC_VDD_29_30 | MMC_VDD_30_31;
 517         if (caps & SDHCI_CAN_VDD_180)
 518                 cfg->voltages |= MMC_VDD_165_195;
 519
 520         cfg->host_caps = MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT;
 521         if (version >= SDHCI_SPEC_300) {
 522                 if (caps & SDHCI_CAN_DO_8BIT)
 523                         cfg->host_caps |= MMC_MODE_8BIT;
 524         }
 525
 526         if (quirks & SDHCI_QUIRK_NO_HISPD_BIT)
 527                 cfg->host_caps &= ~(MMC_MODE_HS | MMC_MODE_HS_52MHz);
 528
 529         if (host_caps)
 530                 cfg->host_caps |= host_caps;
 531
 532         cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
 533
 534         return 0;
 535 }
 536
 537 int add_sdhci(struct sdhci_host *host, u32 max_clk, u32 min_clk)
 538 {
 539         unsigned int caps;
 540
 541         caps = sdhci_readl(host, SDHCI_CAPABILITIES);
 542 #ifdef CONFIG_MMC_SDMA
 543         if (!(caps & SDHCI_CAN_DO_SDMA)) {
 544                 printf("%s: Your controller doesn't support SDMA!!\n",
 545                        __func__);
 546                 return -1;
 547         }
 548 #endif
 549
 550         if (sdhci_setup_cfg(&host->cfg, host->name, host->bus_width, caps,
 551                             max_clk, min_clk, SDHCI_GET_VERSION(host),
 552                             host->quirks, host->host_caps)) {
 553                 printf("%s: Hardware doesn't specify base clock frequency\n",
 554                        __func__);
 555                 return -EINVAL;
 556         }
 557
 558         if (host->quirks & SDHCI_QUIRK_BROKEN_VOLTAGE)
 559                 host->cfg.voltages |= host->voltages;
 560
 561         sdhci_reset(host, SDHCI_RESET_ALL);
 562
 563         host->mmc = mmc_create(&host->cfg, host);
 564         if (host->mmc == NULL) {
 565                 printf("%s: mmc create fail!\n", __func__);
 566                 return -1;
 567         }
 568
 569         return 0;
 570 }