2 * Copyright (C) 2015 Thomas Chou <thomas@wytron.com.tw>
4 * SPDX-License-Identifier: GPL-2.0+
10 #include <fdt_support.h>
15 DECLARE_GLOBAL_DATA_PTR;
17 /* The STATUS register */
18 #define QUADSPI_SR_BP0 BIT(2)
19 #define QUADSPI_SR_BP1 BIT(3)
20 #define QUADSPI_SR_BP2 BIT(4)
21 #define QUADSPI_SR_BP2_0 GENMASK(4, 2)
22 #define QUADSPI_SR_BP3 BIT(6)
23 #define QUADSPI_SR_TB BIT(5)
26 * The QUADSPI_MEM_OP register is used to do memory protect and erase operations
28 #define QUADSPI_MEM_OP_BULK_ERASE 0x00000001
29 #define QUADSPI_MEM_OP_SECTOR_ERASE 0x00000002
30 #define QUADSPI_MEM_OP_SECTOR_PROTECT 0x00000003
33 * The QUADSPI_ISR register is used to determine whether an invalid write or
34 * erase operation trigerred an interrupt
36 #define QUADSPI_ISR_ILLEGAL_ERASE BIT(0)
37 #define QUADSPI_ISR_ILLEGAL_WRITE BIT(1)
39 struct altera_qspi_regs {
49 struct altera_qspi_platdata {
50 struct altera_qspi_regs *regs;
55 flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* FLASH chips info */
57 static void altera_qspi_get_locked_range(struct mtd_info *mtd, loff_t *ofs,
60 void flash_print_info(flash_info_t *info)
62 struct mtd_info *mtd = info->mtd;
66 printf("Altera QSPI flash Size: %ld MB in %d Sectors\n",
67 info->size >> 20, info->sector_count);
68 altera_qspi_get_locked_range(mtd, &ofs, &len);
69 printf(" %08lX +%lX", info->start[0], info->size);
71 printf(", protected %08llX +%llX",
72 info->start[0] + ofs, len);
77 int flash_erase(flash_info_t *info, int s_first, int s_last)
79 struct mtd_info *mtd = info->mtd;
80 struct erase_info instr;
83 memset(&instr, 0, sizeof(instr));
85 instr.addr = mtd->erasesize * s_first;
86 instr.len = mtd->erasesize * (s_last + 1 - s_first);
87 ret = mtd_erase(mtd, &instr);
94 int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
96 struct mtd_info *mtd = info->mtd;
97 struct udevice *dev = mtd->dev;
98 struct altera_qspi_platdata *pdata = dev_get_platdata(dev);
99 ulong base = (ulong)pdata->base;
100 loff_t to = addr - base;
104 ret = mtd_write(mtd, to, cnt, &retlen, src);
106 return ERR_PROTECTED;
111 unsigned long flash_init(void)
115 /* probe every MTD device */
116 for (uclass_first_device(UCLASS_MTD, &dev);
118 uclass_next_device(&dev)) {
121 return flash_info[0].size;
124 static int altera_qspi_erase(struct mtd_info *mtd, struct erase_info *instr)
126 struct udevice *dev = mtd->dev;
127 struct altera_qspi_platdata *pdata = dev_get_platdata(dev);
128 struct altera_qspi_regs *regs = pdata->regs;
129 size_t addr = instr->addr;
130 size_t len = instr->len;
131 size_t end = addr + len;
135 instr->state = MTD_ERASING;
136 addr &= ~(mtd->erasesize - 1); /* get lower aligned address */
138 sect = addr / mtd->erasesize;
140 sect |= QUADSPI_MEM_OP_SECTOR_ERASE;
141 debug("erase %08x\n", sect);
142 writel(sect, ®s->mem_op);
143 stat = readl(®s->isr);
144 if (stat & QUADSPI_ISR_ILLEGAL_ERASE) {
145 /* erase failed, sector might be protected */
146 debug("erase %08x fail %x\n", sect, stat);
147 writel(stat, ®s->isr); /* clear isr */
148 instr->fail_addr = addr;
149 instr->state = MTD_ERASE_FAILED;
150 mtd_erase_callback(instr);
153 addr += mtd->erasesize;
155 instr->state = MTD_ERASE_DONE;
156 mtd_erase_callback(instr);
161 static int altera_qspi_read(struct mtd_info *mtd, loff_t from, size_t len,
162 size_t *retlen, u_char *buf)
164 struct udevice *dev = mtd->dev;
165 struct altera_qspi_platdata *pdata = dev_get_platdata(dev);
167 memcpy_fromio(buf, pdata->base + from, len);
173 static int altera_qspi_write(struct mtd_info *mtd, loff_t to, size_t len,
174 size_t *retlen, const u_char *buf)
176 struct udevice *dev = mtd->dev;
177 struct altera_qspi_platdata *pdata = dev_get_platdata(dev);
178 struct altera_qspi_regs *regs = pdata->regs;
181 memcpy_toio(pdata->base + to, buf, len);
182 /* check whether write triggered a illegal write interrupt */
183 stat = readl(®s->isr);
184 if (stat & QUADSPI_ISR_ILLEGAL_WRITE) {
185 /* write failed, sector might be protected */
186 debug("write fail %x\n", stat);
187 writel(stat, ®s->isr); /* clear isr */
195 static void altera_qspi_sync(struct mtd_info *mtd)
199 static void altera_qspi_get_locked_range(struct mtd_info *mtd, loff_t *ofs,
202 struct udevice *dev = mtd->dev;
203 struct altera_qspi_platdata *pdata = dev_get_platdata(dev);
204 struct altera_qspi_regs *regs = pdata->regs;
205 int shift0 = ffs(QUADSPI_SR_BP2_0) - 1;
206 int shift3 = ffs(QUADSPI_SR_BP3) - 1 - 3;
207 u32 stat = readl(®s->rd_status);
208 unsigned pow = ((stat & QUADSPI_SR_BP2_0) >> shift0) |
209 ((stat & QUADSPI_SR_BP3) >> shift3);
214 *len = mtd->erasesize << (pow - 1);
215 if (*len > mtd->size)
217 if (!(stat & QUADSPI_SR_TB))
218 *ofs = mtd->size - *len;
222 static int altera_qspi_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
224 struct udevice *dev = mtd->dev;
225 struct altera_qspi_platdata *pdata = dev_get_platdata(dev);
226 struct altera_qspi_regs *regs = pdata->regs;
227 u32 sector_start, sector_end;
233 num_sectors = mtd->size / mtd->erasesize;
234 sector_start = ofs / mtd->erasesize;
235 sector_end = (ofs + len) / mtd->erasesize;
237 if (sector_start >= num_sectors / 2) {
238 sr_bp = fls(num_sectors - 1 - sector_start) + 1;
240 } else if (sector_end < num_sectors / 2) {
241 sr_bp = fls(sector_end) + 1;
248 mem_op = (sr_tb << 12) | (sr_bp << 8);
249 mem_op |= QUADSPI_MEM_OP_SECTOR_PROTECT;
250 debug("lock %08x\n", mem_op);
251 writel(mem_op, ®s->mem_op);
256 static int altera_qspi_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
258 struct udevice *dev = mtd->dev;
259 struct altera_qspi_platdata *pdata = dev_get_platdata(dev);
260 struct altera_qspi_regs *regs = pdata->regs;
263 mem_op = QUADSPI_MEM_OP_SECTOR_PROTECT;
264 debug("unlock %08x\n", mem_op);
265 writel(mem_op, ®s->mem_op);
270 static int altera_qspi_probe(struct udevice *dev)
272 struct altera_qspi_platdata *pdata = dev_get_platdata(dev);
273 struct altera_qspi_regs *regs = pdata->regs;
274 unsigned long base = (unsigned long)pdata->base;
275 struct mtd_info *mtd;
276 flash_info_t *flash = &flash_info[0];
280 rdid = readl(®s->rd_rdid);
281 debug("rdid %x\n", rdid);
283 mtd = dev_get_uclass_priv(dev);
286 mtd->type = MTD_NORFLASH;
287 mtd->flags = MTD_CAP_NORFLASH;
288 mtd->size = 1 << ((rdid & 0xff) - 6);
290 mtd->writebufsize = mtd->writesize;
291 mtd->_erase = altera_qspi_erase;
292 mtd->_read = altera_qspi_read;
293 mtd->_write = altera_qspi_write;
294 mtd->_sync = altera_qspi_sync;
295 mtd->_lock = altera_qspi_lock;
296 mtd->_unlock = altera_qspi_unlock;
297 mtd->numeraseregions = 0;
298 mtd->erasesize = 0x10000;
299 if (add_mtd_device(mtd))
303 flash->size = mtd->size;
304 flash->sector_count = mtd->size / mtd->erasesize;
305 flash->flash_id = rdid;
306 flash->start[0] = base;
307 for (i = 1; i < flash->sector_count; i++)
308 flash->start[i] = flash->start[i - 1] + mtd->erasesize;
309 gd->bd->bi_flashstart = base;
314 static int altera_qspi_ofdata_to_platdata(struct udevice *dev)
316 struct altera_qspi_platdata *pdata = dev_get_platdata(dev);
317 void *blob = (void *)gd->fdt_blob;
318 int node = dev->of_offset;
319 const char *list, *end;
322 unsigned long addr, size;
323 int parent, addrc, sizec;
327 * decode regs. there are multiple reg tuples, and they need to
328 * match with reg-names.
330 parent = fdt_parent_offset(blob, node);
331 of_bus_default_count_cells(blob, parent, &addrc, &sizec);
332 list = fdt_getprop(blob, node, "reg-names", &len);
336 cell = fdt_getprop(blob, node, "reg", &len);
341 addr = fdt_translate_address((void *)blob,
343 size = fdt_addr_to_cpu(cell[idx + addrc]);
344 base = map_physmem(addr, size, MAP_NOCACHE);
346 if (strcmp(list, "avl_csr") == 0) {
348 } else if (strcmp(list, "avl_mem") == 0) {
352 idx += addrc + sizec;
359 static const struct udevice_id altera_qspi_ids[] = {
360 { .compatible = "altr,quadspi-1.0" },
364 U_BOOT_DRIVER(altera_qspi) = {
365 .name = "altera_qspi",
367 .of_match = altera_qspi_ids,
368 .ofdata_to_platdata = altera_qspi_ofdata_to_platdata,
369 .platdata_auto_alloc_size = sizeof(struct altera_qspi_platdata),
370 .probe = altera_qspi_probe,