2 * (C) Copyright 2002-2004
3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
5 * Copyright (C) 2003 Arabella Software Ltd.
6 * Yuli Barcohen <yuli@arabellasw.com>
12 * Tolunay Orkun <listmember@orkun.us>
14 * SPDX-License-Identifier: GPL-2.0+
17 /* The DEBUG define must be before common to enable debugging */
24 #include <fdt_support.h>
25 #include <asm/processor.h>
27 #include <asm/byteorder.h>
28 #include <asm/unaligned.h>
29 #include <environment.h>
30 #include <mtd/cfi_flash.h>
34 * This file implements a Common Flash Interface (CFI) driver for
37 * The width of the port and the width of the chips are determined at
38 * initialization. These widths are used to calculate the address for
39 * access CFI data structures.
42 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
43 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
44 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
45 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
46 * AMD CFI Specification, Release 2.0 December 1, 2001
47 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
48 * Device IDs, Publication Number 25538 Revision A, November 8, 2001
50 * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
51 * reading and writing ... (yes there is such a Hardware).
54 DECLARE_GLOBAL_DATA_PTR;
56 static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
57 #ifdef CONFIG_FLASH_CFI_MTD
58 static uint flash_verbose = 1;
60 #define flash_verbose 1
63 flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */
66 * Check if chip width is defined. If not, start detecting with 8bit.
68 #ifndef CONFIG_SYS_FLASH_CFI_WIDTH
69 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
72 #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
73 #define __maybe_weak __weak
75 #define __maybe_weak static
79 * 0xffff is an undefined value for the configuration register. When
80 * this value is returned, the configuration register shall not be
81 * written at all (default mode).
83 static u16 cfi_flash_config_reg(int i)
85 #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
86 return ((u16 [])CONFIG_SYS_CFI_FLASH_CONFIG_REGS)[i];
92 #if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
93 int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT;
96 #ifdef CONFIG_CFI_FLASH /* for driver model */
97 static void cfi_flash_init_dm(void)
101 cfi_flash_num_flash_banks = 0;
103 * The uclass_first_device() will probe the first device and
104 * uclass_next_device() will probe the rest if they exist. So
105 * that cfi_flash_probe() will get called assigning the base
106 * addresses that are available.
108 for (uclass_first_device(UCLASS_MTD, &dev);
110 uclass_next_device(&dev)) {
114 phys_addr_t cfi_flash_bank_addr(int i)
116 return flash_info[i].base;
119 __weak phys_addr_t cfi_flash_bank_addr(int i)
121 return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i];
125 __weak unsigned long cfi_flash_bank_size(int i)
127 #ifdef CONFIG_SYS_FLASH_BANKS_SIZES
128 return ((unsigned long [])CONFIG_SYS_FLASH_BANKS_SIZES)[i];
134 __maybe_weak void flash_write8(u8 value, void *addr)
136 __raw_writeb(value, addr);
139 __maybe_weak void flash_write16(u16 value, void *addr)
141 __raw_writew(value, addr);
144 __maybe_weak void flash_write32(u32 value, void *addr)
146 __raw_writel(value, addr);
149 __maybe_weak void flash_write64(u64 value, void *addr)
151 /* No architectures currently implement __raw_writeq() */
152 *(volatile u64 *)addr = value;
155 __maybe_weak u8 flash_read8(void *addr)
157 return __raw_readb(addr);
160 __maybe_weak u16 flash_read16(void *addr)
162 return __raw_readw(addr);
165 __maybe_weak u32 flash_read32(void *addr)
167 return __raw_readl(addr);
170 __maybe_weak u64 flash_read64(void *addr)
172 /* No architectures currently implement __raw_readq() */
173 return *(volatile u64 *)addr;
176 /*-----------------------------------------------------------------------
178 #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
179 static flash_info_t *flash_get_info(ulong base)
184 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
185 info = &flash_info[i];
186 if (info->size && info->start[0] <= base &&
187 base <= info->start[0] + info->size - 1)
195 unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
197 if (sect != (info->sector_count - 1))
198 return info->start[sect + 1] - info->start[sect];
200 return info->start[0] + info->size - info->start[sect];
203 /*-----------------------------------------------------------------------
204 * create an address based on the offset and the port width
207 flash_map(flash_info_t *info, flash_sect_t sect, uint offset)
209 unsigned int byte_offset = offset * info->portwidth;
211 return (void *)(info->start[sect] + byte_offset);
214 static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
215 unsigned int offset, void *addr)
219 /*-----------------------------------------------------------------------
220 * make a proper sized command based on the port and chip widths
222 static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
227 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
228 u32 cmd_le = cpu_to_le32(cmd);
231 uchar *cp = (uchar *) cmdbuf;
233 for (i = info->portwidth; i > 0; i--) {
234 cword_offset = (info->portwidth - i) % info->chipwidth;
235 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
236 cp_offset = info->portwidth - i;
237 val = *((uchar *)&cmd_le + cword_offset);
240 val = *((uchar *)&cmd + sizeof(u32) - cword_offset - 1);
242 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
247 /*-----------------------------------------------------------------------
250 static void print_longlong(char *str, unsigned long long data)
256 for (i = 0; i < 8; i++)
257 sprintf(&str[i * 2], "%2.2x", *cp++);
260 static void flash_printqry(struct cfi_qry *qry)
265 for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
267 for (y = 0; y < 16; y++)
268 debug("%2.2x ", p[x + y]);
270 for (y = 0; y < 16; y++) {
271 unsigned char c = p[x + y];
273 if (c >= 0x20 && c <= 0x7e)
283 /*-----------------------------------------------------------------------
284 * read a character at a port width address
286 static inline uchar flash_read_uchar(flash_info_t *info, uint offset)
291 cp = flash_map(info, 0, offset);
292 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
293 retval = flash_read8(cp);
295 retval = flash_read8(cp + info->portwidth - 1);
297 flash_unmap(info, 0, offset, cp);
301 /*-----------------------------------------------------------------------
302 * read a word at a port width address, assume 16bit bus
304 static inline ushort flash_read_word(flash_info_t *info, uint offset)
306 ushort *addr, retval;
308 addr = flash_map(info, 0, offset);
309 retval = flash_read16(addr);
310 flash_unmap(info, 0, offset, addr);
314 /*-----------------------------------------------------------------------
315 * read a long word by picking the least significant byte of each maximum
316 * port size word. Swap for ppc format.
318 static ulong flash_read_long (flash_info_t *info, flash_sect_t sect,
327 addr = flash_map(info, sect, offset);
330 debug("long addr is at %p info->portwidth = %d\n", addr,
332 for (x = 0; x < 4 * info->portwidth; x++)
333 debug("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
335 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
336 retval = ((flash_read8(addr) << 16) |
337 (flash_read8(addr + info->portwidth) << 24) |
338 (flash_read8(addr + 2 * info->portwidth)) |
339 (flash_read8(addr + 3 * info->portwidth) << 8));
341 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
342 (flash_read8(addr + info->portwidth - 1) << 16) |
343 (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
344 (flash_read8(addr + 3 * info->portwidth - 1)));
346 flash_unmap(info, sect, offset, addr);
352 * Write a proper sized command to the correct address
354 static void flash_write_cmd(flash_info_t *info, flash_sect_t sect,
355 uint offset, u32 cmd)
360 addr = flash_map(info, sect, offset);
361 flash_make_cmd(info, cmd, &cword);
362 switch (info->portwidth) {
364 debug("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
365 cword.w8, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
366 flash_write8(cword.w8, addr);
368 case FLASH_CFI_16BIT:
369 debug("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
371 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
372 flash_write16(cword.w16, addr);
374 case FLASH_CFI_32BIT:
375 debug("fwc addr %p cmd %x %8.8x 32bit x %d bit\n", addr,
377 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
378 flash_write32(cword.w32, addr);
380 case FLASH_CFI_64BIT:
385 print_longlong(str, cword.w64);
387 debug("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
389 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
392 flash_write64(cword.w64, addr);
396 /* Ensure all the instructions are fully finished */
399 flash_unmap(info, sect, offset, addr);
402 static void flash_unlock_seq(flash_info_t *info, flash_sect_t sect)
404 flash_write_cmd(info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
405 flash_write_cmd(info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
408 /*-----------------------------------------------------------------------
410 static int flash_isequal(flash_info_t *info, flash_sect_t sect,
411 uint offset, uchar cmd)
417 addr = flash_map(info, sect, offset);
418 flash_make_cmd(info, cmd, &cword);
420 debug("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
421 switch (info->portwidth) {
423 debug("is= %x %x\n", flash_read8(addr), cword.w8);
424 retval = (flash_read8(addr) == cword.w8);
426 case FLASH_CFI_16BIT:
427 debug("is= %4.4x %4.4x\n", flash_read16(addr), cword.w16);
428 retval = (flash_read16(addr) == cword.w16);
430 case FLASH_CFI_32BIT:
431 debug("is= %8.8x %8.8x\n", flash_read32(addr), cword.w32);
432 retval = (flash_read32(addr) == cword.w32);
434 case FLASH_CFI_64BIT:
440 print_longlong(str1, flash_read64(addr));
441 print_longlong(str2, cword.w64);
442 debug("is= %s %s\n", str1, str2);
445 retval = (flash_read64(addr) == cword.w64);
451 flash_unmap(info, sect, offset, addr);
456 /*-----------------------------------------------------------------------
458 static int flash_isset(flash_info_t *info, flash_sect_t sect,
459 uint offset, uchar cmd)
465 addr = flash_map(info, sect, offset);
466 flash_make_cmd(info, cmd, &cword);
467 switch (info->portwidth) {
469 retval = ((flash_read8(addr) & cword.w8) == cword.w8);
471 case FLASH_CFI_16BIT:
472 retval = ((flash_read16(addr) & cword.w16) == cword.w16);
474 case FLASH_CFI_32BIT:
475 retval = ((flash_read32(addr) & cword.w32) == cword.w32);
477 case FLASH_CFI_64BIT:
478 retval = ((flash_read64(addr) & cword.w64) == cword.w64);
484 flash_unmap(info, sect, offset, addr);
489 /*-----------------------------------------------------------------------
491 static int flash_toggle(flash_info_t *info, flash_sect_t sect,
492 uint offset, uchar cmd)
498 addr = flash_map(info, sect, offset);
499 flash_make_cmd(info, cmd, &cword);
500 switch (info->portwidth) {
502 retval = flash_read8(addr) != flash_read8(addr);
504 case FLASH_CFI_16BIT:
505 retval = flash_read16(addr) != flash_read16(addr);
507 case FLASH_CFI_32BIT:
508 retval = flash_read32(addr) != flash_read32(addr);
510 case FLASH_CFI_64BIT:
511 retval = ((flash_read32(addr) != flash_read32(addr)) ||
512 (flash_read32(addr + 4) != flash_read32(addr + 4)));
518 flash_unmap(info, sect, offset, addr);
524 * flash_is_busy - check to see if the flash is busy
526 * This routine checks the status of the chip and returns true if the
529 static int flash_is_busy(flash_info_t *info, flash_sect_t sect)
533 switch (info->vendor) {
534 case CFI_CMDSET_INTEL_PROG_REGIONS:
535 case CFI_CMDSET_INTEL_STANDARD:
536 case CFI_CMDSET_INTEL_EXTENDED:
537 retval = !flash_isset(info, sect, 0, FLASH_STATUS_DONE);
539 case CFI_CMDSET_AMD_STANDARD:
540 case CFI_CMDSET_AMD_EXTENDED:
541 #ifdef CONFIG_FLASH_CFI_LEGACY
542 case CFI_CMDSET_AMD_LEGACY:
544 if (info->sr_supported) {
545 flash_write_cmd(info, sect, info->addr_unlock1,
546 FLASH_CMD_READ_STATUS);
547 retval = !flash_isset(info, sect, 0,
550 retval = flash_toggle(info, sect, 0,
558 debug("%s: %d\n", __func__, retval);
562 /*-----------------------------------------------------------------------
563 * wait for XSR.7 to be set. Time out with an error if it does not.
564 * This routine does not set the flash to read-array mode.
566 static int flash_status_check(flash_info_t *info, flash_sect_t sector,
567 ulong tout, char *prompt)
571 #if CONFIG_SYS_HZ != 1000
572 if ((ulong)CONFIG_SYS_HZ > 100000)
573 tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
575 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
578 /* Wait for command completion */
579 #ifdef CONFIG_SYS_LOW_RES_TIMER
582 start = get_timer(0);
584 while (flash_is_busy(info, sector)) {
585 if (get_timer(start) > tout) {
586 printf("Flash %s timeout at address %lx data %lx\n",
587 prompt, info->start[sector],
588 flash_read_long(info, sector, 0));
589 flash_write_cmd(info, sector, 0, info->cmd_reset);
593 udelay(1); /* also triggers watchdog */
598 /*-----------------------------------------------------------------------
599 * Wait for XSR.7 to be set, if it times out print an error, otherwise
600 * do a full status check.
602 * This routine sets the flash to read-array mode.
604 static int flash_full_status_check(flash_info_t *info, flash_sect_t sector,
605 ulong tout, char *prompt)
609 retcode = flash_status_check(info, sector, tout, prompt);
610 switch (info->vendor) {
611 case CFI_CMDSET_INTEL_PROG_REGIONS:
612 case CFI_CMDSET_INTEL_EXTENDED:
613 case CFI_CMDSET_INTEL_STANDARD:
614 if (retcode == ERR_OK &&
615 !flash_isset(info, sector, 0, FLASH_STATUS_DONE)) {
617 printf("Flash %s error at address %lx\n", prompt,
618 info->start[sector]);
619 if (flash_isset(info, sector, 0, FLASH_STATUS_ECLBS |
620 FLASH_STATUS_PSLBS)) {
621 puts("Command Sequence Error.\n");
622 } else if (flash_isset(info, sector, 0,
623 FLASH_STATUS_ECLBS)) {
624 puts("Block Erase Error.\n");
625 retcode = ERR_NOT_ERASED;
626 } else if (flash_isset(info, sector, 0,
627 FLASH_STATUS_PSLBS)) {
628 puts("Locking Error\n");
630 if (flash_isset(info, sector, 0, FLASH_STATUS_DPS)) {
631 puts("Block locked.\n");
632 retcode = ERR_PROTECTED;
634 if (flash_isset(info, sector, 0, FLASH_STATUS_VPENS))
635 puts("Vpp Low Error.\n");
637 flash_write_cmd(info, sector, 0, info->cmd_reset);
646 static int use_flash_status_poll(flash_info_t *info)
648 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
649 if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
650 info->vendor == CFI_CMDSET_AMD_STANDARD)
656 static int flash_status_poll(flash_info_t *info, void *src, void *dst,
657 ulong tout, char *prompt)
659 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
663 #if CONFIG_SYS_HZ != 1000
664 if ((ulong)CONFIG_SYS_HZ > 100000)
665 tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
667 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
670 /* Wait for command completion */
671 #ifdef CONFIG_SYS_LOW_RES_TIMER
674 start = get_timer(0);
677 switch (info->portwidth) {
679 ready = flash_read8(dst) == flash_read8(src);
681 case FLASH_CFI_16BIT:
682 ready = flash_read16(dst) == flash_read16(src);
684 case FLASH_CFI_32BIT:
685 ready = flash_read32(dst) == flash_read32(src);
687 case FLASH_CFI_64BIT:
688 ready = flash_read64(dst) == flash_read64(src);
696 if (get_timer(start) > tout) {
697 printf("Flash %s timeout at address %lx data %lx\n",
698 prompt, (ulong)dst, (ulong)flash_read8(dst));
701 udelay(1); /* also triggers watchdog */
703 #endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
707 /*-----------------------------------------------------------------------
709 static void flash_add_byte(flash_info_t *info, cfiword_t *cword, uchar c)
711 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
714 unsigned long long ll;
717 switch (info->portwidth) {
721 case FLASH_CFI_16BIT:
722 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
725 cword->w16 = (cword->w16 >> 8) | w;
727 cword->w16 = (cword->w16 << 8) | c;
730 case FLASH_CFI_32BIT:
731 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
734 cword->w32 = (cword->w32 >> 8) | l;
736 cword->w32 = (cword->w32 << 8) | c;
739 case FLASH_CFI_64BIT:
740 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
743 cword->w64 = (cword->w64 >> 8) | ll;
745 cword->w64 = (cword->w64 << 8) | c;
752 * Loop through the sector table starting from the previously found sector.
753 * Searches forwards or backwards, dependent on the passed address.
755 static flash_sect_t find_sector(flash_info_t *info, ulong addr)
757 static flash_sect_t saved_sector; /* previously found sector */
758 static flash_info_t *saved_info; /* previously used flash bank */
759 flash_sect_t sector = saved_sector;
761 if (info != saved_info || sector >= info->sector_count)
764 while ((info->start[sector] < addr) &&
765 (sector < info->sector_count - 1))
767 while ((info->start[sector] > addr) && (sector > 0))
769 * also decrements the sector in case of an overshot
774 saved_sector = sector;
779 /*-----------------------------------------------------------------------
781 static int flash_write_cfiword(flash_info_t *info, ulong dest,
784 void *dstaddr = (void *)dest;
786 flash_sect_t sect = 0;
789 /* Check if Flash is (sufficiently) erased */
790 switch (info->portwidth) {
792 flag = ((flash_read8(dstaddr) & cword.w8) == cword.w8);
794 case FLASH_CFI_16BIT:
795 flag = ((flash_read16(dstaddr) & cword.w16) == cword.w16);
797 case FLASH_CFI_32BIT:
798 flag = ((flash_read32(dstaddr) & cword.w32) == cword.w32);
800 case FLASH_CFI_64BIT:
801 flag = ((flash_read64(dstaddr) & cword.w64) == cword.w64);
808 return ERR_NOT_ERASED;
810 /* Disable interrupts which might cause a timeout here */
811 flag = disable_interrupts();
813 switch (info->vendor) {
814 case CFI_CMDSET_INTEL_PROG_REGIONS:
815 case CFI_CMDSET_INTEL_EXTENDED:
816 case CFI_CMDSET_INTEL_STANDARD:
817 flash_write_cmd(info, 0, 0, FLASH_CMD_CLEAR_STATUS);
818 flash_write_cmd(info, 0, 0, FLASH_CMD_WRITE);
820 case CFI_CMDSET_AMD_EXTENDED:
821 case CFI_CMDSET_AMD_STANDARD:
822 sect = find_sector(info, dest);
823 flash_unlock_seq(info, sect);
824 flash_write_cmd(info, sect, info->addr_unlock1, AMD_CMD_WRITE);
827 #ifdef CONFIG_FLASH_CFI_LEGACY
828 case CFI_CMDSET_AMD_LEGACY:
829 sect = find_sector(info, dest);
830 flash_unlock_seq(info, 0);
831 flash_write_cmd(info, 0, info->addr_unlock1, AMD_CMD_WRITE);
837 switch (info->portwidth) {
839 flash_write8(cword.w8, dstaddr);
841 case FLASH_CFI_16BIT:
842 flash_write16(cword.w16, dstaddr);
844 case FLASH_CFI_32BIT:
845 flash_write32(cword.w32, dstaddr);
847 case FLASH_CFI_64BIT:
848 flash_write64(cword.w64, dstaddr);
852 /* re-enable interrupts if necessary */
857 sect = find_sector(info, dest);
859 if (use_flash_status_poll(info))
860 return flash_status_poll(info, &cword, dstaddr,
861 info->write_tout, "write");
863 return flash_full_status_check(info, sect,
864 info->write_tout, "write");
867 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
869 static int flash_write_cfibuffer(flash_info_t *info, ulong dest, uchar *cp,
876 void *dst = (void *)dest;
883 switch (info->portwidth) {
887 case FLASH_CFI_16BIT:
890 case FLASH_CFI_32BIT:
893 case FLASH_CFI_64BIT:
903 while ((cnt-- > 0) && (flag == 1)) {
904 switch (info->portwidth) {
906 flag = ((flash_read8(dst2) & flash_read8(src)) ==
910 case FLASH_CFI_16BIT:
911 flag = ((flash_read16(dst2) & flash_read16(src)) ==
915 case FLASH_CFI_32BIT:
916 flag = ((flash_read32(dst2) & flash_read32(src)) ==
920 case FLASH_CFI_64BIT:
921 flag = ((flash_read64(dst2) & flash_read64(src)) ==
928 retcode = ERR_NOT_ERASED;
933 sector = find_sector(info, dest);
935 switch (info->vendor) {
936 case CFI_CMDSET_INTEL_PROG_REGIONS:
937 case CFI_CMDSET_INTEL_STANDARD:
938 case CFI_CMDSET_INTEL_EXTENDED:
939 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
940 FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
941 flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
942 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
943 flash_write_cmd(info, sector, 0, write_cmd);
944 retcode = flash_status_check(info, sector,
945 info->buffer_write_tout,
947 if (retcode == ERR_OK) {
948 /* reduce the number of loops by the width of
952 flash_write_cmd(info, sector, 0, cnt - 1);
954 switch (info->portwidth) {
956 flash_write8(flash_read8(src), dst);
959 case FLASH_CFI_16BIT:
960 flash_write16(flash_read16(src), dst);
963 case FLASH_CFI_32BIT:
964 flash_write32(flash_read32(src), dst);
967 case FLASH_CFI_64BIT:
968 flash_write64(flash_read64(src), dst);
976 flash_write_cmd(info, sector, 0,
977 FLASH_CMD_WRITE_BUFFER_CONFIRM);
978 retcode = flash_full_status_check(
979 info, sector, info->buffer_write_tout,
985 case CFI_CMDSET_AMD_STANDARD:
986 case CFI_CMDSET_AMD_EXTENDED:
987 flash_unlock_seq(info, sector);
989 #ifdef CONFIG_FLASH_SPANSION_S29WS_N
990 offset = ((unsigned long)dst - info->start[sector]) >> shift;
992 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
994 flash_write_cmd(info, sector, offset, cnt - 1);
996 switch (info->portwidth) {
999 flash_write8(flash_read8(src), dst);
1003 case FLASH_CFI_16BIT:
1005 flash_write16(flash_read16(src), dst);
1009 case FLASH_CFI_32BIT:
1011 flash_write32(flash_read32(src), dst);
1015 case FLASH_CFI_64BIT:
1017 flash_write64(flash_read64(src), dst);
1022 retcode = ERR_INVAL;
1026 flash_write_cmd(info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
1027 if (use_flash_status_poll(info))
1028 retcode = flash_status_poll(info, src - (1 << shift),
1030 info->buffer_write_tout,
1033 retcode = flash_full_status_check(info, sector,
1034 info->buffer_write_tout,
1039 debug("Unknown Command Set\n");
1040 retcode = ERR_INVAL;
1047 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1049 /*-----------------------------------------------------------------------
1051 int flash_erase(flash_info_t *info, int s_first, int s_last)
1058 if (info->flash_id != FLASH_MAN_CFI) {
1059 puts("Can't erase unknown flash type - aborted\n");
1062 if (s_first < 0 || s_first > s_last) {
1063 puts("- no sectors to erase\n");
1068 for (sect = s_first; sect <= s_last; ++sect)
1069 if (info->protect[sect])
1072 printf("- Warning: %d protected sectors will not be erased!\n",
1074 } else if (flash_verbose) {
1078 for (sect = s_first; sect <= s_last; sect++) {
1084 if (info->protect[sect] == 0) { /* not protected */
1085 #ifdef CONFIG_SYS_FLASH_CHECK_BLANK_BEFORE_ERASE
1092 * Check if whole sector is erased
1094 size = flash_sector_size(info, sect);
1096 flash = (u32 *)info->start[sect];
1097 /* divide by 4 for longword access */
1099 for (k = 0; k < size; k++) {
1100 if (flash_read32(flash++) != 0xffffffff) {
1111 switch (info->vendor) {
1112 case CFI_CMDSET_INTEL_PROG_REGIONS:
1113 case CFI_CMDSET_INTEL_STANDARD:
1114 case CFI_CMDSET_INTEL_EXTENDED:
1115 flash_write_cmd(info, sect, 0,
1116 FLASH_CMD_CLEAR_STATUS);
1117 flash_write_cmd(info, sect, 0,
1118 FLASH_CMD_BLOCK_ERASE);
1119 flash_write_cmd(info, sect, 0,
1120 FLASH_CMD_ERASE_CONFIRM);
1122 case CFI_CMDSET_AMD_STANDARD:
1123 case CFI_CMDSET_AMD_EXTENDED:
1124 flash_unlock_seq(info, sect);
1125 flash_write_cmd(info, sect,
1127 AMD_CMD_ERASE_START);
1128 flash_unlock_seq(info, sect);
1129 flash_write_cmd(info, sect, 0,
1130 info->cmd_erase_sector);
1132 #ifdef CONFIG_FLASH_CFI_LEGACY
1133 case CFI_CMDSET_AMD_LEGACY:
1134 flash_unlock_seq(info, 0);
1135 flash_write_cmd(info, 0, info->addr_unlock1,
1136 AMD_CMD_ERASE_START);
1137 flash_unlock_seq(info, 0);
1138 flash_write_cmd(info, sect, 0,
1139 AMD_CMD_ERASE_SECTOR);
1143 debug("Unkown flash vendor %d\n",
1148 if (use_flash_status_poll(info)) {
1152 cword.w64 = 0xffffffffffffffffULL;
1153 dest = flash_map(info, sect, 0);
1154 st = flash_status_poll(info, &cword, dest,
1155 info->erase_blk_tout, "erase");
1156 flash_unmap(info, sect, 0, dest);
1158 st = flash_full_status_check(info, sect,
1159 info->erase_blk_tout,
1163 else if (flash_verbose)
1174 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1175 static int sector_erased(flash_info_t *info, int i)
1182 * Check if whole sector is erased
1184 size = flash_sector_size(info, i);
1185 flash = (u32 *)info->start[i];
1186 /* divide by 4 for longword access */
1189 for (k = 0; k < size; k++) {
1190 if (flash_read32(flash++) != 0xffffffff)
1191 return 0; /* not erased */
1194 return 1; /* erased */
1196 #endif /* CONFIG_SYS_FLASH_EMPTY_INFO */
1198 void flash_print_info(flash_info_t *info)
1202 if (info->flash_id != FLASH_MAN_CFI) {
1203 puts("missing or unknown FLASH type\n");
1207 printf("%s flash (%d x %d)",
1209 (info->portwidth << 3), (info->chipwidth << 3));
1210 if (info->size < 1024 * 1024)
1211 printf(" Size: %ld kB in %d Sectors\n",
1212 info->size >> 10, info->sector_count);
1214 printf(" Size: %ld MB in %d Sectors\n",
1215 info->size >> 20, info->sector_count);
1217 switch (info->vendor) {
1218 case CFI_CMDSET_INTEL_PROG_REGIONS:
1219 printf("Intel Prog Regions");
1221 case CFI_CMDSET_INTEL_STANDARD:
1222 printf("Intel Standard");
1224 case CFI_CMDSET_INTEL_EXTENDED:
1225 printf("Intel Extended");
1227 case CFI_CMDSET_AMD_STANDARD:
1228 printf("AMD Standard");
1230 case CFI_CMDSET_AMD_EXTENDED:
1231 printf("AMD Extended");
1233 #ifdef CONFIG_FLASH_CFI_LEGACY
1234 case CFI_CMDSET_AMD_LEGACY:
1235 printf("AMD Legacy");
1239 printf("Unknown (%d)", info->vendor);
1242 printf(" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
1243 info->manufacturer_id);
1244 printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
1246 if ((info->device_id & 0xff) == 0x7E) {
1247 printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
1250 if (info->vendor == CFI_CMDSET_AMD_STANDARD && info->legacy_unlock)
1251 printf("\n Advanced Sector Protection (PPB) enabled");
1252 printf("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
1253 info->erase_blk_tout,
1255 if (info->buffer_size > 1) {
1256 printf(" Buffer write timeout: %ld ms, "
1257 "buffer size: %d bytes\n",
1258 info->buffer_write_tout,
1262 puts("\n Sector Start Addresses:");
1263 for (i = 0; i < info->sector_count; ++i) {
1268 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1269 /* print empty and read-only info */
1270 printf(" %08lX %c %s ",
1272 sector_erased(info, i) ? 'E' : ' ',
1273 info->protect[i] ? "RO" : " ");
1274 #else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
1275 printf(" %08lX %s ",
1277 info->protect[i] ? "RO" : " ");
1284 /*-----------------------------------------------------------------------
1285 * This is used in a few places in write_buf() to show programming
1286 * progress. Making it a function is nasty because it needs to do side
1287 * effect updates to digit and dots. Repeated code is nasty too, so
1288 * we define it once here.
1290 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1291 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
1292 if (flash_verbose) { \
1294 if (scale > 0 && dots <= 0) { \
1295 if ((digit % 5) == 0) \
1296 printf("%d", digit / 5); \
1304 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
1307 /*-----------------------------------------------------------------------
1308 * Copy memory to flash, returns:
1311 * 2 - Flash not erased
1313 int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
1320 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1323 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1324 int digit = CONFIG_FLASH_SHOW_PROGRESS;
1329 * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
1331 if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
1332 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
1333 CONFIG_FLASH_SHOW_PROGRESS);
1337 /* get lower aligned address */
1338 wp = (addr & ~(info->portwidth - 1));
1340 /* handle unaligned start */
1341 if ((aln = addr - wp) != 0) {
1344 for (i = 0; i < aln; ++i)
1345 flash_add_byte(info, &cword, flash_read8(p + i));
1347 for (; (i < info->portwidth) && (cnt > 0); i++) {
1348 flash_add_byte(info, &cword, *src++);
1351 for (; (cnt == 0) && (i < info->portwidth); ++i)
1352 flash_add_byte(info, &cword, flash_read8(p + i));
1354 rc = flash_write_cfiword(info, wp, cword);
1359 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1362 /* handle the aligned part */
1363 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1364 buffered_size = (info->portwidth / info->chipwidth);
1365 buffered_size *= info->buffer_size;
1366 while (cnt >= info->portwidth) {
1367 /* prohibit buffer write when buffer_size is 1 */
1368 if (info->buffer_size == 1) {
1370 for (i = 0; i < info->portwidth; i++)
1371 flash_add_byte(info, &cword, *src++);
1372 if ((rc = flash_write_cfiword(info, wp, cword)) != 0)
1374 wp += info->portwidth;
1375 cnt -= info->portwidth;
1379 /* write buffer until next buffered_size aligned boundary */
1380 i = buffered_size - (wp % buffered_size);
1383 if ((rc = flash_write_cfibuffer(info, wp, src, i)) != ERR_OK)
1385 i -= i & (info->portwidth - 1);
1389 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1390 /* Only check every once in a while */
1391 if ((cnt & 0xFFFF) < buffered_size && ctrlc())
1395 while (cnt >= info->portwidth) {
1397 for (i = 0; i < info->portwidth; i++)
1398 flash_add_byte(info, &cword, *src++);
1399 if ((rc = flash_write_cfiword(info, wp, cword)) != 0)
1401 wp += info->portwidth;
1402 cnt -= info->portwidth;
1403 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
1404 /* Only check every once in a while */
1405 if ((cnt & 0xFFFF) < info->portwidth && ctrlc())
1408 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1414 * handle unaligned tail bytes
1418 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
1419 flash_add_byte(info, &cword, *src++);
1422 for (; i < info->portwidth; ++i)
1423 flash_add_byte(info, &cword, flash_read8(p + i));
1425 return flash_write_cfiword(info, wp, cword);
1428 static inline int manufact_match(flash_info_t *info, u32 manu)
1430 return info->manufacturer_id == ((manu & FLASH_VENDMASK) >> 16);
1433 /*-----------------------------------------------------------------------
1435 #ifdef CONFIG_SYS_FLASH_PROTECTION
1437 static int cfi_protect_bugfix(flash_info_t *info, long sector, int prot)
1439 if (manufact_match(info, INTEL_MANUFACT) &&
1440 info->device_id == NUMONYX_256MBIT) {
1443 * "Numonyx Axcell P33/P30 Specification Update" :)
1445 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_ID);
1446 if (!flash_isequal(info, sector, FLASH_OFFSET_PROTECT,
1449 * cmd must come before FLASH_CMD_PROTECT + 20us
1450 * Disable interrupts which might cause a timeout here.
1452 int flag = disable_interrupts();
1456 cmd = FLASH_CMD_PROTECT_SET;
1458 cmd = FLASH_CMD_PROTECT_CLEAR;
1460 flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
1461 flash_write_cmd(info, sector, 0, cmd);
1462 /* re-enable interrupts if necessary */
1464 enable_interrupts();
1471 int flash_real_protect(flash_info_t *info, long sector, int prot)
1475 switch (info->vendor) {
1476 case CFI_CMDSET_INTEL_PROG_REGIONS:
1477 case CFI_CMDSET_INTEL_STANDARD:
1478 case CFI_CMDSET_INTEL_EXTENDED:
1479 if (!cfi_protect_bugfix(info, sector, prot)) {
1480 flash_write_cmd(info, sector, 0,
1481 FLASH_CMD_CLEAR_STATUS);
1482 flash_write_cmd(info, sector, 0,
1485 flash_write_cmd(info, sector, 0,
1486 FLASH_CMD_PROTECT_SET);
1488 flash_write_cmd(info, sector, 0,
1489 FLASH_CMD_PROTECT_CLEAR);
1492 case CFI_CMDSET_AMD_EXTENDED:
1493 case CFI_CMDSET_AMD_STANDARD:
1494 /* U-Boot only checks the first byte */
1495 if (manufact_match(info, ATM_MANUFACT)) {
1497 flash_unlock_seq(info, 0);
1498 flash_write_cmd(info, 0,
1500 ATM_CMD_SOFTLOCK_START);
1501 flash_unlock_seq(info, 0);
1502 flash_write_cmd(info, sector, 0,
1505 flash_write_cmd(info, 0,
1507 AMD_CMD_UNLOCK_START);
1508 if (info->device_id == ATM_ID_BV6416)
1509 flash_write_cmd(info, sector,
1510 0, ATM_CMD_UNLOCK_SECT);
1513 if (info->legacy_unlock) {
1514 int flag = disable_interrupts();
1517 flash_unlock_seq(info, 0);
1518 flash_write_cmd(info, 0, info->addr_unlock1,
1519 AMD_CMD_SET_PPB_ENTRY);
1520 lock_flag = flash_isset(info, sector, 0, 0x01);
1523 flash_write_cmd(info, sector, 0,
1524 AMD_CMD_PPB_LOCK_BC1);
1525 flash_write_cmd(info, sector, 0,
1526 AMD_CMD_PPB_LOCK_BC2);
1528 debug("sector %ld %slocked\n", sector,
1529 lock_flag ? "" : "already ");
1532 debug("unlock %ld\n", sector);
1533 flash_write_cmd(info, 0, 0,
1534 AMD_CMD_PPB_UNLOCK_BC1);
1535 flash_write_cmd(info, 0, 0,
1536 AMD_CMD_PPB_UNLOCK_BC2);
1538 debug("sector %ld %sunlocked\n", sector,
1539 !lock_flag ? "" : "already ");
1542 enable_interrupts();
1544 if (flash_status_check(info, sector,
1545 info->erase_blk_tout,
1546 prot ? "protect" : "unprotect"))
1547 printf("status check error\n");
1549 flash_write_cmd(info, 0, 0,
1550 AMD_CMD_SET_PPB_EXIT_BC1);
1551 flash_write_cmd(info, 0, 0,
1552 AMD_CMD_SET_PPB_EXIT_BC2);
1555 #ifdef CONFIG_FLASH_CFI_LEGACY
1556 case CFI_CMDSET_AMD_LEGACY:
1557 flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1558 flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
1560 flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_SET);
1562 flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
1567 * Flash needs to be in status register read mode for
1568 * flash_full_status_check() to work correctly
1570 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
1572 flash_full_status_check(info, sector, info->erase_blk_tout,
1573 prot ? "protect" : "unprotect")) == 0) {
1574 info->protect[sector] = prot;
1577 * On some of Intel's flash chips (marked via legacy_unlock)
1578 * unprotect unprotects all locking.
1580 if (prot == 0 && info->legacy_unlock) {
1583 for (i = 0; i < info->sector_count; i++) {
1584 if (info->protect[i])
1585 flash_real_protect(info, i, 1);
1592 /*-----------------------------------------------------------------------
1593 * flash_read_user_serial - read the OneTimeProgramming cells
1595 void flash_read_user_serial(flash_info_t *info, void *buffer, int offset,
1602 src = flash_map(info, 0, FLASH_OFFSET_USER_PROTECTION);
1603 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1604 memcpy(dst, src + offset, len);
1605 flash_write_cmd(info, 0, 0, info->cmd_reset);
1607 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
1611 * flash_read_factory_serial - read the device Id from the protection area
1613 void flash_read_factory_serial(flash_info_t *info, void *buffer, int offset,
1618 src = flash_map(info, 0, FLASH_OFFSET_INTEL_PROTECTION);
1619 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1620 memcpy(buffer, src + offset, len);
1621 flash_write_cmd(info, 0, 0, info->cmd_reset);
1623 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
1626 #endif /* CONFIG_SYS_FLASH_PROTECTION */
1628 /*-----------------------------------------------------------------------
1629 * Reverse the order of the erase regions in the CFI QRY structure.
1630 * This is needed for chips that are either a) correctly detected as
1631 * top-boot, or b) buggy.
1633 static void cfi_reverse_geometry(struct cfi_qry *qry)
1638 for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
1639 tmp = get_unaligned(&qry->erase_region_info[i]);
1640 put_unaligned(get_unaligned(&qry->erase_region_info[j]),
1641 &qry->erase_region_info[i]);
1642 put_unaligned(tmp, &qry->erase_region_info[j]);
1646 /*-----------------------------------------------------------------------
1647 * read jedec ids from device and set corresponding fields in info struct
1649 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1652 static void cmdset_intel_read_jedec_ids(flash_info_t *info)
1654 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1656 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1657 udelay(1000); /* some flash are slow to respond */
1658 info->manufacturer_id = flash_read_uchar(info,
1659 FLASH_OFFSET_MANUFACTURER_ID);
1660 info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ?
1661 flash_read_word(info, FLASH_OFFSET_DEVICE_ID) :
1662 flash_read_uchar(info, FLASH_OFFSET_DEVICE_ID);
1663 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1666 static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
1668 info->cmd_reset = FLASH_CMD_RESET;
1670 cmdset_intel_read_jedec_ids(info);
1671 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1673 #ifdef CONFIG_SYS_FLASH_PROTECTION
1674 /* read legacy lock/unlock bit from intel flash */
1675 if (info->ext_addr) {
1676 info->legacy_unlock = flash_read_uchar(info,
1677 info->ext_addr + 5) & 0x08;
1684 static void cmdset_amd_read_jedec_ids(flash_info_t *info)
1690 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1691 flash_unlock_seq(info, 0);
1692 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1693 udelay(1000); /* some flash are slow to respond */
1695 manuId = flash_read_uchar(info, FLASH_OFFSET_MANUFACTURER_ID);
1696 /* JEDEC JEP106Z specifies ID codes up to bank 7 */
1697 while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) {
1699 manuId = flash_read_uchar(info,
1700 bankId | FLASH_OFFSET_MANUFACTURER_ID);
1702 info->manufacturer_id = manuId;
1704 debug("info->ext_addr = 0x%x, cfi_version = 0x%x\n",
1705 info->ext_addr, info->cfi_version);
1706 if (info->ext_addr && info->cfi_version >= 0x3134) {
1707 /* read software feature (at 0x53) */
1708 feature = flash_read_uchar(info, info->ext_addr + 0x13);
1709 debug("feature = 0x%x\n", feature);
1710 info->sr_supported = feature & 0x1;
1713 switch (info->chipwidth) {
1714 case FLASH_CFI_8BIT:
1715 info->device_id = flash_read_uchar(info,
1716 FLASH_OFFSET_DEVICE_ID);
1717 if (info->device_id == 0x7E) {
1718 /* AMD 3-byte (expanded) device ids */
1719 info->device_id2 = flash_read_uchar(info,
1720 FLASH_OFFSET_DEVICE_ID2);
1721 info->device_id2 <<= 8;
1722 info->device_id2 |= flash_read_uchar(info,
1723 FLASH_OFFSET_DEVICE_ID3);
1726 case FLASH_CFI_16BIT:
1727 info->device_id = flash_read_word(info,
1728 FLASH_OFFSET_DEVICE_ID);
1729 if ((info->device_id & 0xff) == 0x7E) {
1730 /* AMD 3-byte (expanded) device ids */
1731 info->device_id2 = flash_read_uchar(info,
1732 FLASH_OFFSET_DEVICE_ID2);
1733 info->device_id2 <<= 8;
1734 info->device_id2 |= flash_read_uchar(info,
1735 FLASH_OFFSET_DEVICE_ID3);
1741 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1745 static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
1747 info->cmd_reset = AMD_CMD_RESET;
1748 info->cmd_erase_sector = AMD_CMD_ERASE_SECTOR;
1750 cmdset_amd_read_jedec_ids(info);
1751 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1753 #ifdef CONFIG_SYS_FLASH_PROTECTION
1754 if (info->ext_addr) {
1755 /* read sector protect/unprotect scheme (at 0x49) */
1756 if (flash_read_uchar(info, info->ext_addr + 9) == 0x8)
1757 info->legacy_unlock = 1;
1764 #ifdef CONFIG_FLASH_CFI_LEGACY
1765 static void flash_read_jedec_ids(flash_info_t *info)
1767 info->manufacturer_id = 0;
1768 info->device_id = 0;
1769 info->device_id2 = 0;
1771 switch (info->vendor) {
1772 case CFI_CMDSET_INTEL_PROG_REGIONS:
1773 case CFI_CMDSET_INTEL_STANDARD:
1774 case CFI_CMDSET_INTEL_EXTENDED:
1775 cmdset_intel_read_jedec_ids(info);
1777 case CFI_CMDSET_AMD_STANDARD:
1778 case CFI_CMDSET_AMD_EXTENDED:
1779 cmdset_amd_read_jedec_ids(info);
1786 /*-----------------------------------------------------------------------
1787 * Call board code to request info about non-CFI flash.
1788 * board_flash_get_legacy needs to fill in at least:
1789 * info->portwidth, info->chipwidth and info->interface for Jedec probing.
1791 static int flash_detect_legacy(phys_addr_t base, int banknum)
1793 flash_info_t *info = &flash_info[banknum];
1795 if (board_flash_get_legacy(base, banknum, info)) {
1796 /* board code may have filled info completely. If not, we
1797 * use JEDEC ID probing.
1799 if (!info->vendor) {
1801 CFI_CMDSET_AMD_STANDARD,
1802 CFI_CMDSET_INTEL_STANDARD
1806 for (i = 0; i < ARRAY_SIZE(modes); i++) {
1807 info->vendor = modes[i];
1809 (ulong)map_physmem(base,
1812 if (info->portwidth == FLASH_CFI_8BIT &&
1813 info->interface == FLASH_CFI_X8X16) {
1814 info->addr_unlock1 = 0x2AAA;
1815 info->addr_unlock2 = 0x5555;
1817 info->addr_unlock1 = 0x5555;
1818 info->addr_unlock2 = 0x2AAA;
1820 flash_read_jedec_ids(info);
1821 debug("JEDEC PROBE: ID %x %x %x\n",
1822 info->manufacturer_id,
1825 if (jedec_flash_match(info, info->start[0]))
1828 unmap_physmem((void *)info->start[0],
1833 switch (info->vendor) {
1834 case CFI_CMDSET_INTEL_PROG_REGIONS:
1835 case CFI_CMDSET_INTEL_STANDARD:
1836 case CFI_CMDSET_INTEL_EXTENDED:
1837 info->cmd_reset = FLASH_CMD_RESET;
1839 case CFI_CMDSET_AMD_STANDARD:
1840 case CFI_CMDSET_AMD_EXTENDED:
1841 case CFI_CMDSET_AMD_LEGACY:
1842 info->cmd_reset = AMD_CMD_RESET;
1845 info->flash_id = FLASH_MAN_CFI;
1848 return 0; /* use CFI */
1851 static inline int flash_detect_legacy(phys_addr_t base, int banknum)
1853 return 0; /* use CFI */
1857 /*-----------------------------------------------------------------------
1858 * detect if flash is compatible with the Common Flash Interface (CFI)
1859 * http://www.jedec.org/download/search/jesd68.pdf
1861 static void flash_read_cfi(flash_info_t *info, void *buf,
1862 unsigned int start, size_t len)
1867 for (i = 0; i < len; i++)
1868 p[i] = flash_read_uchar(info, start + i);
1871 static void __flash_cmd_reset(flash_info_t *info)
1874 * We do not yet know what kind of commandset to use, so we issue
1875 * the reset command in both Intel and AMD variants, in the hope
1876 * that AMD flash roms ignore the Intel command.
1878 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1880 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1883 void flash_cmd_reset(flash_info_t *info)
1884 __attribute__((weak, alias("__flash_cmd_reset")));
1886 static int __flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
1890 /* Issue FLASH reset command */
1891 flash_cmd_reset(info);
1893 for (cfi_offset = 0; cfi_offset < ARRAY_SIZE(flash_offset_cfi);
1895 flash_write_cmd(info, 0, flash_offset_cfi[cfi_offset],
1897 if (flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP, 'Q') &&
1898 flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') &&
1899 flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1900 flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
1901 sizeof(struct cfi_qry));
1902 info->interface = le16_to_cpu(qry->interface_desc);
1904 info->cfi_offset = flash_offset_cfi[cfi_offset];
1905 debug("device interface is %d\n",
1907 debug("found port %d chip %d ",
1908 info->portwidth, info->chipwidth);
1909 debug("port %d bits chip %d bits\n",
1910 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1911 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1913 /* calculate command offsets as in the Linux driver */
1914 info->addr_unlock1 = 0x555;
1915 info->addr_unlock2 = 0x2aa;
1918 * modify the unlock address if we are
1919 * in compatibility mode
1921 if (/* x8/x16 in x8 mode */
1922 (info->chipwidth == FLASH_CFI_BY8 &&
1923 info->interface == FLASH_CFI_X8X16) ||
1924 /* x16/x32 in x16 mode */
1925 (info->chipwidth == FLASH_CFI_BY16 &&
1926 info->interface == FLASH_CFI_X16X32))
1928 info->addr_unlock1 = 0xaaa;
1929 info->addr_unlock2 = 0x555;
1932 info->name = "CFI conformant";
1940 static int flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
1942 debug("flash detect cfi\n");
1944 for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
1945 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1946 for (info->chipwidth = FLASH_CFI_BY8;
1947 info->chipwidth <= info->portwidth;
1948 info->chipwidth <<= 1)
1949 if (__flash_detect_cfi(info, qry))
1952 debug("not found\n");
1957 * Manufacturer-specific quirks. Add workarounds for geometry
1958 * reversal, etc. here.
1960 static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
1962 /* check if flash geometry needs reversal */
1963 if (qry->num_erase_regions > 1) {
1964 /* reverse geometry if top boot part */
1965 if (info->cfi_version < 0x3131) {
1966 /* CFI < 1.1, try to guess from device id */
1967 if ((info->device_id & 0x80) != 0)
1968 cfi_reverse_geometry(qry);
1969 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1970 /* CFI >= 1.1, deduct from top/bottom flag */
1971 /* note: ext_addr is valid since cfi_version > 0 */
1972 cfi_reverse_geometry(qry);
1977 static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
1979 int reverse_geometry = 0;
1981 /* Check the "top boot" bit in the PRI */
1982 if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
1983 reverse_geometry = 1;
1985 /* AT49BV6416(T) list the erase regions in the wrong order.
1986 * However, the device ID is identical with the non-broken
1987 * AT49BV642D they differ in the high byte.
1989 if (info->device_id == 0xd6 || info->device_id == 0xd2)
1990 reverse_geometry = !reverse_geometry;
1992 if (reverse_geometry)
1993 cfi_reverse_geometry(qry);
1996 static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
1998 /* check if flash geometry needs reversal */
1999 if (qry->num_erase_regions > 1) {
2000 /* reverse geometry if top boot part */
2001 if (info->cfi_version < 0x3131) {
2002 /* CFI < 1.1, guess by device id */
2003 if (info->device_id == 0x22CA || /* M29W320DT */
2004 info->device_id == 0x2256 || /* M29W320ET */
2005 info->device_id == 0x22D7) { /* M29W800DT */
2006 cfi_reverse_geometry(qry);
2008 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
2009 /* CFI >= 1.1, deduct from top/bottom flag */
2010 /* note: ext_addr is valid since cfi_version > 0 */
2011 cfi_reverse_geometry(qry);
2016 static void flash_fixup_sst(flash_info_t *info, struct cfi_qry *qry)
2019 * SST, for many recent nor parallel flashes, says they are
2020 * CFI-conformant. This is not true, since qry struct.
2021 * reports a std. AMD command set (0x0002), while SST allows to
2022 * erase two different sector sizes for the same memory.
2023 * 64KB sector (SST call it block) needs 0x30 to be erased.
2024 * 4KB sector (SST call it sector) needs 0x50 to be erased.
2025 * Since CFI query detect the 4KB number of sectors, users expects
2026 * a sector granularity of 4KB, and it is here set.
2028 if (info->device_id == 0x5D23 || /* SST39VF3201B */
2029 info->device_id == 0x5C23) { /* SST39VF3202B */
2030 /* set sector granularity to 4KB */
2031 info->cmd_erase_sector = 0x50;
2035 static void flash_fixup_num(flash_info_t *info, struct cfi_qry *qry)
2038 * The M29EW devices seem to report the CFI information wrong
2039 * when it's in 8 bit mode.
2040 * There's an app note from Numonyx on this issue.
2041 * So adjust the buffer size for M29EW while operating in 8-bit mode
2043 if (qry->max_buf_write_size > 0x8 &&
2044 info->device_id == 0x7E &&
2045 (info->device_id2 == 0x2201 ||
2046 info->device_id2 == 0x2301 ||
2047 info->device_id2 == 0x2801 ||
2048 info->device_id2 == 0x4801)) {
2049 debug("Adjusted buffer size on Numonyx flash"
2050 " M29EW family in 8 bit mode\n");
2051 qry->max_buf_write_size = 0x8;
2056 * The following code cannot be run from FLASH!
2059 ulong flash_get_size(phys_addr_t base, int banknum)
2061 flash_info_t *info = &flash_info[banknum];
2063 flash_sect_t sect_cnt;
2067 uchar num_erase_regions;
2068 int erase_region_size;
2069 int erase_region_count;
2071 unsigned long max_size;
2073 memset(&qry, 0, sizeof(qry));
2076 info->cfi_version = 0;
2077 #ifdef CONFIG_SYS_FLASH_PROTECTION
2078 info->legacy_unlock = 0;
2081 info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
2083 if (flash_detect_cfi(info, &qry)) {
2084 info->vendor = le16_to_cpu(get_unaligned(&qry.p_id));
2085 info->ext_addr = le16_to_cpu(get_unaligned(&qry.p_adr));
2086 num_erase_regions = qry.num_erase_regions;
2088 if (info->ext_addr) {
2089 info->cfi_version = (ushort)flash_read_uchar(info,
2090 info->ext_addr + 3) << 8;
2091 info->cfi_version |= (ushort)flash_read_uchar(info,
2092 info->ext_addr + 4);
2096 flash_printqry(&qry);
2099 switch (info->vendor) {
2100 case CFI_CMDSET_INTEL_PROG_REGIONS:
2101 case CFI_CMDSET_INTEL_STANDARD:
2102 case CFI_CMDSET_INTEL_EXTENDED:
2103 cmdset_intel_init(info, &qry);
2105 case CFI_CMDSET_AMD_STANDARD:
2106 case CFI_CMDSET_AMD_EXTENDED:
2107 cmdset_amd_init(info, &qry);
2110 printf("CFI: Unknown command set 0x%x\n",
2113 * Unfortunately, this means we don't know how
2114 * to get the chip back to Read mode. Might
2115 * as well try an Intel-style reset...
2117 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
2121 /* Do manufacturer-specific fixups */
2122 switch (info->manufacturer_id) {
2123 case 0x0001: /* AMD */
2124 case 0x0037: /* AMIC */
2125 flash_fixup_amd(info, &qry);
2128 flash_fixup_atmel(info, &qry);
2131 flash_fixup_stm(info, &qry);
2133 case 0x00bf: /* SST */
2134 flash_fixup_sst(info, &qry);
2136 case 0x0089: /* Numonyx */
2137 flash_fixup_num(info, &qry);
2141 debug("manufacturer is %d\n", info->vendor);
2142 debug("manufacturer id is 0x%x\n", info->manufacturer_id);
2143 debug("device id is 0x%x\n", info->device_id);
2144 debug("device id2 is 0x%x\n", info->device_id2);
2145 debug("cfi version is 0x%04x\n", info->cfi_version);
2147 size_ratio = info->portwidth / info->chipwidth;
2148 /* if the chip is x8/x16 reduce the ratio by half */
2149 if (info->interface == FLASH_CFI_X8X16 &&
2150 info->chipwidth == FLASH_CFI_BY8) {
2153 debug("size_ratio %d port %d bits chip %d bits\n",
2154 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
2155 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
2156 info->size = 1 << qry.dev_size;
2157 /* multiply the size by the number of chips */
2158 info->size *= size_ratio;
2159 max_size = cfi_flash_bank_size(banknum);
2160 if (max_size && info->size > max_size) {
2161 debug("[truncated from %ldMiB]", info->size >> 20);
2162 info->size = max_size;
2164 debug("found %d erase regions\n", num_erase_regions);
2167 for (i = 0; i < num_erase_regions; i++) {
2168 if (i > NUM_ERASE_REGIONS) {
2169 printf("%d erase regions found, only %d used\n",
2170 num_erase_regions, NUM_ERASE_REGIONS);
2174 tmp = le32_to_cpu(get_unaligned(
2175 &qry.erase_region_info[i]));
2176 debug("erase region %u: 0x%08lx\n", i, tmp);
2178 erase_region_count = (tmp & 0xffff) + 1;
2181 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
2182 debug("erase_region_count = %d erase_region_size = %d\n",
2183 erase_region_count, erase_region_size);
2184 for (j = 0; j < erase_region_count; j++) {
2185 if (sector - base >= info->size)
2187 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
2188 printf("ERROR: too many flash sectors\n");
2191 info->start[sect_cnt] =
2192 (ulong)map_physmem(sector,
2195 sector += (erase_region_size * size_ratio);
2198 * Only read protection status from
2199 * supported devices (intel...)
2201 switch (info->vendor) {
2202 case CFI_CMDSET_INTEL_PROG_REGIONS:
2203 case CFI_CMDSET_INTEL_EXTENDED:
2204 case CFI_CMDSET_INTEL_STANDARD:
2206 * Set flash to read-id mode. Otherwise
2207 * reading protected status is not
2210 flash_write_cmd(info, sect_cnt, 0,
2212 info->protect[sect_cnt] =
2213 flash_isset(info, sect_cnt,
2214 FLASH_OFFSET_PROTECT,
2215 FLASH_STATUS_PROTECT);
2216 flash_write_cmd(info, sect_cnt, 0,
2219 case CFI_CMDSET_AMD_EXTENDED:
2220 case CFI_CMDSET_AMD_STANDARD:
2221 if (!info->legacy_unlock) {
2222 /* default: not protected */
2223 info->protect[sect_cnt] = 0;
2227 /* Read protection (PPB) from sector */
2228 flash_write_cmd(info, 0, 0,
2230 flash_unlock_seq(info, 0);
2231 flash_write_cmd(info, 0,
2234 info->protect[sect_cnt] =
2237 FLASH_OFFSET_PROTECT,
2238 FLASH_STATUS_PROTECT);
2241 /* default: not protected */
2242 info->protect[sect_cnt] = 0;
2249 info->sector_count = sect_cnt;
2250 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
2251 tmp = 1 << qry.block_erase_timeout_typ;
2252 info->erase_blk_tout = tmp *
2253 (1 << qry.block_erase_timeout_max);
2254 tmp = (1 << qry.buf_write_timeout_typ) *
2255 (1 << qry.buf_write_timeout_max);
2257 /* round up when converting to ms */
2258 info->buffer_write_tout = (tmp + 999) / 1000;
2259 tmp = (1 << qry.word_write_timeout_typ) *
2260 (1 << qry.word_write_timeout_max);
2261 /* round up when converting to ms */
2262 info->write_tout = (tmp + 999) / 1000;
2263 info->flash_id = FLASH_MAN_CFI;
2264 if (info->interface == FLASH_CFI_X8X16 &&
2265 info->chipwidth == FLASH_CFI_BY8) {
2266 /* XXX - Need to test on x8/x16 in parallel. */
2267 info->portwidth >>= 1;
2270 flash_write_cmd(info, 0, 0, info->cmd_reset);
2273 return (info->size);
2276 #ifdef CONFIG_FLASH_CFI_MTD
2277 void flash_set_verbose(uint v)
2283 static void cfi_flash_set_config_reg(u32 base, u16 val)
2285 #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
2287 * Only set this config register if really defined
2288 * to a valid value (0xffff is invalid)
2294 * Set configuration register. Data is "encrypted" in the 16 lower
2297 flash_write16(FLASH_CMD_SETUP, (void *)(base + (val << 1)));
2298 flash_write16(FLASH_CMD_SET_CR_CONFIRM, (void *)(base + (val << 1)));
2301 * Finally issue reset-command to bring device back to
2304 flash_write16(FLASH_CMD_RESET, (void *)base);
2308 /*-----------------------------------------------------------------------
2311 static void flash_protect_default(void)
2313 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2318 } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
2321 /* Monitor protection ON by default */
2322 #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
2323 (!defined(CONFIG_MONITOR_IS_IN_RAM))
2324 flash_protect(FLAG_PROTECT_SET,
2325 CONFIG_SYS_MONITOR_BASE,
2326 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
2327 flash_get_info(CONFIG_SYS_MONITOR_BASE));
2330 /* Environment protection ON by default */
2331 #ifdef CONFIG_ENV_IS_IN_FLASH
2332 flash_protect(FLAG_PROTECT_SET,
2334 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
2335 flash_get_info(CONFIG_ENV_ADDR));
2338 /* Redundant environment protection ON by default */
2339 #ifdef CONFIG_ENV_ADDR_REDUND
2340 flash_protect(FLAG_PROTECT_SET,
2341 CONFIG_ENV_ADDR_REDUND,
2342 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
2343 flash_get_info(CONFIG_ENV_ADDR_REDUND));
2346 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2347 for (i = 0; i < ARRAY_SIZE(apl); i++) {
2348 debug("autoprotecting from %08lx to %08lx\n",
2349 apl[i].start, apl[i].start + apl[i].size - 1);
2350 flash_protect(FLAG_PROTECT_SET,
2352 apl[i].start + apl[i].size - 1,
2353 flash_get_info(apl[i].start));
2358 unsigned long flash_init(void)
2360 unsigned long size = 0;
2363 #ifdef CONFIG_SYS_FLASH_PROTECTION
2364 /* read environment from EEPROM */
2367 env_get_f("unlock", s, sizeof(s));
2370 #ifdef CONFIG_CFI_FLASH /* for driver model */
2371 cfi_flash_init_dm();
2374 /* Init: no FLASHes known */
2375 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
2376 flash_info[i].flash_id = FLASH_UNKNOWN;
2378 /* Optionally write flash configuration register */
2379 cfi_flash_set_config_reg(cfi_flash_bank_addr(i),
2380 cfi_flash_config_reg(i));
2382 if (!flash_detect_legacy(cfi_flash_bank_addr(i), i))
2383 flash_get_size(cfi_flash_bank_addr(i), i);
2384 size += flash_info[i].size;
2385 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
2386 #ifndef CONFIG_SYS_FLASH_QUIET_TEST
2387 printf("## Unknown flash on Bank %d "
2388 "- Size = 0x%08lx = %ld MB\n",
2389 i + 1, flash_info[i].size,
2390 flash_info[i].size >> 20);
2391 #endif /* CONFIG_SYS_FLASH_QUIET_TEST */
2393 #ifdef CONFIG_SYS_FLASH_PROTECTION
2394 else if (strcmp(s, "yes") == 0) {
2396 * Only the U-Boot image and it's environment
2397 * is protected, all other sectors are
2398 * unprotected (unlocked) if flash hardware
2399 * protection is used (CONFIG_SYS_FLASH_PROTECTION)
2400 * and the environment variable "unlock" is
2403 if (flash_info[i].legacy_unlock) {
2407 * Disable legacy_unlock temporarily,
2408 * since flash_real_protect would
2409 * relock all other sectors again
2412 flash_info[i].legacy_unlock = 0;
2415 * Legacy unlocking (e.g. Intel J3) ->
2416 * unlock only one sector. This will
2417 * unlock all sectors.
2419 flash_real_protect(&flash_info[i], 0, 0);
2421 flash_info[i].legacy_unlock = 1;
2424 * Manually mark other sectors as
2425 * unlocked (unprotected)
2427 for (k = 1; k < flash_info[i].sector_count; k++)
2428 flash_info[i].protect[k] = 0;
2431 * No legancy unlocking -> unlock all sectors
2433 flash_protect(FLAG_PROTECT_CLEAR,
2434 flash_info[i].start[0],
2435 flash_info[i].start[0]
2436 + flash_info[i].size - 1,
2440 #endif /* CONFIG_SYS_FLASH_PROTECTION */
2443 flash_protect_default();
2444 #ifdef CONFIG_FLASH_CFI_MTD
2451 #ifdef CONFIG_CFI_FLASH /* for driver model */
2452 static int cfi_flash_probe(struct udevice *dev)
2454 void *blob = (void *)gd->fdt_blob;
2455 int node = dev_of_offset(dev);
2456 const fdt32_t *cell;
2458 int parent, addrc, sizec;
2461 parent = fdt_parent_offset(blob, node);
2462 fdt_support_default_count_cells(blob, parent, &addrc, &sizec);
2463 /* decode regs, there may be multiple reg tuples. */
2464 cell = fdt_getprop(blob, node, "reg", &len);
2468 len /= sizeof(fdt32_t);
2470 addr = fdt_translate_address((void *)blob,
2472 flash_info[cfi_flash_num_flash_banks].dev = dev;
2473 flash_info[cfi_flash_num_flash_banks].base = addr;
2474 cfi_flash_num_flash_banks++;
2475 idx += addrc + sizec;
2477 gd->bd->bi_flashstart = flash_info[0].base;
2482 static const struct udevice_id cfi_flash_ids[] = {
2483 { .compatible = "cfi-flash" },
2484 { .compatible = "jedec-flash" },
2488 U_BOOT_DRIVER(cfi_flash) = {
2489 .name = "cfi_flash",
2491 .of_match = cfi_flash_ids,
2492 .probe = cfi_flash_probe,
2494 #endif /* CONFIG_CFI_FLASH */