2 * (C) Copyright 2002-2004
3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
5 * Copyright (C) 2003 Arabella Software Ltd.
6 * Yuli Barcohen <yuli@arabellasw.com>
12 * Tolunay Orkun <listmember@orkun.us>
14 * See file CREDITS for list of people who contributed to this
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 /* The DEBUG define must be before common to enable debugging */
38 #include <asm/processor.h>
40 #include <asm/byteorder.h>
41 #include <environment.h>
42 #include <mtd/cfi_flash.h>
46 * This file implements a Common Flash Interface (CFI) driver for
49 * The width of the port and the width of the chips are determined at
50 * initialization. These widths are used to calculate the address for
51 * access CFI data structures.
54 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
55 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
56 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
57 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
58 * AMD CFI Specification, Release 2.0 December 1, 2001
59 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
60 * Device IDs, Publication Number 25538 Revision A, November 8, 2001
62 * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
63 * reading and writing ... (yes there is such a Hardware).
66 static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
67 #ifdef CONFIG_FLASH_CFI_MTD
68 static uint flash_verbose = 1;
70 #define flash_verbose 1
73 flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */
76 * Check if chip width is defined. If not, start detecting with 8bit.
78 #ifndef CONFIG_SYS_FLASH_CFI_WIDTH
79 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
83 * 0xffff is an undefined value for the configuration register. When
84 * this value is returned, the configuration register shall not be
85 * written at all (default mode).
87 static u16 cfi_flash_config_reg(int i)
89 #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
90 return ((u16 [])CONFIG_SYS_CFI_FLASH_CONFIG_REGS)[i];
96 #if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
97 int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT;
100 static phys_addr_t __cfi_flash_bank_addr(int i)
102 return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i];
104 phys_addr_t cfi_flash_bank_addr(int i)
105 __attribute__((weak, alias("__cfi_flash_bank_addr")));
107 static unsigned long __cfi_flash_bank_size(int i)
109 #ifdef CONFIG_SYS_FLASH_BANKS_SIZES
110 return ((unsigned long [])CONFIG_SYS_FLASH_BANKS_SIZES)[i];
115 unsigned long cfi_flash_bank_size(int i)
116 __attribute__((weak, alias("__cfi_flash_bank_size")));
118 static void __flash_write8(u8 value, void *addr)
120 __raw_writeb(value, addr);
123 static void __flash_write16(u16 value, void *addr)
125 __raw_writew(value, addr);
128 static void __flash_write32(u32 value, void *addr)
130 __raw_writel(value, addr);
133 static void __flash_write64(u64 value, void *addr)
135 /* No architectures currently implement __raw_writeq() */
136 *(volatile u64 *)addr = value;
139 static u8 __flash_read8(void *addr)
141 return __raw_readb(addr);
144 static u16 __flash_read16(void *addr)
146 return __raw_readw(addr);
149 static u32 __flash_read32(void *addr)
151 return __raw_readl(addr);
154 static u64 __flash_read64(void *addr)
156 /* No architectures currently implement __raw_readq() */
157 return *(volatile u64 *)addr;
160 #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
161 void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8")));
162 void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16")));
163 void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32")));
164 void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64")));
165 u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8")));
166 u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16")));
167 u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32")));
168 u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64")));
170 #define flash_write8 __flash_write8
171 #define flash_write16 __flash_write16
172 #define flash_write32 __flash_write32
173 #define flash_write64 __flash_write64
174 #define flash_read8 __flash_read8
175 #define flash_read16 __flash_read16
176 #define flash_read32 __flash_read32
177 #define flash_read64 __flash_read64
180 /*-----------------------------------------------------------------------
182 #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
183 flash_info_t *flash_get_info(ulong base)
186 flash_info_t *info = NULL;
188 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
189 info = & flash_info[i];
190 if (info->size && info->start[0] <= base &&
191 base <= info->start[0] + info->size - 1)
199 unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
201 if (sect != (info->sector_count - 1))
202 return info->start[sect + 1] - info->start[sect];
204 return info->start[0] + info->size - info->start[sect];
207 /*-----------------------------------------------------------------------
208 * create an address based on the offset and the port width
211 flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
213 unsigned int byte_offset = offset * info->portwidth;
215 return (void *)(info->start[sect] + byte_offset);
218 static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
219 unsigned int offset, void *addr)
223 /*-----------------------------------------------------------------------
224 * make a proper sized command based on the port and chip widths
226 static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
231 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
232 u32 cmd_le = cpu_to_le32(cmd);
235 uchar *cp = (uchar *) cmdbuf;
237 for (i = info->portwidth; i > 0; i--){
238 cword_offset = (info->portwidth-i)%info->chipwidth;
239 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
240 cp_offset = info->portwidth - i;
241 val = *((uchar*)&cmd_le + cword_offset);
244 val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1);
246 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
251 /*-----------------------------------------------------------------------
254 static void print_longlong (char *str, unsigned long long data)
260 for (i = 0; i < 8; i++)
261 sprintf (&str[i * 2], "%2.2x", *cp++);
264 static void flash_printqry (struct cfi_qry *qry)
269 for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
271 for (y = 0; y < 16; y++)
272 debug("%2.2x ", p[x + y]);
274 for (y = 0; y < 16; y++) {
275 unsigned char c = p[x + y];
276 if (c >= 0x20 && c <= 0x7e)
287 /*-----------------------------------------------------------------------
288 * read a character at a port width address
290 static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
295 cp = flash_map (info, 0, offset);
296 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
297 retval = flash_read8(cp);
299 retval = flash_read8(cp + info->portwidth - 1);
301 flash_unmap (info, 0, offset, cp);
305 /*-----------------------------------------------------------------------
306 * read a word at a port width address, assume 16bit bus
308 static inline ushort flash_read_word (flash_info_t * info, uint offset)
310 ushort *addr, retval;
312 addr = flash_map (info, 0, offset);
313 retval = flash_read16 (addr);
314 flash_unmap (info, 0, offset, addr);
319 /*-----------------------------------------------------------------------
320 * read a long word by picking the least significant byte of each maximum
321 * port size word. Swap for ppc format.
323 static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
332 addr = flash_map (info, sect, offset);
335 debug ("long addr is at %p info->portwidth = %d\n", addr,
337 for (x = 0; x < 4 * info->portwidth; x++) {
338 debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
341 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
342 retval = ((flash_read8(addr) << 16) |
343 (flash_read8(addr + info->portwidth) << 24) |
344 (flash_read8(addr + 2 * info->portwidth)) |
345 (flash_read8(addr + 3 * info->portwidth) << 8));
347 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
348 (flash_read8(addr + info->portwidth - 1) << 16) |
349 (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
350 (flash_read8(addr + 3 * info->portwidth - 1)));
352 flash_unmap(info, sect, offset, addr);
358 * Write a proper sized command to the correct address
360 void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
361 uint offset, u32 cmd)
367 addr = flash_map (info, sect, offset);
368 flash_make_cmd (info, cmd, &cword);
369 switch (info->portwidth) {
371 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
372 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
373 flash_write8(cword.c, addr);
375 case FLASH_CFI_16BIT:
376 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
378 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
379 flash_write16(cword.w, addr);
381 case FLASH_CFI_32BIT:
382 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr,
384 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
385 flash_write32(cword.l, addr);
387 case FLASH_CFI_64BIT:
392 print_longlong (str, cword.ll);
394 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
396 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
399 flash_write64(cword.ll, addr);
403 /* Ensure all the instructions are fully finished */
406 flash_unmap(info, sect, offset, addr);
409 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
411 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
412 flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
415 /*-----------------------------------------------------------------------
417 static int flash_isequal (flash_info_t * info, flash_sect_t sect,
418 uint offset, uchar cmd)
424 addr = flash_map (info, sect, offset);
425 flash_make_cmd (info, cmd, &cword);
427 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
428 switch (info->portwidth) {
430 debug ("is= %x %x\n", flash_read8(addr), cword.c);
431 retval = (flash_read8(addr) == cword.c);
433 case FLASH_CFI_16BIT:
434 debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w);
435 retval = (flash_read16(addr) == cword.w);
437 case FLASH_CFI_32BIT:
438 debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l);
439 retval = (flash_read32(addr) == cword.l);
441 case FLASH_CFI_64BIT:
447 print_longlong (str1, flash_read64(addr));
448 print_longlong (str2, cword.ll);
449 debug ("is= %s %s\n", str1, str2);
452 retval = (flash_read64(addr) == cword.ll);
458 flash_unmap(info, sect, offset, addr);
463 /*-----------------------------------------------------------------------
465 static int flash_isset (flash_info_t * info, flash_sect_t sect,
466 uint offset, uchar cmd)
472 addr = flash_map (info, sect, offset);
473 flash_make_cmd (info, cmd, &cword);
474 switch (info->portwidth) {
476 retval = ((flash_read8(addr) & cword.c) == cword.c);
478 case FLASH_CFI_16BIT:
479 retval = ((flash_read16(addr) & cword.w) == cword.w);
481 case FLASH_CFI_32BIT:
482 retval = ((flash_read32(addr) & cword.l) == cword.l);
484 case FLASH_CFI_64BIT:
485 retval = ((flash_read64(addr) & cword.ll) == cword.ll);
491 flash_unmap(info, sect, offset, addr);
496 /*-----------------------------------------------------------------------
498 static int flash_toggle (flash_info_t * info, flash_sect_t sect,
499 uint offset, uchar cmd)
505 addr = flash_map (info, sect, offset);
506 flash_make_cmd (info, cmd, &cword);
507 switch (info->portwidth) {
509 retval = flash_read8(addr) != flash_read8(addr);
511 case FLASH_CFI_16BIT:
512 retval = flash_read16(addr) != flash_read16(addr);
514 case FLASH_CFI_32BIT:
515 retval = flash_read32(addr) != flash_read32(addr);
517 case FLASH_CFI_64BIT:
518 retval = ( (flash_read32( addr ) != flash_read32( addr )) ||
519 (flash_read32(addr+4) != flash_read32(addr+4)) );
525 flash_unmap(info, sect, offset, addr);
531 * flash_is_busy - check to see if the flash is busy
533 * This routine checks the status of the chip and returns true if the
536 static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
540 switch (info->vendor) {
541 case CFI_CMDSET_INTEL_PROG_REGIONS:
542 case CFI_CMDSET_INTEL_STANDARD:
543 case CFI_CMDSET_INTEL_EXTENDED:
544 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
546 case CFI_CMDSET_AMD_STANDARD:
547 case CFI_CMDSET_AMD_EXTENDED:
548 #ifdef CONFIG_FLASH_CFI_LEGACY
549 case CFI_CMDSET_AMD_LEGACY:
551 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
556 debug ("flash_is_busy: %d\n", retval);
560 /*-----------------------------------------------------------------------
561 * wait for XSR.7 to be set. Time out with an error if it does not.
562 * This routine does not set the flash to read-array mode.
564 static int flash_status_check (flash_info_t * info, flash_sect_t sector,
565 ulong tout, char *prompt)
569 #if CONFIG_SYS_HZ != 1000
570 if ((ulong)CONFIG_SYS_HZ > 100000)
571 tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
573 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
576 /* Wait for command completion */
577 #ifdef CONFIG_SYS_LOW_RES_TIMER
580 start = get_timer (0);
582 while (flash_is_busy (info, sector)) {
583 if (get_timer (start) > tout) {
584 printf ("Flash %s timeout at address %lx data %lx\n",
585 prompt, info->start[sector],
586 flash_read_long (info, sector, 0));
587 flash_write_cmd (info, sector, 0, info->cmd_reset);
591 udelay (1); /* also triggers watchdog */
596 /*-----------------------------------------------------------------------
597 * Wait for XSR.7 to be set, if it times out print an error, otherwise
598 * do a full status check.
600 * This routine sets the flash to read-array mode.
602 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
603 ulong tout, char *prompt)
607 retcode = flash_status_check (info, sector, tout, prompt);
608 switch (info->vendor) {
609 case CFI_CMDSET_INTEL_PROG_REGIONS:
610 case CFI_CMDSET_INTEL_EXTENDED:
611 case CFI_CMDSET_INTEL_STANDARD:
612 if ((retcode != ERR_OK)
613 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
615 printf ("Flash %s error at address %lx\n", prompt,
616 info->start[sector]);
617 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
618 FLASH_STATUS_PSLBS)) {
619 puts ("Command Sequence Error.\n");
620 } else if (flash_isset (info, sector, 0,
621 FLASH_STATUS_ECLBS)) {
622 puts ("Block Erase Error.\n");
623 retcode = ERR_NOT_ERASED;
624 } else if (flash_isset (info, sector, 0,
625 FLASH_STATUS_PSLBS)) {
626 puts ("Locking Error\n");
628 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
629 puts ("Block locked.\n");
630 retcode = ERR_PROTECTED;
632 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
633 puts ("Vpp Low Error.\n");
635 flash_write_cmd (info, sector, 0, info->cmd_reset);
644 static int use_flash_status_poll(flash_info_t *info)
646 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
647 if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
648 info->vendor == CFI_CMDSET_AMD_STANDARD)
654 static int flash_status_poll(flash_info_t *info, void *src, void *dst,
655 ulong tout, char *prompt)
657 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
661 #if CONFIG_SYS_HZ != 1000
662 if ((ulong)CONFIG_SYS_HZ > 100000)
663 tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
665 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
668 /* Wait for command completion */
669 #ifdef CONFIG_SYS_LOW_RES_TIMER
672 start = get_timer(0);
675 switch (info->portwidth) {
677 ready = flash_read8(dst) == flash_read8(src);
679 case FLASH_CFI_16BIT:
680 ready = flash_read16(dst) == flash_read16(src);
682 case FLASH_CFI_32BIT:
683 ready = flash_read32(dst) == flash_read32(src);
685 case FLASH_CFI_64BIT:
686 ready = flash_read64(dst) == flash_read64(src);
694 if (get_timer(start) > tout) {
695 printf("Flash %s timeout at address %lx data %lx\n",
696 prompt, (ulong)dst, (ulong)flash_read8(dst));
699 udelay(1); /* also triggers watchdog */
701 #endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
705 /*-----------------------------------------------------------------------
707 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
709 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
712 unsigned long long ll;
715 switch (info->portwidth) {
719 case FLASH_CFI_16BIT:
720 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
723 cword->w = (cword->w >> 8) | w;
725 cword->w = (cword->w << 8) | c;
728 case FLASH_CFI_32BIT:
729 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
732 cword->l = (cword->l >> 8) | l;
734 cword->l = (cword->l << 8) | c;
737 case FLASH_CFI_64BIT:
738 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
741 cword->ll = (cword->ll >> 8) | ll;
743 cword->ll = (cword->ll << 8) | c;
750 * Loop through the sector table starting from the previously found sector.
751 * Searches forwards or backwards, dependent on the passed address.
753 static flash_sect_t find_sector (flash_info_t * info, ulong addr)
755 static flash_sect_t saved_sector; /* previously found sector */
756 static flash_info_t *saved_info; /* previously used flash bank */
757 flash_sect_t sector = saved_sector;
759 if ((info != saved_info) || (sector >= info->sector_count))
762 while ((info->start[sector] < addr)
763 && (sector < info->sector_count - 1))
765 while ((info->start[sector] > addr) && (sector > 0))
767 * also decrements the sector in case of an overshot
772 saved_sector = sector;
777 /*-----------------------------------------------------------------------
779 static int flash_write_cfiword (flash_info_t * info, ulong dest,
782 void *dstaddr = (void *)dest;
784 flash_sect_t sect = 0;
787 /* Check if Flash is (sufficiently) erased */
788 switch (info->portwidth) {
790 flag = ((flash_read8(dstaddr) & cword.c) == cword.c);
792 case FLASH_CFI_16BIT:
793 flag = ((flash_read16(dstaddr) & cword.w) == cword.w);
795 case FLASH_CFI_32BIT:
796 flag = ((flash_read32(dstaddr) & cword.l) == cword.l);
798 case FLASH_CFI_64BIT:
799 flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll);
806 return ERR_NOT_ERASED;
808 /* Disable interrupts which might cause a timeout here */
809 flag = disable_interrupts ();
811 switch (info->vendor) {
812 case CFI_CMDSET_INTEL_PROG_REGIONS:
813 case CFI_CMDSET_INTEL_EXTENDED:
814 case CFI_CMDSET_INTEL_STANDARD:
815 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
816 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
818 case CFI_CMDSET_AMD_EXTENDED:
819 case CFI_CMDSET_AMD_STANDARD:
820 sect = find_sector(info, dest);
821 flash_unlock_seq (info, sect);
822 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE);
825 #ifdef CONFIG_FLASH_CFI_LEGACY
826 case CFI_CMDSET_AMD_LEGACY:
827 sect = find_sector(info, dest);
828 flash_unlock_seq (info, 0);
829 flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE);
835 switch (info->portwidth) {
837 flash_write8(cword.c, dstaddr);
839 case FLASH_CFI_16BIT:
840 flash_write16(cword.w, dstaddr);
842 case FLASH_CFI_32BIT:
843 flash_write32(cword.l, dstaddr);
845 case FLASH_CFI_64BIT:
846 flash_write64(cword.ll, dstaddr);
850 /* re-enable interrupts if necessary */
852 enable_interrupts ();
855 sect = find_sector (info, dest);
857 if (use_flash_status_poll(info))
858 return flash_status_poll(info, &cword, dstaddr,
859 info->write_tout, "write");
861 return flash_full_status_check(info, sect,
862 info->write_tout, "write");
865 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
867 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
874 void *dst = (void *)dest;
881 switch (info->portwidth) {
885 case FLASH_CFI_16BIT:
888 case FLASH_CFI_32BIT:
891 case FLASH_CFI_64BIT:
901 while ((cnt-- > 0) && (flag == 1)) {
902 switch (info->portwidth) {
904 flag = ((flash_read8(dst2) & flash_read8(src)) ==
908 case FLASH_CFI_16BIT:
909 flag = ((flash_read16(dst2) & flash_read16(src)) ==
913 case FLASH_CFI_32BIT:
914 flag = ((flash_read32(dst2) & flash_read32(src)) ==
918 case FLASH_CFI_64BIT:
919 flag = ((flash_read64(dst2) & flash_read64(src)) ==
926 retcode = ERR_NOT_ERASED;
931 sector = find_sector (info, dest);
933 switch (info->vendor) {
934 case CFI_CMDSET_INTEL_PROG_REGIONS:
935 case CFI_CMDSET_INTEL_STANDARD:
936 case CFI_CMDSET_INTEL_EXTENDED:
937 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
938 FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
939 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
940 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS);
941 flash_write_cmd (info, sector, 0, write_cmd);
942 retcode = flash_status_check (info, sector,
943 info->buffer_write_tout,
945 if (retcode == ERR_OK) {
946 /* reduce the number of loops by the width of
949 flash_write_cmd (info, sector, 0, cnt - 1);
951 switch (info->portwidth) {
953 flash_write8(flash_read8(src), dst);
956 case FLASH_CFI_16BIT:
957 flash_write16(flash_read16(src), dst);
960 case FLASH_CFI_32BIT:
961 flash_write32(flash_read32(src), dst);
964 case FLASH_CFI_64BIT:
965 flash_write64(flash_read64(src), dst);
973 flash_write_cmd (info, sector, 0,
974 FLASH_CMD_WRITE_BUFFER_CONFIRM);
975 retcode = flash_full_status_check (
976 info, sector, info->buffer_write_tout,
982 case CFI_CMDSET_AMD_STANDARD:
983 case CFI_CMDSET_AMD_EXTENDED:
984 flash_unlock_seq(info,0);
986 #ifdef CONFIG_FLASH_SPANSION_S29WS_N
987 offset = ((unsigned long)dst - info->start[sector]) >> shift;
989 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
991 flash_write_cmd(info, sector, offset, cnt - 1);
993 switch (info->portwidth) {
996 flash_write8(flash_read8(src), dst);
1000 case FLASH_CFI_16BIT:
1002 flash_write16(flash_read16(src), dst);
1006 case FLASH_CFI_32BIT:
1008 flash_write32(flash_read32(src), dst);
1012 case FLASH_CFI_64BIT:
1014 flash_write64(flash_read64(src), dst);
1019 retcode = ERR_INVAL;
1023 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
1024 if (use_flash_status_poll(info))
1025 retcode = flash_status_poll(info, src - (1 << shift),
1027 info->buffer_write_tout,
1030 retcode = flash_full_status_check(info, sector,
1031 info->buffer_write_tout,
1036 debug ("Unknown Command Set\n");
1037 retcode = ERR_INVAL;
1044 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1047 /*-----------------------------------------------------------------------
1049 int flash_erase (flash_info_t * info, int s_first, int s_last)
1056 if (info->flash_id != FLASH_MAN_CFI) {
1057 puts ("Can't erase unknown flash type - aborted\n");
1060 if ((s_first < 0) || (s_first > s_last)) {
1061 puts ("- no sectors to erase\n");
1066 for (sect = s_first; sect <= s_last; ++sect) {
1067 if (info->protect[sect]) {
1072 printf ("- Warning: %d protected sectors will not be erased!\n",
1074 } else if (flash_verbose) {
1079 for (sect = s_first; sect <= s_last; sect++) {
1085 if (info->protect[sect] == 0) { /* not protected */
1086 #ifdef CONFIG_SYS_FLASH_CHECK_BLANK_BEFORE_ERASE
1093 * Check if whole sector is erased
1095 size = flash_sector_size(info, sect);
1097 flash = (u32 *)info->start[sect];
1098 /* divide by 4 for longword access */
1100 for (k = 0; k < size; k++) {
1101 if (flash_read32(flash++) != 0xffffffff) {
1112 switch (info->vendor) {
1113 case CFI_CMDSET_INTEL_PROG_REGIONS:
1114 case CFI_CMDSET_INTEL_STANDARD:
1115 case CFI_CMDSET_INTEL_EXTENDED:
1116 flash_write_cmd (info, sect, 0,
1117 FLASH_CMD_CLEAR_STATUS);
1118 flash_write_cmd (info, sect, 0,
1119 FLASH_CMD_BLOCK_ERASE);
1120 flash_write_cmd (info, sect, 0,
1121 FLASH_CMD_ERASE_CONFIRM);
1123 case CFI_CMDSET_AMD_STANDARD:
1124 case CFI_CMDSET_AMD_EXTENDED:
1125 flash_unlock_seq (info, sect);
1126 flash_write_cmd (info, sect,
1128 AMD_CMD_ERASE_START);
1129 flash_unlock_seq (info, sect);
1130 flash_write_cmd (info, sect, 0,
1131 info->cmd_erase_sector);
1133 #ifdef CONFIG_FLASH_CFI_LEGACY
1134 case CFI_CMDSET_AMD_LEGACY:
1135 flash_unlock_seq (info, 0);
1136 flash_write_cmd (info, 0, info->addr_unlock1,
1137 AMD_CMD_ERASE_START);
1138 flash_unlock_seq (info, 0);
1139 flash_write_cmd (info, sect, 0,
1140 AMD_CMD_ERASE_SECTOR);
1144 debug ("Unkown flash vendor %d\n",
1149 if (use_flash_status_poll(info)) {
1152 cword.ll = 0xffffffffffffffffULL;
1153 dest = flash_map(info, sect, 0);
1154 st = flash_status_poll(info, &cword, dest,
1155 info->erase_blk_tout, "erase");
1156 flash_unmap(info, sect, 0, dest);
1158 st = flash_full_status_check(info, sect,
1159 info->erase_blk_tout,
1163 else if (flash_verbose)
1174 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1175 static int sector_erased(flash_info_t *info, int i)
1182 * Check if whole sector is erased
1184 size = flash_sector_size(info, i);
1185 flash = (u32 *)info->start[i];
1186 /* divide by 4 for longword access */
1189 for (k = 0; k < size; k++) {
1190 if (flash_read32(flash++) != 0xffffffff)
1191 return 0; /* not erased */
1194 return 1; /* erased */
1196 #endif /* CONFIG_SYS_FLASH_EMPTY_INFO */
1198 void flash_print_info (flash_info_t * info)
1202 if (info->flash_id != FLASH_MAN_CFI) {
1203 puts ("missing or unknown FLASH type\n");
1207 printf ("%s flash (%d x %d)",
1209 (info->portwidth << 3), (info->chipwidth << 3));
1210 if (info->size < 1024*1024)
1211 printf (" Size: %ld kB in %d Sectors\n",
1212 info->size >> 10, info->sector_count);
1214 printf (" Size: %ld MB in %d Sectors\n",
1215 info->size >> 20, info->sector_count);
1217 switch (info->vendor) {
1218 case CFI_CMDSET_INTEL_PROG_REGIONS:
1219 printf ("Intel Prog Regions");
1221 case CFI_CMDSET_INTEL_STANDARD:
1222 printf ("Intel Standard");
1224 case CFI_CMDSET_INTEL_EXTENDED:
1225 printf ("Intel Extended");
1227 case CFI_CMDSET_AMD_STANDARD:
1228 printf ("AMD Standard");
1230 case CFI_CMDSET_AMD_EXTENDED:
1231 printf ("AMD Extended");
1233 #ifdef CONFIG_FLASH_CFI_LEGACY
1234 case CFI_CMDSET_AMD_LEGACY:
1235 printf ("AMD Legacy");
1239 printf ("Unknown (%d)", info->vendor);
1242 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
1243 info->manufacturer_id);
1244 printf (info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
1246 if ((info->device_id & 0xff) == 0x7E) {
1247 printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
1250 if ((info->vendor == CFI_CMDSET_AMD_STANDARD) && (info->legacy_unlock))
1251 printf("\n Advanced Sector Protection (PPB) enabled");
1252 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
1253 info->erase_blk_tout,
1255 if (info->buffer_size > 1) {
1256 printf (" Buffer write timeout: %ld ms, "
1257 "buffer size: %d bytes\n",
1258 info->buffer_write_tout,
1262 puts ("\n Sector Start Addresses:");
1263 for (i = 0; i < info->sector_count; ++i) {
1268 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1269 /* print empty and read-only info */
1270 printf (" %08lX %c %s ",
1272 sector_erased(info, i) ? 'E' : ' ',
1273 info->protect[i] ? "RO" : " ");
1274 #else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
1275 printf (" %08lX %s ",
1277 info->protect[i] ? "RO" : " ");
1284 /*-----------------------------------------------------------------------
1285 * This is used in a few places in write_buf() to show programming
1286 * progress. Making it a function is nasty because it needs to do side
1287 * effect updates to digit and dots. Repeated code is nasty too, so
1288 * we define it once here.
1290 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1291 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
1292 if (flash_verbose) { \
1294 if ((scale > 0) && (dots <= 0)) { \
1295 if ((digit % 5) == 0) \
1296 printf ("%d", digit / 5); \
1304 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
1307 /*-----------------------------------------------------------------------
1308 * Copy memory to flash, returns:
1311 * 2 - Flash not erased
1313 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
1320 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1323 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1324 int digit = CONFIG_FLASH_SHOW_PROGRESS;
1329 * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
1331 if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
1332 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
1333 CONFIG_FLASH_SHOW_PROGRESS);
1337 /* get lower aligned address */
1338 wp = (addr & ~(info->portwidth - 1));
1340 /* handle unaligned start */
1341 if ((aln = addr - wp) != 0) {
1344 for (i = 0; i < aln; ++i)
1345 flash_add_byte (info, &cword, flash_read8(p + i));
1347 for (; (i < info->portwidth) && (cnt > 0); i++) {
1348 flash_add_byte (info, &cword, *src++);
1351 for (; (cnt == 0) && (i < info->portwidth); ++i)
1352 flash_add_byte (info, &cword, flash_read8(p + i));
1354 rc = flash_write_cfiword (info, wp, cword);
1359 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1362 /* handle the aligned part */
1363 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1364 buffered_size = (info->portwidth / info->chipwidth);
1365 buffered_size *= info->buffer_size;
1366 while (cnt >= info->portwidth) {
1367 /* prohibit buffer write when buffer_size is 1 */
1368 if (info->buffer_size == 1) {
1370 for (i = 0; i < info->portwidth; i++)
1371 flash_add_byte (info, &cword, *src++);
1372 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1374 wp += info->portwidth;
1375 cnt -= info->portwidth;
1379 /* write buffer until next buffered_size aligned boundary */
1380 i = buffered_size - (wp % buffered_size);
1383 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
1385 i -= i & (info->portwidth - 1);
1389 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1390 /* Only check every once in a while */
1391 if ((cnt & 0xFFFF) < buffered_size && ctrlc())
1395 while (cnt >= info->portwidth) {
1397 for (i = 0; i < info->portwidth; i++) {
1398 flash_add_byte (info, &cword, *src++);
1400 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1402 wp += info->portwidth;
1403 cnt -= info->portwidth;
1404 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
1405 /* Only check every once in a while */
1406 if ((cnt & 0xFFFF) < info->portwidth && ctrlc())
1409 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1416 * handle unaligned tail bytes
1420 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
1421 flash_add_byte (info, &cword, *src++);
1424 for (; i < info->portwidth; ++i)
1425 flash_add_byte (info, &cword, flash_read8(p + i));
1427 return flash_write_cfiword (info, wp, cword);
1430 static inline int manufact_match(flash_info_t *info, u32 manu)
1432 return info->manufacturer_id == ((manu & FLASH_VENDMASK) >> 16);
1435 /*-----------------------------------------------------------------------
1437 #ifdef CONFIG_SYS_FLASH_PROTECTION
1439 static int cfi_protect_bugfix(flash_info_t *info, long sector, int prot)
1441 if (manufact_match(info, INTEL_MANUFACT)
1442 && info->device_id == NUMONYX_256MBIT) {
1445 * "Numonyx Axcell P33/P30 Specification Update" :)
1447 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_ID);
1448 if (!flash_isequal(info, sector, FLASH_OFFSET_PROTECT,
1451 * cmd must come before FLASH_CMD_PROTECT + 20us
1452 * Disable interrupts which might cause a timeout here.
1454 int flag = disable_interrupts();
1458 cmd = FLASH_CMD_PROTECT_SET;
1460 cmd = FLASH_CMD_PROTECT_CLEAR;
1461 flash_write_cmd(info, sector, 0,
1463 flash_write_cmd(info, sector, 0, cmd);
1464 /* re-enable interrupts if necessary */
1466 enable_interrupts();
1473 int flash_real_protect (flash_info_t * info, long sector, int prot)
1477 switch (info->vendor) {
1478 case CFI_CMDSET_INTEL_PROG_REGIONS:
1479 case CFI_CMDSET_INTEL_STANDARD:
1480 case CFI_CMDSET_INTEL_EXTENDED:
1481 if (!cfi_protect_bugfix(info, sector, prot)) {
1482 flash_write_cmd(info, sector, 0,
1483 FLASH_CMD_CLEAR_STATUS);
1484 flash_write_cmd(info, sector, 0,
1487 flash_write_cmd(info, sector, 0,
1488 FLASH_CMD_PROTECT_SET);
1490 flash_write_cmd(info, sector, 0,
1491 FLASH_CMD_PROTECT_CLEAR);
1495 case CFI_CMDSET_AMD_EXTENDED:
1496 case CFI_CMDSET_AMD_STANDARD:
1497 /* U-Boot only checks the first byte */
1498 if (manufact_match(info, ATM_MANUFACT)) {
1500 flash_unlock_seq (info, 0);
1501 flash_write_cmd (info, 0,
1503 ATM_CMD_SOFTLOCK_START);
1504 flash_unlock_seq (info, 0);
1505 flash_write_cmd (info, sector, 0,
1508 flash_write_cmd (info, 0,
1510 AMD_CMD_UNLOCK_START);
1511 if (info->device_id == ATM_ID_BV6416)
1512 flash_write_cmd (info, sector,
1513 0, ATM_CMD_UNLOCK_SECT);
1516 if (info->legacy_unlock) {
1517 int flag = disable_interrupts();
1520 flash_unlock_seq(info, 0);
1521 flash_write_cmd(info, 0, info->addr_unlock1,
1522 AMD_CMD_SET_PPB_ENTRY);
1523 lock_flag = flash_isset(info, sector, 0, 0x01);
1526 flash_write_cmd(info, sector, 0,
1527 AMD_CMD_PPB_LOCK_BC1);
1528 flash_write_cmd(info, sector, 0,
1529 AMD_CMD_PPB_LOCK_BC2);
1531 debug("sector %ld %slocked\n", sector,
1532 lock_flag ? "" : "already ");
1535 debug("unlock %ld\n", sector);
1536 flash_write_cmd(info, 0, 0,
1537 AMD_CMD_PPB_UNLOCK_BC1);
1538 flash_write_cmd(info, 0, 0,
1539 AMD_CMD_PPB_UNLOCK_BC2);
1541 debug("sector %ld %sunlocked\n", sector,
1542 !lock_flag ? "" : "already ");
1545 enable_interrupts();
1547 if (flash_status_check(info, sector,
1548 info->erase_blk_tout,
1549 prot ? "protect" : "unprotect"))
1550 printf("status check error\n");
1552 flash_write_cmd(info, 0, 0,
1553 AMD_CMD_SET_PPB_EXIT_BC1);
1554 flash_write_cmd(info, 0, 0,
1555 AMD_CMD_SET_PPB_EXIT_BC2);
1558 #ifdef CONFIG_FLASH_CFI_LEGACY
1559 case CFI_CMDSET_AMD_LEGACY:
1560 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1561 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
1563 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
1565 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
1570 * Flash needs to be in status register read mode for
1571 * flash_full_status_check() to work correctly
1573 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
1575 flash_full_status_check (info, sector, info->erase_blk_tout,
1576 prot ? "protect" : "unprotect")) == 0) {
1578 info->protect[sector] = prot;
1581 * On some of Intel's flash chips (marked via legacy_unlock)
1582 * unprotect unprotects all locking.
1584 if ((prot == 0) && (info->legacy_unlock)) {
1587 for (i = 0; i < info->sector_count; i++) {
1588 if (info->protect[i])
1589 flash_real_protect (info, i, 1);
1596 /*-----------------------------------------------------------------------
1597 * flash_read_user_serial - read the OneTimeProgramming cells
1599 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
1606 src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION);
1607 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1608 memcpy (dst, src + offset, len);
1609 flash_write_cmd (info, 0, 0, info->cmd_reset);
1611 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
1615 * flash_read_factory_serial - read the device Id from the protection area
1617 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
1622 src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
1623 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1624 memcpy (buffer, src + offset, len);
1625 flash_write_cmd (info, 0, 0, info->cmd_reset);
1627 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
1630 #endif /* CONFIG_SYS_FLASH_PROTECTION */
1632 /*-----------------------------------------------------------------------
1633 * Reverse the order of the erase regions in the CFI QRY structure.
1634 * This is needed for chips that are either a) correctly detected as
1635 * top-boot, or b) buggy.
1637 static void cfi_reverse_geometry(struct cfi_qry *qry)
1642 for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
1643 tmp = qry->erase_region_info[i];
1644 qry->erase_region_info[i] = qry->erase_region_info[j];
1645 qry->erase_region_info[j] = tmp;
1649 /*-----------------------------------------------------------------------
1650 * read jedec ids from device and set corresponding fields in info struct
1652 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1655 static void cmdset_intel_read_jedec_ids(flash_info_t *info)
1657 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1659 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1660 udelay(1000); /* some flash are slow to respond */
1661 info->manufacturer_id = flash_read_uchar (info,
1662 FLASH_OFFSET_MANUFACTURER_ID);
1663 info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ?
1664 flash_read_word (info, FLASH_OFFSET_DEVICE_ID) :
1665 flash_read_uchar (info, FLASH_OFFSET_DEVICE_ID);
1666 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1669 static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
1671 info->cmd_reset = FLASH_CMD_RESET;
1673 cmdset_intel_read_jedec_ids(info);
1674 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1676 #ifdef CONFIG_SYS_FLASH_PROTECTION
1677 /* read legacy lock/unlock bit from intel flash */
1678 if (info->ext_addr) {
1679 info->legacy_unlock = flash_read_uchar (info,
1680 info->ext_addr + 5) & 0x08;
1687 static void cmdset_amd_read_jedec_ids(flash_info_t *info)
1692 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1693 flash_unlock_seq(info, 0);
1694 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1695 udelay(1000); /* some flash are slow to respond */
1697 manuId = flash_read_uchar (info, FLASH_OFFSET_MANUFACTURER_ID);
1698 /* JEDEC JEP106Z specifies ID codes up to bank 7 */
1699 while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) {
1701 manuId = flash_read_uchar (info,
1702 bankId | FLASH_OFFSET_MANUFACTURER_ID);
1704 info->manufacturer_id = manuId;
1706 switch (info->chipwidth){
1707 case FLASH_CFI_8BIT:
1708 info->device_id = flash_read_uchar (info,
1709 FLASH_OFFSET_DEVICE_ID);
1710 if (info->device_id == 0x7E) {
1711 /* AMD 3-byte (expanded) device ids */
1712 info->device_id2 = flash_read_uchar (info,
1713 FLASH_OFFSET_DEVICE_ID2);
1714 info->device_id2 <<= 8;
1715 info->device_id2 |= flash_read_uchar (info,
1716 FLASH_OFFSET_DEVICE_ID3);
1719 case FLASH_CFI_16BIT:
1720 info->device_id = flash_read_word (info,
1721 FLASH_OFFSET_DEVICE_ID);
1722 if ((info->device_id & 0xff) == 0x7E) {
1723 /* AMD 3-byte (expanded) device ids */
1724 info->device_id2 = flash_read_uchar (info,
1725 FLASH_OFFSET_DEVICE_ID2);
1726 info->device_id2 <<= 8;
1727 info->device_id2 |= flash_read_uchar (info,
1728 FLASH_OFFSET_DEVICE_ID3);
1734 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1738 static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
1740 info->cmd_reset = AMD_CMD_RESET;
1741 info->cmd_erase_sector = AMD_CMD_ERASE_SECTOR;
1743 cmdset_amd_read_jedec_ids(info);
1744 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1746 #ifdef CONFIG_SYS_FLASH_PROTECTION
1747 if (info->ext_addr) {
1748 /* read sector protect/unprotect scheme (at 0x49) */
1749 if (flash_read_uchar(info, info->ext_addr + 9) == 0x8)
1750 info->legacy_unlock = 1;
1757 #ifdef CONFIG_FLASH_CFI_LEGACY
1758 static void flash_read_jedec_ids (flash_info_t * info)
1760 info->manufacturer_id = 0;
1761 info->device_id = 0;
1762 info->device_id2 = 0;
1764 switch (info->vendor) {
1765 case CFI_CMDSET_INTEL_PROG_REGIONS:
1766 case CFI_CMDSET_INTEL_STANDARD:
1767 case CFI_CMDSET_INTEL_EXTENDED:
1768 cmdset_intel_read_jedec_ids(info);
1770 case CFI_CMDSET_AMD_STANDARD:
1771 case CFI_CMDSET_AMD_EXTENDED:
1772 cmdset_amd_read_jedec_ids(info);
1779 /*-----------------------------------------------------------------------
1780 * Call board code to request info about non-CFI flash.
1781 * board_flash_get_legacy needs to fill in at least:
1782 * info->portwidth, info->chipwidth and info->interface for Jedec probing.
1784 static int flash_detect_legacy(phys_addr_t base, int banknum)
1786 flash_info_t *info = &flash_info[banknum];
1788 if (board_flash_get_legacy(base, banknum, info)) {
1789 /* board code may have filled info completely. If not, we
1790 use JEDEC ID probing. */
1791 if (!info->vendor) {
1793 CFI_CMDSET_AMD_STANDARD,
1794 CFI_CMDSET_INTEL_STANDARD
1798 for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
1799 info->vendor = modes[i];
1801 (ulong)map_physmem(base,
1804 if (info->portwidth == FLASH_CFI_8BIT
1805 && info->interface == FLASH_CFI_X8X16) {
1806 info->addr_unlock1 = 0x2AAA;
1807 info->addr_unlock2 = 0x5555;
1809 info->addr_unlock1 = 0x5555;
1810 info->addr_unlock2 = 0x2AAA;
1812 flash_read_jedec_ids(info);
1813 debug("JEDEC PROBE: ID %x %x %x\n",
1814 info->manufacturer_id,
1817 if (jedec_flash_match(info, info->start[0]))
1820 unmap_physmem((void *)info->start[0],
1825 switch(info->vendor) {
1826 case CFI_CMDSET_INTEL_PROG_REGIONS:
1827 case CFI_CMDSET_INTEL_STANDARD:
1828 case CFI_CMDSET_INTEL_EXTENDED:
1829 info->cmd_reset = FLASH_CMD_RESET;
1831 case CFI_CMDSET_AMD_STANDARD:
1832 case CFI_CMDSET_AMD_EXTENDED:
1833 case CFI_CMDSET_AMD_LEGACY:
1834 info->cmd_reset = AMD_CMD_RESET;
1837 info->flash_id = FLASH_MAN_CFI;
1840 return 0; /* use CFI */
1843 static inline int flash_detect_legacy(phys_addr_t base, int banknum)
1845 return 0; /* use CFI */
1849 /*-----------------------------------------------------------------------
1850 * detect if flash is compatible with the Common Flash Interface (CFI)
1851 * http://www.jedec.org/download/search/jesd68.pdf
1853 static void flash_read_cfi (flash_info_t *info, void *buf,
1854 unsigned int start, size_t len)
1859 for (i = 0; i < len; i++)
1860 p[i] = flash_read_uchar(info, start + i);
1863 static void __flash_cmd_reset(flash_info_t *info)
1866 * We do not yet know what kind of commandset to use, so we issue
1867 * the reset command in both Intel and AMD variants, in the hope
1868 * that AMD flash roms ignore the Intel command.
1870 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1872 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1874 void flash_cmd_reset(flash_info_t *info)
1875 __attribute__((weak,alias("__flash_cmd_reset")));
1877 static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
1881 /* Issue FLASH reset command */
1882 flash_cmd_reset(info);
1885 cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
1887 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
1889 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1890 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1891 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1892 flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
1893 sizeof(struct cfi_qry));
1894 info->interface = le16_to_cpu(qry->interface_desc);
1896 info->cfi_offset = flash_offset_cfi[cfi_offset];
1897 debug ("device interface is %d\n",
1899 debug ("found port %d chip %d ",
1900 info->portwidth, info->chipwidth);
1901 debug ("port %d bits chip %d bits\n",
1902 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1903 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1905 /* calculate command offsets as in the Linux driver */
1906 info->addr_unlock1 = 0x555;
1907 info->addr_unlock2 = 0x2aa;
1910 * modify the unlock address if we are
1911 * in compatibility mode
1913 if ( /* x8/x16 in x8 mode */
1914 ((info->chipwidth == FLASH_CFI_BY8) &&
1915 (info->interface == FLASH_CFI_X8X16)) ||
1916 /* x16/x32 in x16 mode */
1917 ((info->chipwidth == FLASH_CFI_BY16) &&
1918 (info->interface == FLASH_CFI_X16X32)))
1920 info->addr_unlock1 = 0xaaa;
1921 info->addr_unlock2 = 0x555;
1924 info->name = "CFI conformant";
1932 static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
1934 debug ("flash detect cfi\n");
1936 for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
1937 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1938 for (info->chipwidth = FLASH_CFI_BY8;
1939 info->chipwidth <= info->portwidth;
1940 info->chipwidth <<= 1)
1941 if (__flash_detect_cfi(info, qry))
1944 debug ("not found\n");
1949 * Manufacturer-specific quirks. Add workarounds for geometry
1950 * reversal, etc. here.
1952 static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
1954 /* check if flash geometry needs reversal */
1955 if (qry->num_erase_regions > 1) {
1956 /* reverse geometry if top boot part */
1957 if (info->cfi_version < 0x3131) {
1958 /* CFI < 1.1, try to guess from device id */
1959 if ((info->device_id & 0x80) != 0)
1960 cfi_reverse_geometry(qry);
1961 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1962 /* CFI >= 1.1, deduct from top/bottom flag */
1963 /* note: ext_addr is valid since cfi_version > 0 */
1964 cfi_reverse_geometry(qry);
1969 static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
1971 int reverse_geometry = 0;
1973 /* Check the "top boot" bit in the PRI */
1974 if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
1975 reverse_geometry = 1;
1977 /* AT49BV6416(T) list the erase regions in the wrong order.
1978 * However, the device ID is identical with the non-broken
1979 * AT49BV642D they differ in the high byte.
1981 if (info->device_id == 0xd6 || info->device_id == 0xd2)
1982 reverse_geometry = !reverse_geometry;
1984 if (reverse_geometry)
1985 cfi_reverse_geometry(qry);
1988 static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
1990 /* check if flash geometry needs reversal */
1991 if (qry->num_erase_regions > 1) {
1992 /* reverse geometry if top boot part */
1993 if (info->cfi_version < 0x3131) {
1994 /* CFI < 1.1, guess by device id */
1995 if (info->device_id == 0x22CA || /* M29W320DT */
1996 info->device_id == 0x2256 || /* M29W320ET */
1997 info->device_id == 0x22D7) { /* M29W800DT */
1998 cfi_reverse_geometry(qry);
2000 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
2001 /* CFI >= 1.1, deduct from top/bottom flag */
2002 /* note: ext_addr is valid since cfi_version > 0 */
2003 cfi_reverse_geometry(qry);
2008 static void flash_fixup_sst(flash_info_t *info, struct cfi_qry *qry)
2011 * SST, for many recent nor parallel flashes, says they are
2012 * CFI-conformant. This is not true, since qry struct.
2013 * reports a std. AMD command set (0x0002), while SST allows to
2014 * erase two different sector sizes for the same memory.
2015 * 64KB sector (SST call it block) needs 0x30 to be erased.
2016 * 4KB sector (SST call it sector) needs 0x50 to be erased.
2017 * Since CFI query detect the 4KB number of sectors, users expects
2018 * a sector granularity of 4KB, and it is here set.
2020 if (info->device_id == 0x5D23 || /* SST39VF3201B */
2021 info->device_id == 0x5C23) { /* SST39VF3202B */
2022 /* set sector granularity to 4KB */
2023 info->cmd_erase_sector=0x50;
2027 static void flash_fixup_num(flash_info_t *info, struct cfi_qry *qry)
2030 * The M29EW devices seem to report the CFI information wrong
2031 * when it's in 8 bit mode.
2032 * There's an app note from Numonyx on this issue.
2033 * So adjust the buffer size for M29EW while operating in 8-bit mode
2035 if (((qry->max_buf_write_size) > 0x8) &&
2036 (info->device_id == 0x7E) &&
2037 (info->device_id2 == 0x2201 ||
2038 info->device_id2 == 0x2301 ||
2039 info->device_id2 == 0x2801 ||
2040 info->device_id2 == 0x4801)) {
2041 debug("Adjusted buffer size on Numonyx flash"
2042 " M29EW family in 8 bit mode\n");
2043 qry->max_buf_write_size = 0x8;
2048 * The following code cannot be run from FLASH!
2051 ulong flash_get_size (phys_addr_t base, int banknum)
2053 flash_info_t *info = &flash_info[banknum];
2055 flash_sect_t sect_cnt;
2059 uchar num_erase_regions;
2060 int erase_region_size;
2061 int erase_region_count;
2063 unsigned long max_size;
2065 memset(&qry, 0, sizeof(qry));
2068 info->cfi_version = 0;
2069 #ifdef CONFIG_SYS_FLASH_PROTECTION
2070 info->legacy_unlock = 0;
2073 info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
2075 if (flash_detect_cfi (info, &qry)) {
2076 info->vendor = le16_to_cpu(qry.p_id);
2077 info->ext_addr = le16_to_cpu(qry.p_adr);
2078 num_erase_regions = qry.num_erase_regions;
2080 if (info->ext_addr) {
2081 info->cfi_version = (ushort) flash_read_uchar (info,
2082 info->ext_addr + 3) << 8;
2083 info->cfi_version |= (ushort) flash_read_uchar (info,
2084 info->ext_addr + 4);
2088 flash_printqry (&qry);
2091 switch (info->vendor) {
2092 case CFI_CMDSET_INTEL_PROG_REGIONS:
2093 case CFI_CMDSET_INTEL_STANDARD:
2094 case CFI_CMDSET_INTEL_EXTENDED:
2095 cmdset_intel_init(info, &qry);
2097 case CFI_CMDSET_AMD_STANDARD:
2098 case CFI_CMDSET_AMD_EXTENDED:
2099 cmdset_amd_init(info, &qry);
2102 printf("CFI: Unknown command set 0x%x\n",
2105 * Unfortunately, this means we don't know how
2106 * to get the chip back to Read mode. Might
2107 * as well try an Intel-style reset...
2109 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
2113 /* Do manufacturer-specific fixups */
2114 switch (info->manufacturer_id) {
2115 case 0x0001: /* AMD */
2116 case 0x0037: /* AMIC */
2117 flash_fixup_amd(info, &qry);
2120 flash_fixup_atmel(info, &qry);
2123 flash_fixup_stm(info, &qry);
2125 case 0x00bf: /* SST */
2126 flash_fixup_sst(info, &qry);
2128 case 0x0089: /* Numonyx */
2129 flash_fixup_num(info, &qry);
2133 debug ("manufacturer is %d\n", info->vendor);
2134 debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
2135 debug ("device id is 0x%x\n", info->device_id);
2136 debug ("device id2 is 0x%x\n", info->device_id2);
2137 debug ("cfi version is 0x%04x\n", info->cfi_version);
2139 size_ratio = info->portwidth / info->chipwidth;
2140 /* if the chip is x8/x16 reduce the ratio by half */
2141 if ((info->interface == FLASH_CFI_X8X16)
2142 && (info->chipwidth == FLASH_CFI_BY8)) {
2145 debug ("size_ratio %d port %d bits chip %d bits\n",
2146 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
2147 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
2148 info->size = 1 << qry.dev_size;
2149 /* multiply the size by the number of chips */
2150 info->size *= size_ratio;
2151 max_size = cfi_flash_bank_size(banknum);
2152 if (max_size && (info->size > max_size)) {
2153 debug("[truncated from %ldMiB]", info->size >> 20);
2154 info->size = max_size;
2156 debug ("found %d erase regions\n", num_erase_regions);
2159 for (i = 0; i < num_erase_regions; i++) {
2160 if (i > NUM_ERASE_REGIONS) {
2161 printf ("%d erase regions found, only %d used\n",
2162 num_erase_regions, NUM_ERASE_REGIONS);
2166 tmp = le32_to_cpu(qry.erase_region_info[i]);
2167 debug("erase region %u: 0x%08lx\n", i, tmp);
2169 erase_region_count = (tmp & 0xffff) + 1;
2172 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
2173 debug ("erase_region_count = %d erase_region_size = %d\n",
2174 erase_region_count, erase_region_size);
2175 for (j = 0; j < erase_region_count; j++) {
2176 if (sector - base >= info->size)
2178 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
2179 printf("ERROR: too many flash sectors\n");
2182 info->start[sect_cnt] =
2183 (ulong)map_physmem(sector,
2186 sector += (erase_region_size * size_ratio);
2189 * Only read protection status from
2190 * supported devices (intel...)
2192 switch (info->vendor) {
2193 case CFI_CMDSET_INTEL_PROG_REGIONS:
2194 case CFI_CMDSET_INTEL_EXTENDED:
2195 case CFI_CMDSET_INTEL_STANDARD:
2197 * Set flash to read-id mode. Otherwise
2198 * reading protected status is not
2201 flash_write_cmd(info, sect_cnt, 0,
2203 info->protect[sect_cnt] =
2204 flash_isset (info, sect_cnt,
2205 FLASH_OFFSET_PROTECT,
2206 FLASH_STATUS_PROTECT);
2208 case CFI_CMDSET_AMD_EXTENDED:
2209 case CFI_CMDSET_AMD_STANDARD:
2210 if (!info->legacy_unlock) {
2211 /* default: not protected */
2212 info->protect[sect_cnt] = 0;
2216 /* Read protection (PPB) from sector */
2217 flash_write_cmd(info, 0, 0,
2219 flash_unlock_seq(info, 0);
2220 flash_write_cmd(info, 0,
2223 info->protect[sect_cnt] =
2226 FLASH_OFFSET_PROTECT,
2227 FLASH_STATUS_PROTECT);
2230 /* default: not protected */
2231 info->protect[sect_cnt] = 0;
2238 info->sector_count = sect_cnt;
2239 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
2240 tmp = 1 << qry.block_erase_timeout_typ;
2241 info->erase_blk_tout = tmp *
2242 (1 << qry.block_erase_timeout_max);
2243 tmp = (1 << qry.buf_write_timeout_typ) *
2244 (1 << qry.buf_write_timeout_max);
2246 /* round up when converting to ms */
2247 info->buffer_write_tout = (tmp + 999) / 1000;
2248 tmp = (1 << qry.word_write_timeout_typ) *
2249 (1 << qry.word_write_timeout_max);
2250 /* round up when converting to ms */
2251 info->write_tout = (tmp + 999) / 1000;
2252 info->flash_id = FLASH_MAN_CFI;
2253 if ((info->interface == FLASH_CFI_X8X16) &&
2254 (info->chipwidth == FLASH_CFI_BY8)) {
2255 /* XXX - Need to test on x8/x16 in parallel. */
2256 info->portwidth >>= 1;
2259 flash_write_cmd (info, 0, 0, info->cmd_reset);
2262 return (info->size);
2265 #ifdef CONFIG_FLASH_CFI_MTD
2266 void flash_set_verbose(uint v)
2272 static void cfi_flash_set_config_reg(u32 base, u16 val)
2274 #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
2276 * Only set this config register if really defined
2277 * to a valid value (0xffff is invalid)
2283 * Set configuration register. Data is "encrypted" in the 16 lower
2286 flash_write16(FLASH_CMD_SETUP, (void *)(base + (val << 1)));
2287 flash_write16(FLASH_CMD_SET_CR_CONFIRM, (void *)(base + (val << 1)));
2290 * Finally issue reset-command to bring device back to
2293 flash_write16(FLASH_CMD_RESET, (void *)base);
2297 /*-----------------------------------------------------------------------
2300 void flash_protect_default(void)
2302 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2307 } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
2310 /* Monitor protection ON by default */
2311 #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
2312 (!defined(CONFIG_MONITOR_IS_IN_RAM))
2313 flash_protect(FLAG_PROTECT_SET,
2314 CONFIG_SYS_MONITOR_BASE,
2315 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
2316 flash_get_info(CONFIG_SYS_MONITOR_BASE));
2319 /* Environment protection ON by default */
2320 #ifdef CONFIG_ENV_IS_IN_FLASH
2321 flash_protect(FLAG_PROTECT_SET,
2323 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
2324 flash_get_info(CONFIG_ENV_ADDR));
2327 /* Redundant environment protection ON by default */
2328 #ifdef CONFIG_ENV_ADDR_REDUND
2329 flash_protect(FLAG_PROTECT_SET,
2330 CONFIG_ENV_ADDR_REDUND,
2331 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
2332 flash_get_info(CONFIG_ENV_ADDR_REDUND));
2335 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2336 for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) {
2337 debug("autoprotecting from %08lx to %08lx\n",
2338 apl[i].start, apl[i].start + apl[i].size - 1);
2339 flash_protect(FLAG_PROTECT_SET,
2341 apl[i].start + apl[i].size - 1,
2342 flash_get_info(apl[i].start));
2347 unsigned long flash_init (void)
2349 unsigned long size = 0;
2352 #ifdef CONFIG_SYS_FLASH_PROTECTION
2353 /* read environment from EEPROM */
2355 getenv_f("unlock", s, sizeof(s));
2358 /* Init: no FLASHes known */
2359 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
2360 flash_info[i].flash_id = FLASH_UNKNOWN;
2362 /* Optionally write flash configuration register */
2363 cfi_flash_set_config_reg(cfi_flash_bank_addr(i),
2364 cfi_flash_config_reg(i));
2366 if (!flash_detect_legacy(cfi_flash_bank_addr(i), i))
2367 flash_get_size(cfi_flash_bank_addr(i), i);
2368 size += flash_info[i].size;
2369 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
2370 #ifndef CONFIG_SYS_FLASH_QUIET_TEST
2371 printf ("## Unknown flash on Bank %d "
2372 "- Size = 0x%08lx = %ld MB\n",
2373 i+1, flash_info[i].size,
2374 flash_info[i].size >> 20);
2375 #endif /* CONFIG_SYS_FLASH_QUIET_TEST */
2377 #ifdef CONFIG_SYS_FLASH_PROTECTION
2378 else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
2380 * Only the U-Boot image and it's environment
2381 * is protected, all other sectors are
2382 * unprotected (unlocked) if flash hardware
2383 * protection is used (CONFIG_SYS_FLASH_PROTECTION)
2384 * and the environment variable "unlock" is
2387 if (flash_info[i].legacy_unlock) {
2391 * Disable legacy_unlock temporarily,
2392 * since flash_real_protect would
2393 * relock all other sectors again
2396 flash_info[i].legacy_unlock = 0;
2399 * Legacy unlocking (e.g. Intel J3) ->
2400 * unlock only one sector. This will
2401 * unlock all sectors.
2403 flash_real_protect (&flash_info[i], 0, 0);
2405 flash_info[i].legacy_unlock = 1;
2408 * Manually mark other sectors as
2409 * unlocked (unprotected)
2411 for (k = 1; k < flash_info[i].sector_count; k++)
2412 flash_info[i].protect[k] = 0;
2415 * No legancy unlocking -> unlock all sectors
2417 flash_protect (FLAG_PROTECT_CLEAR,
2418 flash_info[i].start[0],
2419 flash_info[i].start[0]
2420 + flash_info[i].size - 1,
2424 #endif /* CONFIG_SYS_FLASH_PROTECTION */
2427 flash_protect_default();
2428 #ifdef CONFIG_FLASH_CFI_MTD