2 * (C) Copyright 2002-2004
3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
5 * Copyright (C) 2003 Arabella Software Ltd.
6 * Yuli Barcohen <yuli@arabellasw.com>
12 * Tolunay Orkun <listmember@orkun.us>
14 * See file CREDITS for list of people who contributed to this
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 /* The DEBUG define must be before common to enable debugging */
38 #include <asm/processor.h>
40 #include <asm/byteorder.h>
41 #include <environment.h>
42 #ifdef CFG_FLASH_CFI_DRIVER
45 * This file implements a Common Flash Interface (CFI) driver for
48 * The width of the port and the width of the chips are determined at
49 * initialization. These widths are used to calculate the address for
50 * access CFI data structures.
53 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
54 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
55 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
56 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
57 * AMD CFI Specification, Release 2.0 December 1, 2001
58 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
59 * Device IDs, Publication Number 25538 Revision A, November 8, 2001
61 * Define CFG_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
62 * reading and writing ... (yes there is such a Hardware).
65 #ifndef CFG_FLASH_BANKS_LIST
66 #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
69 #define FLASH_CMD_CFI 0x98
70 #define FLASH_CMD_READ_ID 0x90
71 #define FLASH_CMD_RESET 0xff
72 #define FLASH_CMD_BLOCK_ERASE 0x20
73 #define FLASH_CMD_ERASE_CONFIRM 0xD0
74 #define FLASH_CMD_WRITE 0x40
75 #define FLASH_CMD_PROTECT 0x60
76 #define FLASH_CMD_PROTECT_SET 0x01
77 #define FLASH_CMD_PROTECT_CLEAR 0xD0
78 #define FLASH_CMD_CLEAR_STATUS 0x50
79 #define FLASH_CMD_WRITE_TO_BUFFER 0xE8
80 #define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
82 #define FLASH_STATUS_DONE 0x80
83 #define FLASH_STATUS_ESS 0x40
84 #define FLASH_STATUS_ECLBS 0x20
85 #define FLASH_STATUS_PSLBS 0x10
86 #define FLASH_STATUS_VPENS 0x08
87 #define FLASH_STATUS_PSS 0x04
88 #define FLASH_STATUS_DPS 0x02
89 #define FLASH_STATUS_R 0x01
90 #define FLASH_STATUS_PROTECT 0x01
92 #define AMD_CMD_RESET 0xF0
93 #define AMD_CMD_WRITE 0xA0
94 #define AMD_CMD_ERASE_START 0x80
95 #define AMD_CMD_ERASE_SECTOR 0x30
96 #define AMD_CMD_UNLOCK_START 0xAA
97 #define AMD_CMD_UNLOCK_ACK 0x55
98 #define AMD_CMD_WRITE_TO_BUFFER 0x25
99 #define AMD_CMD_WRITE_BUFFER_CONFIRM 0x29
101 #define AMD_STATUS_TOGGLE 0x40
102 #define AMD_STATUS_ERROR 0x20
104 #define FLASH_OFFSET_MANUFACTURER_ID 0x00
105 #define FLASH_OFFSET_DEVICE_ID 0x01
106 #define FLASH_OFFSET_DEVICE_ID2 0x0E
107 #define FLASH_OFFSET_DEVICE_ID3 0x0F
108 #define FLASH_OFFSET_CFI 0x55
109 #define FLASH_OFFSET_CFI_ALT 0x555
110 #define FLASH_OFFSET_CFI_RESP 0x10
111 #define FLASH_OFFSET_PRIMARY_VENDOR 0x13
112 /* extended query table primary address */
113 #define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15
114 #define FLASH_OFFSET_WTOUT 0x1F
115 #define FLASH_OFFSET_WBTOUT 0x20
116 #define FLASH_OFFSET_ETOUT 0x21
117 #define FLASH_OFFSET_CETOUT 0x22
118 #define FLASH_OFFSET_WMAX_TOUT 0x23
119 #define FLASH_OFFSET_WBMAX_TOUT 0x24
120 #define FLASH_OFFSET_EMAX_TOUT 0x25
121 #define FLASH_OFFSET_CEMAX_TOUT 0x26
122 #define FLASH_OFFSET_SIZE 0x27
123 #define FLASH_OFFSET_INTERFACE 0x28
124 #define FLASH_OFFSET_BUFFER_SIZE 0x2A
125 #define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
126 #define FLASH_OFFSET_ERASE_REGIONS 0x2D
127 #define FLASH_OFFSET_PROTECT 0x02
128 #define FLASH_OFFSET_USER_PROTECTION 0x85
129 #define FLASH_OFFSET_INTEL_PROTECTION 0x81
131 #define CFI_CMDSET_NONE 0
132 #define CFI_CMDSET_INTEL_EXTENDED 1
133 #define CFI_CMDSET_AMD_STANDARD 2
134 #define CFI_CMDSET_INTEL_STANDARD 3
135 #define CFI_CMDSET_AMD_EXTENDED 4
136 #define CFI_CMDSET_MITSU_STANDARD 256
137 #define CFI_CMDSET_MITSU_EXTENDED 257
138 #define CFI_CMDSET_SST 258
140 #ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
141 # undef FLASH_CMD_RESET
142 # define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */
149 unsigned long long ll;
153 volatile unsigned char *cp;
154 volatile unsigned short *wp;
155 volatile unsigned long *lp;
156 volatile unsigned long long *llp;
159 #define NUM_ERASE_REGIONS 4 /* max. number of erase regions */
161 static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
163 /* use CFG_MAX_FLASH_BANKS_DETECT if defined */
164 #ifdef CFG_MAX_FLASH_BANKS_DETECT
165 static ulong bank_base[CFG_MAX_FLASH_BANKS_DETECT] = CFG_FLASH_BANKS_LIST;
166 flash_info_t flash_info[CFG_MAX_FLASH_BANKS_DETECT]; /* FLASH chips info */
168 static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST;
169 flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* FLASH chips info */
173 * Check if chip width is defined. If not, start detecting with 8bit.
175 #ifndef CFG_FLASH_CFI_WIDTH
176 #define CFG_FLASH_CFI_WIDTH FLASH_CFI_8BIT
180 /*-----------------------------------------------------------------------
184 typedef unsigned long flash_sect_t;
186 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c);
187 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf);
188 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
189 uint offset, uchar cmd);
190 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect);
191 static int flash_isequal (flash_info_t * info, flash_sect_t sect,
192 uint offset, uchar cmd);
193 static int flash_isset (flash_info_t * info, flash_sect_t sect,
194 uint offset, uchar cmd);
195 static int flash_toggle (flash_info_t * info, flash_sect_t sect,
196 uint offset, uchar cmd);
197 static void flash_read_jedec_ids (flash_info_t * info);
198 static int flash_detect_cfi (flash_info_t * info);
199 static int flash_write_cfiword (flash_info_t * info, ulong dest,
201 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
202 ulong tout, char *prompt);
203 ulong flash_get_size (ulong base, int banknum);
204 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
205 static flash_info_t *flash_get_info(ulong base);
207 #ifdef CFG_FLASH_USE_BUFFER_WRITE
208 static int flash_write_cfibuffer (flash_info_t * info, ulong dest,
209 uchar * cp, int len);
212 /*-----------------------------------------------------------------------
213 * create an address based on the offset and the port width
215 static inline uchar *
216 flash_make_addr (flash_info_t * info, flash_sect_t sect, uint offset)
218 return ((uchar *) (info->start[sect] + (offset * info->portwidth)));
222 /*-----------------------------------------------------------------------
225 static void print_longlong (char *str, unsigned long long data)
230 cp = (unsigned char *) &data;
231 for (i = 0; i < 8; i++)
232 sprintf (&str[i * 2], "%2.2x", *cp++);
234 static void flash_printqry (flash_info_t * info, flash_sect_t sect)
239 for (x = 0; x < 0x40; x += 16U / info->portwidth) {
241 flash_make_addr (info, sect,
242 x + FLASH_OFFSET_CFI_RESP);
243 debug ("%p : ", cptr.cp);
244 for (y = 0; y < 16; y++) {
245 debug ("%2.2x ", cptr.cp[y]);
248 for (y = 0; y < 16; y++) {
249 if (cptr.cp[y] >= 0x20 && cptr.cp[y] <= 0x7e) {
250 debug ("%c", cptr.cp[y]);
261 /*-----------------------------------------------------------------------
262 * read a character at a port width address
264 static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
268 cp = flash_make_addr (info, 0, offset);
269 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
272 return (cp[info->portwidth - 1]);
276 /*-----------------------------------------------------------------------
277 * read a short word by swapping for ppc format.
279 static ushort flash_read_ushort (flash_info_t * info, flash_sect_t sect,
288 addr = flash_make_addr (info, sect, offset);
291 debug ("ushort addr is at %p info->portwidth = %d\n", addr,
293 for (x = 0; x < 2 * info->portwidth; x++) {
294 debug ("addr[%x] = 0x%x\n", x, addr[x]);
297 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
298 retval = ((addr[(info->portwidth)] << 8) | addr[0]);
300 retval = ((addr[(2 * info->portwidth) - 1] << 8) |
301 addr[info->portwidth - 1]);
304 debug ("retval = 0x%x\n", retval);
308 /*-----------------------------------------------------------------------
309 * read a long word by picking the least significant byte of each maximum
310 * port size word. Swap for ppc format.
312 static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
321 addr = flash_make_addr (info, sect, offset);
324 debug ("long addr is at %p info->portwidth = %d\n", addr,
326 for (x = 0; x < 4 * info->portwidth; x++) {
327 debug ("addr[%x] = 0x%x\n", x, addr[x]);
330 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
331 retval = (addr[0] << 16) | (addr[(info->portwidth)] << 24) |
332 (addr[(2 * info->portwidth)]) |
333 (addr[(3 * info->portwidth)] << 8);
335 retval = (addr[(2 * info->portwidth) - 1] << 24) |
336 (addr[(info->portwidth) - 1] << 16) |
337 (addr[(4 * info->portwidth) - 1] << 8) |
338 addr[(3 * info->portwidth) - 1];
344 #ifdef CONFIG_FLASH_CFI_LEGACY
345 /*-----------------------------------------------------------------------
346 * Call board code to request info about non-CFI flash.
347 * board_flash_get_legacy needs to fill in at least:
348 * info->portwidth, info->chipwidth and info->interface for Jedec probing.
350 static int flash_detect_legacy(ulong base, int banknum)
352 flash_info_t *info = &flash_info[banknum];
354 if (board_flash_get_legacy(base, banknum, info)) {
355 /* board code may have filled info completely. If not, we
356 use JEDEC ID probing. */
359 CFI_CMDSET_AMD_STANDARD,
360 CFI_CMDSET_INTEL_STANDARD
364 for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
365 info->vendor = modes[i];
366 info->start[0] = base;
367 if (info->portwidth == FLASH_CFI_8BIT
368 && info->interface == FLASH_CFI_X8X16) {
369 info->addr_unlock1 = 0x2AAA;
370 info->addr_unlock2 = 0x5555;
372 info->addr_unlock1 = 0x5555;
373 info->addr_unlock2 = 0x2AAA;
375 flash_read_jedec_ids(info);
376 debug("JEDEC PROBE: ID %x %x %x\n",
377 info->manufacturer_id,
380 if (jedec_flash_match(info, base))
385 switch(info->vendor) {
386 case CFI_CMDSET_INTEL_STANDARD:
387 case CFI_CMDSET_INTEL_EXTENDED:
388 info->cmd_reset = FLASH_CMD_RESET;
390 case CFI_CMDSET_AMD_STANDARD:
391 case CFI_CMDSET_AMD_EXTENDED:
392 case CFI_CMDSET_AMD_LEGACY:
393 info->cmd_reset = AMD_CMD_RESET;
396 info->flash_id = FLASH_MAN_CFI;
399 return 0; /* use CFI */
402 static inline int flash_detect_legacy(ulong base, int banknum)
404 return 0; /* use CFI */
409 /*-----------------------------------------------------------------------
411 unsigned long flash_init (void)
413 unsigned long size = 0;
416 #ifdef CFG_FLASH_PROTECTION
417 char *s = getenv("unlock");
420 /* Init: no FLASHes known */
421 for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
422 flash_info[i].flash_id = FLASH_UNKNOWN;
424 if (!flash_detect_legacy (bank_base[i], i))
425 flash_get_size (bank_base[i], i);
426 size += flash_info[i].size;
427 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
428 #ifndef CFG_FLASH_QUIET_TEST
429 printf ("## Unknown FLASH on Bank %d "
430 "- Size = 0x%08lx = %ld MB\n",
431 i+1, flash_info[i].size,
432 flash_info[i].size << 20);
433 #endif /* CFG_FLASH_QUIET_TEST */
435 #ifdef CFG_FLASH_PROTECTION
436 else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
438 * Only the U-Boot image and it's environment
439 * is protected, all other sectors are
440 * unprotected (unlocked) if flash hardware
441 * protection is used (CFG_FLASH_PROTECTION)
442 * and the environment variable "unlock" is
445 if (flash_info[i].legacy_unlock) {
449 * Disable legacy_unlock temporarily,
450 * since flash_real_protect would
451 * relock all other sectors again
454 flash_info[i].legacy_unlock = 0;
457 * Legacy unlocking (e.g. Intel J3) ->
458 * unlock only one sector. This will
459 * unlock all sectors.
461 flash_real_protect (&flash_info[i], 0, 0);
463 flash_info[i].legacy_unlock = 1;
466 * Manually mark other sectors as
467 * unlocked (unprotected)
469 for (k = 1; k < flash_info[i].sector_count; k++)
470 flash_info[i].protect[k] = 0;
473 * No legancy unlocking -> unlock all sectors
475 flash_protect (FLAG_PROTECT_CLEAR,
476 flash_info[i].start[0],
477 flash_info[i].start[0]
478 + flash_info[i].size - 1,
482 #endif /* CFG_FLASH_PROTECTION */
485 /* Monitor protection ON by default */
486 #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
487 flash_protect (FLAG_PROTECT_SET,
489 CFG_MONITOR_BASE + monitor_flash_len - 1,
490 flash_get_info(CFG_MONITOR_BASE));
493 /* Environment protection ON by default */
494 #ifdef CFG_ENV_IS_IN_FLASH
495 flash_protect (FLAG_PROTECT_SET,
497 CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
498 flash_get_info(CFG_ENV_ADDR));
501 /* Redundant environment protection ON by default */
502 #ifdef CFG_ENV_ADDR_REDUND
503 flash_protect (FLAG_PROTECT_SET,
505 CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
506 flash_get_info(CFG_ENV_ADDR_REDUND));
511 /*-----------------------------------------------------------------------
513 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
514 static flash_info_t *flash_get_info(ulong base)
517 flash_info_t * info = 0;
519 for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
520 info = & flash_info[i];
521 if (info->size && info->start[0] <= base &&
522 base <= info->start[0] + info->size - 1)
526 return i == CFG_MAX_FLASH_BANKS ? 0 : info;
530 /*-----------------------------------------------------------------------
532 int flash_erase (flash_info_t * info, int s_first, int s_last)
538 if (info->flash_id != FLASH_MAN_CFI) {
539 puts ("Can't erase unknown flash type - aborted\n");
542 if ((s_first < 0) || (s_first > s_last)) {
543 puts ("- no sectors to erase\n");
548 for (sect = s_first; sect <= s_last; ++sect) {
549 if (info->protect[sect]) {
554 printf ("- Warning: %d protected sectors will not be erased!\n",
561 for (sect = s_first; sect <= s_last; sect++) {
562 if (info->protect[sect] == 0) { /* not protected */
563 switch (info->vendor) {
564 case CFI_CMDSET_INTEL_STANDARD:
565 case CFI_CMDSET_INTEL_EXTENDED:
566 flash_write_cmd (info, sect, 0,
567 FLASH_CMD_CLEAR_STATUS);
568 flash_write_cmd (info, sect, 0,
569 FLASH_CMD_BLOCK_ERASE);
570 flash_write_cmd (info, sect, 0,
571 FLASH_CMD_ERASE_CONFIRM);
573 case CFI_CMDSET_AMD_STANDARD:
574 case CFI_CMDSET_AMD_EXTENDED:
575 flash_unlock_seq (info, sect);
576 flash_write_cmd (info, sect,
578 AMD_CMD_ERASE_START);
579 flash_unlock_seq (info, sect);
580 flash_write_cmd (info, sect, 0,
581 AMD_CMD_ERASE_SECTOR);
583 #ifdef CONFIG_FLASH_CFI_LEGACY
584 case CFI_CMDSET_AMD_LEGACY:
585 flash_unlock_seq (info, 0);
586 flash_write_cmd (info, 0, info->addr_unlock1,
587 AMD_CMD_ERASE_START);
588 flash_unlock_seq (info, 0);
589 flash_write_cmd (info, sect, 0,
590 AMD_CMD_ERASE_SECTOR);
594 debug ("Unkown flash vendor %d\n",
599 if (flash_full_status_check
600 (info, sect, info->erase_blk_tout, "erase")) {
610 /*-----------------------------------------------------------------------
612 void flash_print_info (flash_info_t * info)
616 if (info->flash_id != FLASH_MAN_CFI) {
617 puts ("missing or unknown FLASH type\n");
621 printf ("%s FLASH (%d x %d)",
623 (info->portwidth << 3), (info->chipwidth << 3));
624 if (info->size < 1024*1024)
625 printf (" Size: %ld kB in %d Sectors\n",
626 info->size >> 10, info->sector_count);
628 printf (" Size: %ld MB in %d Sectors\n",
629 info->size >> 20, info->sector_count);
631 switch (info->vendor) {
632 case CFI_CMDSET_INTEL_STANDARD:
633 printf ("Intel Standard");
635 case CFI_CMDSET_INTEL_EXTENDED:
636 printf ("Intel Extended");
638 case CFI_CMDSET_AMD_STANDARD:
639 printf ("AMD Standard");
641 case CFI_CMDSET_AMD_EXTENDED:
642 printf ("AMD Extended");
644 #ifdef CONFIG_FLASH_CFI_LEGACY
645 case CFI_CMDSET_AMD_LEGACY:
646 printf ("AMD Legacy");
650 printf ("Unknown (%d)", info->vendor);
653 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X",
654 info->manufacturer_id, info->device_id);
655 if (info->device_id == 0x7E) {
656 printf("%04X", info->device_id2);
658 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
659 info->erase_blk_tout,
661 if (info->buffer_size > 1) {
662 printf (" Buffer write timeout: %ld ms, "
663 "buffer size: %d bytes\n",
664 info->buffer_write_tout,
668 puts ("\n Sector Start Addresses:");
669 for (i = 0; i < info->sector_count; ++i) {
672 #ifdef CFG_FLASH_EMPTY_INFO
676 volatile unsigned long *flash;
679 * Check if whole sector is erased
681 if (i != (info->sector_count - 1))
682 size = info->start[i + 1] - info->start[i];
684 size = info->start[0] + info->size - info->start[i];
686 flash = (volatile unsigned long *) info->start[i];
687 size = size >> 2; /* divide by 4 for longword access */
688 for (k = 0; k < size; k++) {
689 if (*flash++ != 0xffffffff) {
695 /* print empty and read-only info */
696 printf (" %08lX %c %s ",
699 info->protect[i] ? "RO" : " ");
700 #else /* ! CFG_FLASH_EMPTY_INFO */
701 printf (" %08lX %s ",
703 info->protect[i] ? "RO" : " ");
710 /*-----------------------------------------------------------------------
711 * Copy memory to flash, returns:
714 * 2 - Flash not erased
716 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
724 #ifdef CFG_FLASH_USE_BUFFER_WRITE
727 /* get lower aligned address */
728 /* get lower aligned address */
729 wp = (addr & ~(info->portwidth - 1));
731 /* handle unaligned start */
732 if ((aln = addr - wp) != 0) {
735 for (i = 0; i < aln; ++i, ++cp)
736 flash_add_byte (info, &cword, (*(uchar *) cp));
738 for (; (i < info->portwidth) && (cnt > 0); i++) {
739 flash_add_byte (info, &cword, *src++);
743 for (; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
744 flash_add_byte (info, &cword, (*(uchar *) cp));
745 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
750 /* handle the aligned part */
751 #ifdef CFG_FLASH_USE_BUFFER_WRITE
752 buffered_size = (info->portwidth / info->chipwidth);
753 buffered_size *= info->buffer_size;
754 while (cnt >= info->portwidth) {
755 /* prohibit buffer write when buffer_size is 1 */
756 if (info->buffer_size == 1) {
758 for (i = 0; i < info->portwidth; i++)
759 flash_add_byte (info, &cword, *src++);
760 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
762 wp += info->portwidth;
763 cnt -= info->portwidth;
767 /* write buffer until next buffered_size aligned boundary */
768 i = buffered_size - (wp % buffered_size);
771 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
773 i -= i & (info->portwidth - 1);
779 while (cnt >= info->portwidth) {
781 for (i = 0; i < info->portwidth; i++) {
782 flash_add_byte (info, &cword, *src++);
784 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
786 wp += info->portwidth;
787 cnt -= info->portwidth;
789 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
795 * handle unaligned tail bytes
798 for (i = 0, cp = wp; (i < info->portwidth) && (cnt > 0); ++i, ++cp) {
799 flash_add_byte (info, &cword, *src++);
802 for (; i < info->portwidth; ++i, ++cp) {
803 flash_add_byte (info, &cword, (*(uchar *) cp));
806 return flash_write_cfiword (info, wp, cword);
809 /*-----------------------------------------------------------------------
811 #ifdef CFG_FLASH_PROTECTION
813 int flash_real_protect (flash_info_t * info, long sector, int prot)
817 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
818 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
820 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
822 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
825 flash_full_status_check (info, sector, info->erase_blk_tout,
826 prot ? "protect" : "unprotect")) == 0) {
828 info->protect[sector] = prot;
831 * On some of Intel's flash chips (marked via legacy_unlock)
832 * unprotect unprotects all locking.
834 if ((prot == 0) && (info->legacy_unlock)) {
837 for (i = 0; i < info->sector_count; i++) {
838 if (info->protect[i])
839 flash_real_protect (info, i, 1);
846 /*-----------------------------------------------------------------------
847 * flash_read_user_serial - read the OneTimeProgramming cells
849 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
856 src = flash_make_addr (info, 0, FLASH_OFFSET_USER_PROTECTION);
857 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
858 memcpy (dst, src + offset, len);
859 flash_write_cmd (info, 0, 0, info->cmd_reset);
863 * flash_read_factory_serial - read the device Id from the protection area
865 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
870 src = flash_make_addr (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
871 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
872 memcpy (buffer, src + offset, len);
873 flash_write_cmd (info, 0, 0, info->cmd_reset);
876 #endif /* CFG_FLASH_PROTECTION */
879 * flash_is_busy - check to see if the flash is busy
881 * This routine checks the status of the chip and returns true if the
884 static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
888 switch (info->vendor) {
889 case CFI_CMDSET_INTEL_STANDARD:
890 case CFI_CMDSET_INTEL_EXTENDED:
891 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
893 case CFI_CMDSET_AMD_STANDARD:
894 case CFI_CMDSET_AMD_EXTENDED:
895 #ifdef CONFIG_FLASH_CFI_LEGACY
896 case CFI_CMDSET_AMD_LEGACY:
898 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
903 debug ("flash_is_busy: %d\n", retval);
907 /*-----------------------------------------------------------------------
908 * wait for XSR.7 to be set. Time out with an error if it does not.
909 * This routine does not set the flash to read-array mode.
911 static int flash_status_check (flash_info_t * info, flash_sect_t sector,
912 ulong tout, char *prompt)
920 /* Wait for command completion */
921 start = get_timer (0);
922 while (flash_is_busy (info, sector)) {
923 if (get_timer (start) > tout) {
924 printf ("Flash %s timeout at address %lx data %lx\n",
925 prompt, info->start[sector],
926 flash_read_long (info, sector, 0));
927 flash_write_cmd (info, sector, 0, info->cmd_reset);
930 udelay (1); /* also triggers watchdog */
935 /*-----------------------------------------------------------------------
936 * Wait for XSR.7 to be set, if it times out print an error, otherwise
937 * do a full status check.
939 * This routine sets the flash to read-array mode.
941 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
942 ulong tout, char *prompt)
946 retcode = flash_status_check (info, sector, tout, prompt);
947 switch (info->vendor) {
948 case CFI_CMDSET_INTEL_EXTENDED:
949 case CFI_CMDSET_INTEL_STANDARD:
950 if ((retcode == ERR_OK)
951 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
953 printf ("Flash %s error at address %lx\n", prompt,
954 info->start[sector]);
955 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
956 FLASH_STATUS_PSLBS)) {
957 puts ("Command Sequence Error.\n");
958 } else if (flash_isset (info, sector, 0,
959 FLASH_STATUS_ECLBS)) {
960 puts ("Block Erase Error.\n");
961 retcode = ERR_NOT_ERASED;
962 } else if (flash_isset (info, sector, 0,
963 FLASH_STATUS_PSLBS)) {
964 puts ("Locking Error\n");
966 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
967 puts ("Block locked.\n");
968 retcode = ERR_PROTECTED;
970 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
971 puts ("Vpp Low Error.\n");
973 flash_write_cmd (info, sector, 0, info->cmd_reset);
981 /*-----------------------------------------------------------------------
983 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
985 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
988 unsigned long long ll;
991 switch (info->portwidth) {
995 case FLASH_CFI_16BIT:
996 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
999 cword->w = (cword->w >> 8) | w;
1001 cword->w = (cword->w << 8) | c;
1004 case FLASH_CFI_32BIT:
1005 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
1008 cword->l = (cword->l >> 8) | l;
1010 cword->l = (cword->l << 8) | c;
1013 case FLASH_CFI_64BIT:
1014 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
1017 cword->ll = (cword->ll >> 8) | ll;
1019 cword->ll = (cword->ll << 8) | c;
1026 /*-----------------------------------------------------------------------
1027 * make a proper sized command based on the port and chip widths
1029 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf)
1032 uchar *cp = (uchar *) cmdbuf;
1034 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
1035 for (i = info->portwidth; i > 0; i--)
1037 for (i = 1; i <= info->portwidth; i++)
1039 *cp++ = (i & (info->chipwidth - 1)) ? '\0' : cmd;
1043 * Write a proper sized command to the correct address
1045 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
1046 uint offset, uchar cmd)
1049 volatile cfiptr_t addr;
1052 addr.cp = flash_make_addr (info, sect, offset);
1053 flash_make_cmd (info, cmd, &cword);
1054 switch (info->portwidth) {
1055 case FLASH_CFI_8BIT:
1056 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr.cp, cmd,
1057 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1060 case FLASH_CFI_16BIT:
1061 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr.wp,
1063 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1066 case FLASH_CFI_32BIT:
1067 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr.lp,
1069 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1072 case FLASH_CFI_64BIT:
1077 print_longlong (str, cword.ll);
1079 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
1081 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1084 *addr.llp = cword.ll;
1088 /* Ensure all the instructions are fully finished */
1092 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
1094 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
1095 flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
1098 /*-----------------------------------------------------------------------
1100 static int flash_isequal (flash_info_t * info, flash_sect_t sect,
1101 uint offset, uchar cmd)
1107 cptr.cp = flash_make_addr (info, sect, offset);
1108 flash_make_cmd (info, cmd, &cword);
1110 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, cptr.cp);
1111 switch (info->portwidth) {
1112 case FLASH_CFI_8BIT:
1113 debug ("is= %x %x\n", cptr.cp[0], cword.c);
1114 retval = (cptr.cp[0] == cword.c);
1116 case FLASH_CFI_16BIT:
1117 debug ("is= %4.4x %4.4x\n", cptr.wp[0], cword.w);
1118 retval = (cptr.wp[0] == cword.w);
1120 case FLASH_CFI_32BIT:
1121 debug ("is= %8.8lx %8.8lx\n", cptr.lp[0], cword.l);
1122 retval = (cptr.lp[0] == cword.l);
1124 case FLASH_CFI_64BIT:
1130 print_longlong (str1, cptr.llp[0]);
1131 print_longlong (str2, cword.ll);
1132 debug ("is= %s %s\n", str1, str2);
1135 retval = (cptr.llp[0] == cword.ll);
1144 /*-----------------------------------------------------------------------
1146 static int flash_isset (flash_info_t * info, flash_sect_t sect,
1147 uint offset, uchar cmd)
1153 cptr.cp = flash_make_addr (info, sect, offset);
1154 flash_make_cmd (info, cmd, &cword);
1155 switch (info->portwidth) {
1156 case FLASH_CFI_8BIT:
1157 retval = ((cptr.cp[0] & cword.c) == cword.c);
1159 case FLASH_CFI_16BIT:
1160 retval = ((cptr.wp[0] & cword.w) == cword.w);
1162 case FLASH_CFI_32BIT:
1163 retval = ((cptr.lp[0] & cword.l) == cword.l);
1165 case FLASH_CFI_64BIT:
1166 retval = ((cptr.llp[0] & cword.ll) == cword.ll);
1175 /*-----------------------------------------------------------------------
1177 static int flash_toggle (flash_info_t * info, flash_sect_t sect,
1178 uint offset, uchar cmd)
1184 cptr.cp = flash_make_addr (info, sect, offset);
1185 flash_make_cmd (info, cmd, &cword);
1186 switch (info->portwidth) {
1187 case FLASH_CFI_8BIT:
1188 retval = ((cptr.cp[0] & cword.c) != (cptr.cp[0] & cword.c));
1190 case FLASH_CFI_16BIT:
1191 retval = ((cptr.wp[0] & cword.w) != (cptr.wp[0] & cword.w));
1193 case FLASH_CFI_32BIT:
1194 retval = ((cptr.lp[0] & cword.l) != (cptr.lp[0] & cword.l));
1196 case FLASH_CFI_64BIT:
1197 retval = ((cptr.llp[0] & cword.ll) !=
1198 (cptr.llp[0] & cword.ll));
1207 /*-----------------------------------------------------------------------
1208 * read jedec ids from device and set corresponding fields in info struct
1210 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1213 static void flash_read_jedec_ids (flash_info_t * info)
1215 info->manufacturer_id = 0;
1216 info->device_id = 0;
1217 info->device_id2 = 0;
1219 switch (info->vendor) {
1220 case CFI_CMDSET_INTEL_STANDARD:
1221 case CFI_CMDSET_INTEL_EXTENDED:
1222 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1223 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1224 udelay(1000); /* some flash are slow to respond */
1225 info->manufacturer_id = flash_read_uchar (info,
1226 FLASH_OFFSET_MANUFACTURER_ID);
1227 info->device_id = flash_read_uchar (info,
1228 FLASH_OFFSET_DEVICE_ID);
1229 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1231 case CFI_CMDSET_AMD_STANDARD:
1232 case CFI_CMDSET_AMD_EXTENDED:
1233 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1234 flash_unlock_seq(info, 0);
1235 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1236 udelay(1000); /* some flash are slow to respond */
1237 info->manufacturer_id = flash_read_uchar (info,
1238 FLASH_OFFSET_MANUFACTURER_ID);
1239 info->device_id = flash_read_uchar (info,
1240 FLASH_OFFSET_DEVICE_ID);
1241 if (info->device_id == 0x7E) {
1242 /* AMD 3-byte (expanded) device ids */
1243 info->device_id2 = flash_read_uchar (info,
1244 FLASH_OFFSET_DEVICE_ID2);
1245 info->device_id2 <<= 8;
1246 info->device_id2 |= flash_read_uchar (info,
1247 FLASH_OFFSET_DEVICE_ID3);
1249 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1256 /*-----------------------------------------------------------------------
1257 * detect if flash is compatible with the Common Flash Interface (CFI)
1258 * http://www.jedec.org/download/search/jesd68.pdf
1260 static int __flash_detect_cfi (flash_info_t * info)
1264 flash_write_cmd (info, 0, 0, info->cmd_reset);
1266 cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
1268 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
1270 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1271 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1272 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1273 info->interface = flash_read_ushort (info, 0,
1274 FLASH_OFFSET_INTERFACE);
1275 info->cfi_offset = flash_offset_cfi[cfi_offset];
1276 debug ("device interface is %d\n",
1278 debug ("found port %d chip %d ",
1279 info->portwidth, info->chipwidth);
1280 debug ("port %d bits chip %d bits\n",
1281 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1282 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1284 /* calculate command offsets as in the Linux driver */
1285 info->addr_unlock1 = 0x555;
1286 info->addr_unlock2 = 0x2aa;
1289 * modify the unlock address if we are
1290 * in compatibility mode
1292 if ( /* x8/x16 in x8 mode */
1293 ((info->chipwidth == FLASH_CFI_BY8) &&
1294 (info->interface == FLASH_CFI_X8X16)) ||
1295 /* x16/x32 in x16 mode */
1296 ((info->chipwidth == FLASH_CFI_BY16) &&
1297 (info->interface == FLASH_CFI_X16X32)))
1299 info->addr_unlock1 = 0xaaa;
1300 info->addr_unlock2 = 0x555;
1303 info->name = "CFI conformant";
1311 static int flash_detect_cfi (flash_info_t * info)
1313 debug ("flash detect cfi\n");
1315 for (info->portwidth = CFG_FLASH_CFI_WIDTH;
1316 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1317 for (info->chipwidth = FLASH_CFI_BY8;
1318 info->chipwidth <= info->portwidth;
1319 info->chipwidth <<= 1)
1320 if (__flash_detect_cfi(info))
1323 debug ("not found\n");
1328 * The following code cannot be run from FLASH!
1331 ulong flash_get_size (ulong base, int banknum)
1333 flash_info_t *info = &flash_info[banknum];
1335 flash_sect_t sect_cnt;
1336 unsigned long sector;
1339 uchar num_erase_regions;
1340 int erase_region_size;
1341 int erase_region_count;
1342 int geometry_reversed = 0;
1345 info->cfi_version = 0;
1346 #ifdef CFG_FLASH_PROTECTION
1347 info->legacy_unlock = 0;
1350 info->start[0] = base;
1352 if (flash_detect_cfi (info)) {
1353 info->vendor = flash_read_ushort (info, 0,
1354 FLASH_OFFSET_PRIMARY_VENDOR);
1355 flash_read_jedec_ids (info);
1356 flash_write_cmd (info, 0, info->cfi_offset, FLASH_CMD_CFI);
1357 num_erase_regions = flash_read_uchar (info,
1358 FLASH_OFFSET_NUM_ERASE_REGIONS);
1359 info->ext_addr = flash_read_ushort (info, 0,
1360 FLASH_OFFSET_EXT_QUERY_T_P_ADDR);
1361 if (info->ext_addr) {
1362 info->cfi_version = (ushort) flash_read_uchar (info,
1363 info->ext_addr + 3) << 8;
1364 info->cfi_version |= (ushort) flash_read_uchar (info,
1365 info->ext_addr + 4);
1368 flash_printqry (info, 0);
1370 switch (info->vendor) {
1371 case CFI_CMDSET_INTEL_STANDARD:
1372 case CFI_CMDSET_INTEL_EXTENDED:
1374 info->cmd_reset = FLASH_CMD_RESET;
1375 #ifdef CFG_FLASH_PROTECTION
1376 /* read legacy lock/unlock bit from intel flash */
1377 if (info->ext_addr) {
1378 info->legacy_unlock = flash_read_uchar (info,
1379 info->ext_addr + 5) & 0x08;
1383 case CFI_CMDSET_AMD_STANDARD:
1384 case CFI_CMDSET_AMD_EXTENDED:
1385 info->cmd_reset = AMD_CMD_RESET;
1386 /* check if flash geometry needs reversal */
1387 if (num_erase_regions <= 1)
1389 /* reverse geometry if top boot part */
1390 if (info->cfi_version < 0x3131) {
1391 /* CFI < 1.1, try to guess from device id */
1392 if ((info->device_id & 0x80) != 0) {
1393 geometry_reversed = 1;
1397 /* CFI >= 1.1, deduct from top/bottom flag */
1398 /* note: ext_addr is valid since cfi_version > 0 */
1399 if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1400 geometry_reversed = 1;
1405 debug ("manufacturer is %d\n", info->vendor);
1406 debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
1407 debug ("device id is 0x%x\n", info->device_id);
1408 debug ("device id2 is 0x%x\n", info->device_id2);
1409 debug ("cfi version is 0x%04x\n", info->cfi_version);
1411 size_ratio = info->portwidth / info->chipwidth;
1412 /* if the chip is x8/x16 reduce the ratio by half */
1413 if ((info->interface == FLASH_CFI_X8X16)
1414 && (info->chipwidth == FLASH_CFI_BY8)) {
1417 debug ("size_ratio %d port %d bits chip %d bits\n",
1418 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1419 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1420 debug ("found %d erase regions\n", num_erase_regions);
1423 for (i = 0; i < num_erase_regions; i++) {
1424 if (i > NUM_ERASE_REGIONS) {
1425 printf ("%d erase regions found, only %d used\n",
1426 num_erase_regions, NUM_ERASE_REGIONS);
1429 if (geometry_reversed)
1430 tmp = flash_read_long (info, 0,
1431 FLASH_OFFSET_ERASE_REGIONS +
1432 (num_erase_regions - 1 - i) * 4);
1434 tmp = flash_read_long (info, 0,
1435 FLASH_OFFSET_ERASE_REGIONS +
1438 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
1440 erase_region_count = (tmp & 0xffff) + 1;
1441 debug ("erase_region_count = %d erase_region_size = %d\n",
1442 erase_region_count, erase_region_size);
1443 for (j = 0; j < erase_region_count; j++) {
1444 if (sect_cnt >= CFG_MAX_FLASH_SECT) {
1445 printf("ERROR: too many flash sectors\n");
1448 info->start[sect_cnt] = sector;
1449 sector += (erase_region_size * size_ratio);
1452 * Only read protection status from
1453 * supported devices (intel...)
1455 switch (info->vendor) {
1456 case CFI_CMDSET_INTEL_EXTENDED:
1457 case CFI_CMDSET_INTEL_STANDARD:
1458 info->protect[sect_cnt] =
1459 flash_isset (info, sect_cnt,
1460 FLASH_OFFSET_PROTECT,
1461 FLASH_STATUS_PROTECT);
1464 /* default: not protected */
1465 info->protect[sect_cnt] = 0;
1472 info->sector_count = sect_cnt;
1473 info->size = 1 << flash_read_uchar (info, FLASH_OFFSET_SIZE);
1474 /* multiply the size by the number of chips */
1475 info->size *= size_ratio;
1476 info->buffer_size = 1 << flash_read_ushort (info, 0,
1477 FLASH_OFFSET_BUFFER_SIZE);
1478 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_ETOUT);
1479 info->erase_blk_tout = tmp *
1480 (1 << flash_read_uchar (
1481 info, FLASH_OFFSET_EMAX_TOUT));
1482 tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT)) *
1483 (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT));
1484 /* round up when converting to ms */
1485 info->buffer_write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0);
1486 tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT)) *
1487 (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT));
1488 /* round up when converting to ms */
1489 info->write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0);
1490 info->flash_id = FLASH_MAN_CFI;
1491 if ((info->interface == FLASH_CFI_X8X16) &&
1492 (info->chipwidth == FLASH_CFI_BY8)) {
1493 /* XXX - Need to test on x8/x16 in parallel. */
1494 info->portwidth >>= 1;
1498 flash_write_cmd (info, 0, 0, info->cmd_reset);
1499 return (info->size);
1502 /* loop through the sectors from the highest address when the passed
1503 * address is greater or equal to the sector address we have a match
1505 static flash_sect_t find_sector (flash_info_t * info, ulong addr)
1507 flash_sect_t sector;
1509 for (sector = info->sector_count - 1; sector >= 0; sector--) {
1510 if (addr >= info->start[sector])
1516 /*-----------------------------------------------------------------------
1518 static int flash_write_cfiword (flash_info_t * info, ulong dest,
1525 ctladdr.cp = flash_make_addr (info, 0, 0);
1526 cptr.cp = (uchar *) dest;
1528 /* Check if Flash is (sufficiently) erased */
1529 switch (info->portwidth) {
1530 case FLASH_CFI_8BIT:
1531 flag = ((cptr.cp[0] & cword.c) == cword.c);
1533 case FLASH_CFI_16BIT:
1534 flag = ((cptr.wp[0] & cword.w) == cword.w);
1536 case FLASH_CFI_32BIT:
1537 flag = ((cptr.lp[0] & cword.l) == cword.l);
1539 case FLASH_CFI_64BIT:
1540 flag = ((cptr.llp[0] & cword.ll) == cword.ll);
1548 /* Disable interrupts which might cause a timeout here */
1549 flag = disable_interrupts ();
1551 switch (info->vendor) {
1552 case CFI_CMDSET_INTEL_EXTENDED:
1553 case CFI_CMDSET_INTEL_STANDARD:
1554 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
1555 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
1557 case CFI_CMDSET_AMD_EXTENDED:
1558 case CFI_CMDSET_AMD_STANDARD:
1559 #ifdef CONFIG_FLASH_CFI_LEGACY
1560 case CFI_CMDSET_AMD_LEGACY:
1562 flash_unlock_seq (info, 0);
1563 flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE);
1567 switch (info->portwidth) {
1568 case FLASH_CFI_8BIT:
1569 cptr.cp[0] = cword.c;
1571 case FLASH_CFI_16BIT:
1572 cptr.wp[0] = cword.w;
1574 case FLASH_CFI_32BIT:
1575 cptr.lp[0] = cword.l;
1577 case FLASH_CFI_64BIT:
1578 cptr.llp[0] = cword.ll;
1582 /* re-enable interrupts if necessary */
1584 enable_interrupts ();
1586 return flash_full_status_check (info, find_sector (info, dest),
1587 info->write_tout, "write");
1590 #ifdef CFG_FLASH_USE_BUFFER_WRITE
1592 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
1595 flash_sect_t sector;
1598 volatile cfiptr_t src;
1599 volatile cfiptr_t dst;
1601 switch (info->vendor) {
1602 case CFI_CMDSET_INTEL_STANDARD:
1603 case CFI_CMDSET_INTEL_EXTENDED:
1605 dst.cp = (uchar *) dest;
1606 sector = find_sector (info, dest);
1607 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1608 flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
1609 retcode = flash_status_check (info, sector,
1610 info->buffer_write_tout,
1612 if (retcode == ERR_OK) {
1613 /* reduce the number of loops by the width of
1615 switch (info->portwidth) {
1616 case FLASH_CFI_8BIT:
1619 case FLASH_CFI_16BIT:
1622 case FLASH_CFI_32BIT:
1625 case FLASH_CFI_64BIT:
1632 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1634 switch (info->portwidth) {
1635 case FLASH_CFI_8BIT:
1636 *dst.cp++ = *src.cp++;
1638 case FLASH_CFI_16BIT:
1639 *dst.wp++ = *src.wp++;
1641 case FLASH_CFI_32BIT:
1642 *dst.lp++ = *src.lp++;
1644 case FLASH_CFI_64BIT:
1645 *dst.llp++ = *src.llp++;
1652 flash_write_cmd (info, sector, 0,
1653 FLASH_CMD_WRITE_BUFFER_CONFIRM);
1654 retcode = flash_full_status_check (
1655 info, sector, info->buffer_write_tout,
1660 case CFI_CMDSET_AMD_STANDARD:
1661 case CFI_CMDSET_AMD_EXTENDED:
1663 dst.cp = (uchar *) dest;
1664 sector = find_sector (info, dest);
1666 flash_unlock_seq(info,0);
1667 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_TO_BUFFER);
1669 switch (info->portwidth) {
1670 case FLASH_CFI_8BIT:
1672 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1673 while (cnt-- > 0) *dst.cp++ = *src.cp++;
1675 case FLASH_CFI_16BIT:
1677 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1678 while (cnt-- > 0) *dst.wp++ = *src.wp++;
1680 case FLASH_CFI_32BIT:
1682 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1683 while (cnt-- > 0) *dst.lp++ = *src.lp++;
1685 case FLASH_CFI_64BIT:
1687 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1688 while (cnt-- > 0) *dst.llp++ = *src.llp++;
1694 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
1695 retcode = flash_full_status_check (info, sector,
1696 info->buffer_write_tout,
1701 debug ("Unknown Command Set\n");
1705 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
1707 #endif /* CFG_FLASH_CFI */