3 bool "NAND Device Support"
6 config SYS_NAND_SELF_INIT
9 This option, if enabled, provides more flexible and linux-like
10 NAND initialization process.
13 bool "Support Denali NAND controller"
14 select SYS_NAND_SELF_INIT
17 Enable support for the Denali NAND controller.
20 bool "Support Denali NAND controller as a DT device"
21 depends on NAND_DENALI && OF_CONTROL && DM
23 Enable the driver for NAND flash on platforms using a Denali NAND
24 controller as a DT device.
26 config SYS_NAND_DENALI_64BIT
27 bool "Use 64-bit variant of Denali NAND controller"
28 depends on NAND_DENALI
30 The Denali NAND controller IP has some variations in terms of
31 the bus interface. The DMA setup sequence is completely differenct
32 between 32bit / 64bit AXI bus variants.
34 If your Denali NAND controller is the 64-bit variant, say Y.
35 Otherwise (32 bit), say N.
37 config NAND_DENALI_SPARE_AREA_SKIP_BYTES
38 int "Number of bytes skipped in OOB area"
39 depends on NAND_DENALI
42 This option specifies the number of bytes to skip from the beginning
43 of OOB area before last ECC sector data starts. This is potentially
44 used to preserve the bad block marker in the OOB area.
47 bool "Support for Freescale NFC for VF610"
48 select SYS_NAND_SELF_INIT
51 Enables support for NAND Flash Controller on some Freescale
52 processors like the VF610, MCF54418 or Kinetis K70.
53 The driver supports a maximum 2k page size. The driver
54 currently does not support hardware ECC.
57 prompt "Hardware ECC strength"
58 depends on NAND_VF610_NFC
59 default SYS_NAND_VF610_NFC_45_ECC_BYTES
61 Select the ECC strength used in the hardware BCH ECC block.
63 config SYS_NAND_VF610_NFC_45_ECC_BYTES
64 bool "24-error correction (45 ECC bytes)"
66 config SYS_NAND_VF610_NFC_60_ECC_BYTES
67 bool "32-error correction (60 ECC bytes)"
72 bool "Support for NAND on PXA3xx and Armada 370/XP/38x"
73 select SYS_NAND_SELF_INIT
76 This enables the driver for the NAND flash device found on
77 PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2).
80 bool "Support for NAND on Allwinner SoCs"
81 depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
82 select SYS_NAND_SELF_INIT
83 select SYS_NAND_U_BOOT_LOCATIONS
86 Enable support for NAND. This option enables the standard and
88 The SPL driver only supports reading from the NAND using DMA
93 config NAND_SUNXI_SPL_ECC_STRENGTH
94 int "Allwinner NAND SPL ECC Strength"
97 config NAND_SUNXI_SPL_ECC_SIZE
98 int "Allwinner NAND SPL ECC Step Size"
101 config NAND_SUNXI_SPL_USABLE_PAGE_SIZE
102 int "Allwinner NAND SPL Usable Page Size"
108 bool "Configure Arasan Nand"
111 This enables Nand driver support for Arasan nand flash
112 controller. This uses the hardware ECC for read and
116 bool "MXS NAND support"
117 depends on MX6 || MX7
120 This enables NAND driver for the NAND flash controller on the
124 bool "Support for Zynq Nand controller"
125 select SYS_NAND_SELF_INIT
128 This enables Nand driver support for Nand flash controller
131 comment "Generic NAND options"
133 # Enhance depends when converting drivers to Kconfig which use this config
134 # option (mxc_nand, ndfc, omap_gpmc).
135 config SYS_NAND_BUSWIDTH_16BIT
136 bool "Use 16-bit NAND interface"
137 depends on NAND_VF610_NFC
139 Indicates that NAND device has 16-bit wide data-bus. In absence of this
140 config, bus-width of NAND device is assumed to be either 8-bit and later
141 determined by reading ONFI params.
142 Above config is useful when NAND device's bus-width information cannot
143 be determined from on-chip ONFI params, like in following scenarios:
144 - SPL boot does not support reading of ONFI parameters. This is done to
145 keep SPL code foot-print small.
146 - In current U-Boot flow using nand_init(), driver initialization
147 happens in board_nand_init() which is called before any device probe
148 (nand_scan_ident + nand_scan_tail), thus device's ONFI parameters are
149 not available while configuring controller. So a static CONFIG_NAND_xx
150 is needed to know the device's bus-width in advance.
154 config SYS_NAND_U_BOOT_LOCATIONS
155 bool "Define U-boot binaries locations in NAND"
157 Enable CONFIG_SYS_NAND_U_BOOT_OFFS though Kconfig.
158 This option should not be enabled when compiling U-boot for boards
159 defining CONFIG_SYS_NAND_U_BOOT_OFFS in their include/configs/<board>.h
162 config SYS_NAND_U_BOOT_OFFS
163 hex "Location in NAND to read U-Boot from"
164 default 0x800000 if NAND_SUNXI
165 depends on SYS_NAND_U_BOOT_LOCATIONS
167 Set the offset from the start of the nand where u-boot should be
170 config SYS_NAND_U_BOOT_OFFS_REDUND
171 hex "Location in NAND to read U-Boot from"
172 default SYS_NAND_U_BOOT_OFFS
173 depends on SYS_NAND_U_BOOT_LOCATIONS
175 Set the offset from the start of the nand where the redundant u-boot
176 should be loaded from.
178 config SPL_NAND_DENALI
179 bool "Support Denali NAND controller for SPL"
181 This is a small implementation of the Denali NAND controller