2 * Copyright 2004-2008 Freescale Semiconductor, Inc.
3 * Copyright 2009 Semihalf.
4 * (C) Copyright 2009 Stefan Roese <sr@denx.de>
6 * Based on original driver from Freescale Semiconductor
7 * written by John Rigby <jrigby@freescale.com> on basis
8 * of drivers/mtd/nand/mxc_nand.c. Reworked and extended
9 * Piotr Ziecik <kosmo@semihalf.com>.
11 * SPDX-License-Identifier: GPL-2.0+
17 #include <linux/mtd/mtd.h>
18 #include <linux/mtd/nand.h>
19 #include <linux/mtd/nand_ecc.h>
20 #include <linux/compat.h>
22 #include <asm/errno.h>
24 #include <asm/processor.h>
27 #define DRV_NAME "mpc5121_nfc"
30 #define NFC_RESET_TIMEOUT 1000 /* 1 ms */
31 #define NFC_TIMEOUT 2000 /* 2000 us */
33 /* Addresses for NFC MAIN RAM BUFFER areas */
34 #define NFC_MAIN_AREA(n) ((n) * 0x200)
36 /* Addresses for NFC SPARE BUFFER areas */
37 #define NFC_SPARE_BUFFERS 8
38 #define NFC_SPARE_LEN 0x40
39 #define NFC_SPARE_AREA(n) (0x1000 + ((n) * NFC_SPARE_LEN))
41 /* MPC5121 NFC registers */
42 #define NFC_BUF_ADDR 0x1E04
43 #define NFC_FLASH_ADDR 0x1E06
44 #define NFC_FLASH_CMD 0x1E08
45 #define NFC_CONFIG 0x1E0A
46 #define NFC_ECC_STATUS1 0x1E0C
47 #define NFC_ECC_STATUS2 0x1E0E
48 #define NFC_SPAS 0x1E10
49 #define NFC_WRPROT 0x1E12
50 #define NFC_NF_WRPRST 0x1E18
51 #define NFC_CONFIG1 0x1E1A
52 #define NFC_CONFIG2 0x1E1C
53 #define NFC_UNLOCKSTART_BLK0 0x1E20
54 #define NFC_UNLOCKEND_BLK0 0x1E22
55 #define NFC_UNLOCKSTART_BLK1 0x1E24
56 #define NFC_UNLOCKEND_BLK1 0x1E26
57 #define NFC_UNLOCKSTART_BLK2 0x1E28
58 #define NFC_UNLOCKEND_BLK2 0x1E2A
59 #define NFC_UNLOCKSTART_BLK3 0x1E2C
60 #define NFC_UNLOCKEND_BLK3 0x1E2E
62 /* Bit Definitions: NFC_BUF_ADDR */
63 #define NFC_RBA_MASK (7 << 0)
64 #define NFC_ACTIVE_CS_SHIFT 5
65 #define NFC_ACTIVE_CS_MASK (3 << NFC_ACTIVE_CS_SHIFT)
67 /* Bit Definitions: NFC_CONFIG */
68 #define NFC_BLS_UNLOCKED (1 << 1)
70 /* Bit Definitions: NFC_CONFIG1 */
71 #define NFC_ECC_4BIT (1 << 0)
72 #define NFC_FULL_PAGE_DMA (1 << 1)
73 #define NFC_SPARE_ONLY (1 << 2)
74 #define NFC_ECC_ENABLE (1 << 3)
75 #define NFC_INT_MASK (1 << 4)
76 #define NFC_BIG_ENDIAN (1 << 5)
77 #define NFC_RESET (1 << 6)
78 #define NFC_CE (1 << 7)
79 #define NFC_ONE_CYCLE (1 << 8)
80 #define NFC_PPB_32 (0 << 9)
81 #define NFC_PPB_64 (1 << 9)
82 #define NFC_PPB_128 (2 << 9)
83 #define NFC_PPB_256 (3 << 9)
84 #define NFC_PPB_MASK (3 << 9)
85 #define NFC_FULL_PAGE_INT (1 << 11)
87 /* Bit Definitions: NFC_CONFIG2 */
88 #define NFC_COMMAND (1 << 0)
89 #define NFC_ADDRESS (1 << 1)
90 #define NFC_INPUT (1 << 2)
91 #define NFC_OUTPUT (1 << 3)
92 #define NFC_ID (1 << 4)
93 #define NFC_STATUS (1 << 5)
94 #define NFC_CMD_FAIL (1 << 15)
95 #define NFC_INT (1 << 15)
97 /* Bit Definitions: NFC_WRPROT */
98 #define NFC_WPC_LOCK_TIGHT (1 << 0)
99 #define NFC_WPC_LOCK (1 << 1)
100 #define NFC_WPC_UNLOCK (1 << 2)
102 struct mpc5121_nfc_prv {
103 struct nand_chip chip;
112 int mpc5121_nfc_chip = 0;
114 static void mpc5121_nfc_done(struct mtd_info *mtd);
116 /* Read NFC register */
117 static inline u16 nfc_read(struct mtd_info *mtd, uint reg)
119 struct nand_chip *chip = mtd_to_nand(mtd);
120 struct mpc5121_nfc_prv *prv = nand_get_controller_data(chip);
122 return in_be16(prv->regs + reg);
125 /* Write NFC register */
126 static inline void nfc_write(struct mtd_info *mtd, uint reg, u16 val)
128 struct nand_chip *chip = mtd_to_nand(mtd);
129 struct mpc5121_nfc_prv *prv = nand_get_controller_data(chip);
131 out_be16(prv->regs + reg, val);
134 /* Set bits in NFC register */
135 static inline void nfc_set(struct mtd_info *mtd, uint reg, u16 bits)
137 nfc_write(mtd, reg, nfc_read(mtd, reg) | bits);
140 /* Clear bits in NFC register */
141 static inline void nfc_clear(struct mtd_info *mtd, uint reg, u16 bits)
143 nfc_write(mtd, reg, nfc_read(mtd, reg) & ~bits);
146 /* Invoke address cycle */
147 static inline void mpc5121_nfc_send_addr(struct mtd_info *mtd, u16 addr)
149 nfc_write(mtd, NFC_FLASH_ADDR, addr);
150 nfc_write(mtd, NFC_CONFIG2, NFC_ADDRESS);
151 mpc5121_nfc_done(mtd);
154 /* Invoke command cycle */
155 static inline void mpc5121_nfc_send_cmd(struct mtd_info *mtd, u16 cmd)
157 nfc_write(mtd, NFC_FLASH_CMD, cmd);
158 nfc_write(mtd, NFC_CONFIG2, NFC_COMMAND);
159 mpc5121_nfc_done(mtd);
162 /* Send data from NFC buffers to NAND flash */
163 static inline void mpc5121_nfc_send_prog_page(struct mtd_info *mtd)
165 nfc_clear(mtd, NFC_BUF_ADDR, NFC_RBA_MASK);
166 nfc_write(mtd, NFC_CONFIG2, NFC_INPUT);
167 mpc5121_nfc_done(mtd);
170 /* Receive data from NAND flash */
171 static inline void mpc5121_nfc_send_read_page(struct mtd_info *mtd)
173 nfc_clear(mtd, NFC_BUF_ADDR, NFC_RBA_MASK);
174 nfc_write(mtd, NFC_CONFIG2, NFC_OUTPUT);
175 mpc5121_nfc_done(mtd);
178 /* Receive ID from NAND flash */
179 static inline void mpc5121_nfc_send_read_id(struct mtd_info *mtd)
181 nfc_clear(mtd, NFC_BUF_ADDR, NFC_RBA_MASK);
182 nfc_write(mtd, NFC_CONFIG2, NFC_ID);
183 mpc5121_nfc_done(mtd);
186 /* Receive status from NAND flash */
187 static inline void mpc5121_nfc_send_read_status(struct mtd_info *mtd)
189 nfc_clear(mtd, NFC_BUF_ADDR, NFC_RBA_MASK);
190 nfc_write(mtd, NFC_CONFIG2, NFC_STATUS);
191 mpc5121_nfc_done(mtd);
194 static void mpc5121_nfc_done(struct mtd_info *mtd)
196 int max_retries = NFC_TIMEOUT;
200 if (nfc_read(mtd, NFC_CONFIG2) & NFC_INT)
205 if (max_retries <= 0)
206 printk(KERN_WARNING DRV_NAME
207 ": Timeout while waiting for completion.\n");
210 /* Do address cycle(s) */
211 static void mpc5121_nfc_addr_cycle(struct mtd_info *mtd, int column, int page)
213 struct nand_chip *chip = mtd_to_nand(mtd);
214 u32 pagemask = chip->pagemask;
217 mpc5121_nfc_send_addr(mtd, column);
218 if (mtd->writesize > 512)
219 mpc5121_nfc_send_addr(mtd, column >> 8);
224 mpc5121_nfc_send_addr(mtd, page & 0xFF);
231 /* Control chip select signals */
234 * Selecting the active device:
236 * This is different than the linux version. Switching between chips
237 * is done via board_nand_select_device(). The Linux select_chip
238 * function used here in U-Boot has only 2 valid chip numbers:
244 * Implement it as a weak default, so that boards with a specific
245 * chip-select routine can use their own function.
247 void __mpc5121_nfc_select_chip(struct mtd_info *mtd, int chip)
250 nfc_clear(mtd, NFC_CONFIG1, NFC_CE);
254 nfc_clear(mtd, NFC_BUF_ADDR, NFC_ACTIVE_CS_MASK);
255 nfc_set(mtd, NFC_BUF_ADDR, (chip << NFC_ACTIVE_CS_SHIFT) &
257 nfc_set(mtd, NFC_CONFIG1, NFC_CE);
259 void mpc5121_nfc_select_chip(struct mtd_info *mtd, int chip)
260 __attribute__((weak, alias("__mpc5121_nfc_select_chip")));
262 void board_nand_select_device(struct nand_chip *nand, int chip)
265 * Only save this chip number in global variable here. This
266 * will be used later in mpc5121_nfc_select_chip().
268 mpc5121_nfc_chip = chip;
271 /* Read NAND Ready/Busy signal */
272 static int mpc5121_nfc_dev_ready(struct mtd_info *mtd)
275 * NFC handles ready/busy signal internally. Therefore, this function
276 * always returns status as ready.
281 /* Write command to NAND flash */
282 static void mpc5121_nfc_command(struct mtd_info *mtd, unsigned command,
283 int column, int page)
285 struct nand_chip *chip = mtd_to_nand(mtd);
286 struct mpc5121_nfc_prv *prv = nand_get_controller_data(chip);
288 prv->column = (column >= 0) ? column : 0;
292 case NAND_CMD_PAGEPROG:
293 mpc5121_nfc_send_prog_page(mtd);
296 * NFC does not support sub-page reads and writes,
297 * so emulate them using full page transfers.
305 command = NAND_CMD_READ0;
309 case NAND_CMD_READOOB:
311 command = NAND_CMD_READ0;
316 mpc5121_nfc_command(mtd, NAND_CMD_READ0, column, page);
320 case NAND_CMD_ERASE1:
321 case NAND_CMD_ERASE2:
322 case NAND_CMD_READID:
323 case NAND_CMD_STATUS:
331 mpc5121_nfc_send_cmd(mtd, command);
332 mpc5121_nfc_addr_cycle(mtd, column, page);
336 if (mtd->writesize > 512)
337 mpc5121_nfc_send_cmd(mtd, NAND_CMD_READSTART);
338 mpc5121_nfc_send_read_page(mtd);
341 case NAND_CMD_READID:
342 mpc5121_nfc_send_read_id(mtd);
345 case NAND_CMD_STATUS:
346 mpc5121_nfc_send_read_status(mtd);
347 if (chip->options & NAND_BUSWIDTH_16)
355 /* Copy data from/to NFC spare buffers. */
356 static void mpc5121_nfc_copy_spare(struct mtd_info *mtd, uint offset,
357 u8 * buffer, uint size, int wr)
359 struct nand_chip *nand = mtd_to_nand(mtd);
360 struct mpc5121_nfc_prv *prv = nand_get_controller_data(nand);
361 uint o, s, sbsize, blksize;
364 * NAND spare area is available through NFC spare buffers.
365 * The NFC divides spare area into (page_size / 512) chunks.
366 * Each chunk is placed into separate spare memory area, using
367 * first (spare_size / num_of_chunks) bytes of the buffer.
369 * For NAND device in which the spare area is not divided fully
370 * by the number of chunks, number of used bytes in each spare
371 * buffer is rounded down to the nearest even number of bytes,
372 * and all remaining bytes are added to the last used spare area.
374 * For more information read section 26.6.10 of MPC5121e
375 * Microcontroller Reference Manual, Rev. 3.
378 /* Calculate number of valid bytes in each spare buffer */
379 sbsize = (mtd->oobsize / (mtd->writesize / 512)) & ~1;
382 /* Calculate spare buffer number */
384 if (s > NFC_SPARE_BUFFERS - 1)
385 s = NFC_SPARE_BUFFERS - 1;
388 * Calculate offset to requested data block in selected spare
389 * buffer and its size.
391 o = offset - (s * sbsize);
392 blksize = min(sbsize - o, size);
395 memcpy_toio(prv->regs + NFC_SPARE_AREA(s) + o,
398 memcpy_fromio(buffer,
399 prv->regs + NFC_SPARE_AREA(s) + o,
408 /* Copy data from/to NFC main and spare buffers */
409 static void mpc5121_nfc_buf_copy(struct mtd_info *mtd, u_char * buf, int len,
412 struct nand_chip *chip = mtd_to_nand(mtd);
413 struct mpc5121_nfc_prv *prv = nand_get_controller_data(chip);
414 uint c = prv->column;
417 /* Handle spare area access */
418 if (prv->spareonly || c >= mtd->writesize) {
419 /* Calculate offset from beginning of spare area */
420 if (c >= mtd->writesize)
424 mpc5121_nfc_copy_spare(mtd, c, buf, len, wr);
429 * Handle main area access - limit copy length to prevent
430 * crossing main/spare boundary.
432 l = min((uint) len, mtd->writesize - c);
436 memcpy_toio(prv->regs + NFC_MAIN_AREA(0) + c, buf, l);
438 memcpy_fromio(buf, prv->regs + NFC_MAIN_AREA(0) + c, l);
440 /* Handle crossing main/spare boundary */
444 mpc5121_nfc_buf_copy(mtd, buf, len, wr);
448 /* Read data from NFC buffers */
449 static void mpc5121_nfc_read_buf(struct mtd_info *mtd, u_char * buf, int len)
451 mpc5121_nfc_buf_copy(mtd, buf, len, 0);
454 /* Write data to NFC buffers */
455 static void mpc5121_nfc_write_buf(struct mtd_info *mtd,
456 const u_char * buf, int len)
458 mpc5121_nfc_buf_copy(mtd, (u_char *) buf, len, 1);
461 /* Read byte from NFC buffers */
462 static u8 mpc5121_nfc_read_byte(struct mtd_info *mtd)
466 mpc5121_nfc_read_buf(mtd, &tmp, sizeof(tmp));
471 /* Read word from NFC buffers */
472 static u16 mpc5121_nfc_read_word(struct mtd_info *mtd)
476 mpc5121_nfc_read_buf(mtd, (u_char *) & tmp, sizeof(tmp));
482 * Read NFC configuration from Reset Config Word
484 * NFC is configured during reset in basis of information stored
485 * in Reset Config Word. There is no other way to set NAND block
486 * size, spare size and bus width.
488 static int mpc5121_nfc_read_hw_config(struct mtd_info *mtd)
490 immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
491 struct nand_chip *chip = mtd_to_nand(mtd);
492 uint rcw_pagesize = 0;
493 uint rcw_sparesize = 0;
498 rcwh = in_be32(&(im->reset.rcwh));
500 /* Bit 6: NFC bus width */
501 rcw_width = ((rcwh >> 6) & 0x1) ? 2 : 1;
503 /* Bit 7: NFC Page/Spare size */
504 ps = (rcwh >> 7) & 0x1;
506 /* Bits [22:21]: ROM Location */
507 romloc = (rcwh >> 21) & 0x3;
509 /* Decode RCW bits */
510 switch ((ps << 2) | romloc) {
533 mtd->writesize = rcw_pagesize;
534 mtd->oobsize = rcw_sparesize;
536 chip->options |= NAND_BUSWIDTH_16;
538 debug(KERN_NOTICE DRV_NAME ": Configured for "
539 "%u-bit NAND, page size %u with %u spare.\n",
540 rcw_width * 8, rcw_pagesize, rcw_sparesize);
544 int board_nand_init(struct nand_chip *chip)
546 struct mpc5121_nfc_prv *prv;
547 struct mtd_info *mtd;
553 * Check SoC revision. This driver supports only NFC
554 * in MPC5121 revision 2.
556 rev = (mfspr(SPRN_SVR) >> 4) & 0xF;
558 printk(KERN_ERR DRV_NAME
559 ": SoC revision %u is not supported!\n", rev);
563 prv = malloc(sizeof(*prv));
565 printk(KERN_ERR DRV_NAME ": Memory exhausted!\n");
570 nand_set_controller_data(chip, prv);
572 /* Read NFC configuration from Reset Config Word */
573 retval = mpc5121_nfc_read_hw_config(mtd);
575 printk(KERN_ERR DRV_NAME ": Unable to read NFC config!\n");
579 prv->regs = (void __iomem *)CONFIG_SYS_NAND_BASE;
580 chip->dev_ready = mpc5121_nfc_dev_ready;
581 chip->cmdfunc = mpc5121_nfc_command;
582 chip->read_byte = mpc5121_nfc_read_byte;
583 chip->read_word = mpc5121_nfc_read_word;
584 chip->read_buf = mpc5121_nfc_read_buf;
585 chip->write_buf = mpc5121_nfc_write_buf;
586 chip->select_chip = mpc5121_nfc_select_chip;
587 chip->bbt_options = NAND_BBT_USE_FLASH;
588 chip->ecc.mode = NAND_ECC_SOFT;
590 /* Reset NAND Flash controller */
591 nfc_set(mtd, NFC_CONFIG1, NFC_RESET);
592 while (nfc_read(mtd, NFC_CONFIG1) & NFC_RESET) {
593 if (resettime++ >= NFC_RESET_TIMEOUT) {
594 printk(KERN_ERR DRV_NAME
595 ": Timeout while resetting NFC!\n");
603 /* Enable write to NFC memory */
604 nfc_write(mtd, NFC_CONFIG, NFC_BLS_UNLOCKED);
606 /* Enable write to all NAND pages */
607 nfc_write(mtd, NFC_UNLOCKSTART_BLK0, 0x0000);
608 nfc_write(mtd, NFC_UNLOCKEND_BLK0, 0xFFFF);
609 nfc_write(mtd, NFC_WRPROT, NFC_WPC_UNLOCK);
613 * - Big Endian transfers,
614 * - Interrupt after full page read/write.
616 nfc_write(mtd, NFC_CONFIG1, NFC_BIG_ENDIAN | NFC_INT_MASK |
619 /* Set spare area size */
620 nfc_write(mtd, NFC_SPAS, mtd->oobsize >> 1);
622 /* Detect NAND chips */
623 if (nand_scan(mtd, 1)) {
624 printk(KERN_ERR DRV_NAME ": NAND Flash not found !\n");
629 /* Set erase block size */
630 switch (mtd->erasesize / mtd->writesize) {
632 nfc_set(mtd, NFC_CONFIG1, NFC_PPB_32);
636 nfc_set(mtd, NFC_CONFIG1, NFC_PPB_64);
640 nfc_set(mtd, NFC_CONFIG1, NFC_PPB_128);
644 nfc_set(mtd, NFC_CONFIG1, NFC_PPB_256);
648 printk(KERN_ERR DRV_NAME ": Unsupported NAND flash!\n");