2 * (C) Copyright 2006-2008
3 * Stefan Roese, DENX Software Engineering, sr@denx.de.
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 #include <linux/mtd/nand_ecc.h>
26 static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS;
27 static nand_info_t mtd;
28 static struct nand_chip nand_chip;
30 #define ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \
31 CONFIG_SYS_NAND_ECCSIZE)
32 #define ECCTOTAL (ECCSTEPS * CONFIG_SYS_NAND_ECCBYTES)
35 #if (CONFIG_SYS_NAND_PAGE_SIZE <= 512)
37 * NAND command for small page NAND devices (512)
39 static int nand_command(int block, int page, uint32_t offs,
42 struct nand_chip *this = mtd.priv;
43 int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
45 while (!this->dev_ready(&mtd))
48 /* Begin command latch cycle */
49 this->cmd_ctrl(&mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
50 /* Set ALE and clear CLE to start address cycle */
52 this->cmd_ctrl(&mtd, offs, NAND_CTRL_ALE | NAND_CTRL_CHANGE);
53 this->cmd_ctrl(&mtd, page_addr & 0xff, NAND_CTRL_ALE); /* A[16:9] */
54 this->cmd_ctrl(&mtd, (page_addr >> 8) & 0xff,
55 NAND_CTRL_ALE); /* A[24:17] */
56 #ifdef CONFIG_SYS_NAND_4_ADDR_CYCLE
57 /* One more address cycle for devices > 32MiB */
58 this->cmd_ctrl(&mtd, (page_addr >> 16) & 0x0f,
59 NAND_CTRL_ALE); /* A[28:25] */
61 /* Latch in address */
62 this->cmd_ctrl(&mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
65 * Wait a while for the data to be ready
67 while (!this->dev_ready(&mtd))
74 * NAND command for large page NAND devices (2k)
76 static int nand_command(int block, int page, uint32_t offs,
79 struct nand_chip *this = mtd.priv;
80 int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
81 void (*hwctrl)(struct mtd_info *mtd, int cmd,
82 unsigned int ctrl) = this->cmd_ctrl;
84 while (!this->dev_ready(&mtd))
87 /* Emulate NAND_CMD_READOOB */
88 if (cmd == NAND_CMD_READOOB) {
89 offs += CONFIG_SYS_NAND_PAGE_SIZE;
93 /* Shift the offset from byte addressing to word addressing. */
94 if (this->options & NAND_BUSWIDTH_16)
97 /* Begin command latch cycle */
98 hwctrl(&mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
99 /* Set ALE and clear CLE to start address cycle */
101 hwctrl(&mtd, offs & 0xff,
102 NAND_CTRL_ALE | NAND_CTRL_CHANGE); /* A[7:0] */
103 hwctrl(&mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */
105 hwctrl(&mtd, (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */
106 hwctrl(&mtd, ((page_addr >> 8) & 0xff),
107 NAND_CTRL_ALE); /* A[27:20] */
108 #ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE
109 /* One more address cycle for devices > 128MiB */
110 hwctrl(&mtd, (page_addr >> 16) & 0x0f,
111 NAND_CTRL_ALE); /* A[31:28] */
113 /* Latch in address */
114 hwctrl(&mtd, NAND_CMD_READSTART,
115 NAND_CTRL_CLE | NAND_CTRL_CHANGE);
116 hwctrl(&mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
119 * Wait a while for the data to be ready
121 while (!this->dev_ready(&mtd))
128 static int nand_is_bad_block(int block)
130 struct nand_chip *this = mtd.priv;
132 nand_command(block, 0, CONFIG_SYS_NAND_BAD_BLOCK_POS,
136 * Read one byte (or two if it's a 16 bit chip).
138 if (this->options & NAND_BUSWIDTH_16) {
139 if (readw(this->IO_ADDR_R) != 0xffff)
142 if (readb(this->IO_ADDR_R) != 0xff)
149 #if defined(CONFIG_SYS_NAND_HW_ECC_OOBFIRST)
150 static int nand_read_page(int block, int page, uchar *dst)
152 struct nand_chip *this = mtd.priv;
153 u_char ecc_calc[ECCTOTAL];
154 u_char ecc_code[ECCTOTAL];
155 u_char oob_data[CONFIG_SYS_NAND_OOBSIZE];
157 int eccsize = CONFIG_SYS_NAND_ECCSIZE;
158 int eccbytes = CONFIG_SYS_NAND_ECCBYTES;
159 int eccsteps = ECCSTEPS;
162 nand_command(block, page, 0, NAND_CMD_READOOB);
163 this->read_buf(&mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE);
164 nand_command(block, page, 0, NAND_CMD_READ0);
166 /* Pick the ECC bytes out of the oob data */
167 for (i = 0; i < ECCTOTAL; i++)
168 ecc_code[i] = oob_data[nand_ecc_pos[i]];
171 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
172 this->ecc.hwctl(&mtd, NAND_ECC_READ);
173 this->read_buf(&mtd, p, eccsize);
174 this->ecc.calculate(&mtd, p, &ecc_calc[i]);
175 this->ecc.correct(&mtd, p, &ecc_code[i], &ecc_calc[i]);
181 static int nand_read_page(int block, int page, void *dst)
183 struct nand_chip *this = mtd.priv;
184 u_char ecc_calc[ECCTOTAL];
185 u_char ecc_code[ECCTOTAL];
186 u_char oob_data[CONFIG_SYS_NAND_OOBSIZE];
188 int eccsize = CONFIG_SYS_NAND_ECCSIZE;
189 int eccbytes = CONFIG_SYS_NAND_ECCBYTES;
190 int eccsteps = ECCSTEPS;
193 nand_command(block, page, 0, NAND_CMD_READ0);
195 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
196 if (this->ecc.mode != NAND_ECC_SOFT)
197 this->ecc.hwctl(&mtd, NAND_ECC_READ);
198 this->read_buf(&mtd, p, eccsize);
199 this->ecc.calculate(&mtd, p, &ecc_calc[i]);
201 this->read_buf(&mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE);
203 /* Pick the ECC bytes out of the oob data */
204 for (i = 0; i < ECCTOTAL; i++)
205 ecc_code[i] = oob_data[nand_ecc_pos[i]];
210 for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
211 /* No chance to do something with the possible error message
212 * from correct_data(). We just hope that all possible errors
213 * are corrected by this routine.
215 this->ecc.correct(&mtd, p, &ecc_code[i], &ecc_calc[i]);
222 int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)
224 unsigned int block, lastblock;
228 * offs has to be aligned to a page address!
230 block = offs / CONFIG_SYS_NAND_BLOCK_SIZE;
231 lastblock = (offs + size - 1) / CONFIG_SYS_NAND_BLOCK_SIZE;
232 page = (offs % CONFIG_SYS_NAND_BLOCK_SIZE) / CONFIG_SYS_NAND_PAGE_SIZE;
234 while (block <= lastblock) {
235 if (!nand_is_bad_block(block)) {
239 while (page < CONFIG_SYS_NAND_PAGE_COUNT) {
240 nand_read_page(block, page, dst);
241 dst += CONFIG_SYS_NAND_PAGE_SIZE;
256 /* nand_init() - initialize data to make nand usable by SPL */
260 * Init board specific nand support
262 mtd.priv = &nand_chip;
263 nand_chip.IO_ADDR_R = nand_chip.IO_ADDR_W =
264 (void __iomem *)CONFIG_SYS_NAND_BASE;
265 board_nand_init(&nand_chip);
267 #ifdef CONFIG_SPL_NAND_SOFTECC
268 if (nand_chip.ecc.mode == NAND_ECC_SOFT) {
269 nand_chip.ecc.calculate = nand_calculate_ecc;
270 nand_chip.ecc.correct = nand_correct_data;
274 if (nand_chip.select_chip)
275 nand_chip.select_chip(&mtd, 0);
278 /* Unselect after operation */
279 void nand_deselect(void)
281 if (nand_chip.select_chip)
282 nand_chip.select_chip(&mtd, -1);