2 * (C) Copyright 2006-2008
3 * Stefan Roese, DENX Software Engineering, sr@denx.de.
5 * SPDX-License-Identifier: GPL-2.0+
11 #include <linux/mtd/nand_ecc.h>
13 static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS;
14 static struct mtd_info *mtd;
15 static struct nand_chip nand_chip;
17 #define ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \
18 CONFIG_SYS_NAND_ECCSIZE)
19 #define ECCTOTAL (ECCSTEPS * CONFIG_SYS_NAND_ECCBYTES)
22 #if (CONFIG_SYS_NAND_PAGE_SIZE <= 512)
24 * NAND command for small page NAND devices (512)
26 static int nand_command(int block, int page, uint32_t offs,
29 struct nand_chip *this = mtd_to_nand(mtd);
30 int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
32 while (!this->dev_ready(mtd))
35 /* Begin command latch cycle */
36 this->cmd_ctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
37 /* Set ALE and clear CLE to start address cycle */
39 this->cmd_ctrl(mtd, offs, NAND_CTRL_ALE | NAND_CTRL_CHANGE);
40 this->cmd_ctrl(mtd, page_addr & 0xff, NAND_CTRL_ALE); /* A[16:9] */
41 this->cmd_ctrl(mtd, (page_addr >> 8) & 0xff,
42 NAND_CTRL_ALE); /* A[24:17] */
43 #ifdef CONFIG_SYS_NAND_4_ADDR_CYCLE
44 /* One more address cycle for devices > 32MiB */
45 this->cmd_ctrl(mtd, (page_addr >> 16) & 0x0f,
46 NAND_CTRL_ALE); /* A[28:25] */
48 /* Latch in address */
49 this->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
52 * Wait a while for the data to be ready
54 while (!this->dev_ready(mtd))
61 * NAND command for large page NAND devices (2k)
63 static int nand_command(int block, int page, uint32_t offs,
66 struct nand_chip *this = mtd_to_nand(mtd);
67 int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
68 void (*hwctrl)(struct mtd_info *mtd, int cmd,
69 unsigned int ctrl) = this->cmd_ctrl;
71 while (!this->dev_ready(mtd))
74 /* Emulate NAND_CMD_READOOB */
75 if (cmd == NAND_CMD_READOOB) {
76 offs += CONFIG_SYS_NAND_PAGE_SIZE;
80 /* Shift the offset from byte addressing to word addressing. */
81 if ((this->options & NAND_BUSWIDTH_16) && !nand_opcode_8bits(cmd))
84 /* Begin command latch cycle */
85 hwctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
86 /* Set ALE and clear CLE to start address cycle */
88 hwctrl(mtd, offs & 0xff,
89 NAND_CTRL_ALE | NAND_CTRL_CHANGE); /* A[7:0] */
90 hwctrl(mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */
92 hwctrl(mtd, (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */
93 hwctrl(mtd, ((page_addr >> 8) & 0xff),
94 NAND_CTRL_ALE); /* A[27:20] */
95 #ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE
96 /* One more address cycle for devices > 128MiB */
97 hwctrl(mtd, (page_addr >> 16) & 0x0f,
98 NAND_CTRL_ALE); /* A[31:28] */
100 /* Latch in address */
101 hwctrl(mtd, NAND_CMD_READSTART,
102 NAND_CTRL_CLE | NAND_CTRL_CHANGE);
103 hwctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
106 * Wait a while for the data to be ready
108 while (!this->dev_ready(mtd))
115 static int nand_is_bad_block(int block)
117 struct nand_chip *this = mtd_to_nand(mtd);
120 nand_command(block, 0, CONFIG_SYS_NAND_BAD_BLOCK_POS,
124 * Read one byte (or two if it's a 16 bit chip).
126 if (this->options & NAND_BUSWIDTH_16) {
127 this->read_buf(mtd, bb_data, 2);
128 if (bb_data[0] != 0xff || bb_data[1] != 0xff)
131 this->read_buf(mtd, bb_data, 1);
132 if (bb_data[0] != 0xff)
139 #if defined(CONFIG_SYS_NAND_HW_ECC_OOBFIRST)
140 static int nand_read_page(int block, int page, uchar *dst)
142 struct nand_chip *this = mtd_to_nand(mtd);
143 u_char ecc_calc[ECCTOTAL];
144 u_char ecc_code[ECCTOTAL];
145 u_char oob_data[CONFIG_SYS_NAND_OOBSIZE];
147 int eccsize = CONFIG_SYS_NAND_ECCSIZE;
148 int eccbytes = CONFIG_SYS_NAND_ECCBYTES;
149 int eccsteps = ECCSTEPS;
152 nand_command(block, page, 0, NAND_CMD_READOOB);
153 this->read_buf(mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE);
154 nand_command(block, page, 0, NAND_CMD_READ0);
156 /* Pick the ECC bytes out of the oob data */
157 for (i = 0; i < ECCTOTAL; i++)
158 ecc_code[i] = oob_data[nand_ecc_pos[i]];
161 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
162 this->ecc.hwctl(mtd, NAND_ECC_READ);
163 this->read_buf(mtd, p, eccsize);
164 this->ecc.calculate(mtd, p, &ecc_calc[i]);
165 this->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
171 static int nand_read_page(int block, int page, void *dst)
173 struct nand_chip *this = mtd_to_nand(mtd);
174 u_char ecc_calc[ECCTOTAL];
175 u_char ecc_code[ECCTOTAL];
176 u_char oob_data[CONFIG_SYS_NAND_OOBSIZE];
178 int eccsize = CONFIG_SYS_NAND_ECCSIZE;
179 int eccbytes = CONFIG_SYS_NAND_ECCBYTES;
180 int eccsteps = ECCSTEPS;
183 nand_command(block, page, 0, NAND_CMD_READ0);
185 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
186 if (this->ecc.mode != NAND_ECC_SOFT)
187 this->ecc.hwctl(mtd, NAND_ECC_READ);
188 this->read_buf(mtd, p, eccsize);
189 this->ecc.calculate(mtd, p, &ecc_calc[i]);
191 this->read_buf(mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE);
193 /* Pick the ECC bytes out of the oob data */
194 for (i = 0; i < ECCTOTAL; i++)
195 ecc_code[i] = oob_data[nand_ecc_pos[i]];
200 for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
201 /* No chance to do something with the possible error message
202 * from correct_data(). We just hope that all possible errors
203 * are corrected by this routine.
205 this->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
212 #ifdef CONFIG_SPL_UBI
214 * Temporary storage for non NAND page aligned and non NAND page sized
215 * reads. Note: This does not support runtime detected FLASH yet, but
216 * that should be reasonably easy to fix by making the buffer large
219 static u8 scratch_buf[CONFIG_SYS_NAND_PAGE_SIZE];
222 * nand_spl_read_block - Read data from physical eraseblock into a buffer
223 * @block: Number of the physical eraseblock
224 * @offset: Data offset from the start of @peb
225 * @len: Data size to read
226 * @dst: Address of the destination buffer
228 * This could be further optimized if we'd have a subpage read
229 * function in the simple code. On NAND which allows subpage reads
230 * this would spare quite some time to readout e.g. the VID header of
234 * @offset + @len are not allowed to be larger than a physical
235 * erase block. No sanity check done for simplicity reasons.
237 * To support runtime detected flash this needs to be extended by
238 * information about the actual flash geometry, but thats beyond the
239 * scope of this effort and for most applications where fast boot is
240 * required it is not an issue anyway.
242 int nand_spl_read_block(int block, int offset, int len, void *dst)
246 /* Calculate the page number */
247 page = offset / CONFIG_SYS_NAND_PAGE_SIZE;
249 /* Offset to the start of a flash page */
250 offset = offset % CONFIG_SYS_NAND_PAGE_SIZE;
254 * Non page aligned reads go to the scratch buffer.
255 * Page aligned reads go directly to the destination.
257 if (offset || len < CONFIG_SYS_NAND_PAGE_SIZE) {
258 nand_read_page(block, page, scratch_buf);
259 read = min(len, CONFIG_SYS_NAND_PAGE_SIZE - offset);
260 memcpy(dst, scratch_buf + offset, read);
263 nand_read_page(block, page, dst);
264 read = CONFIG_SYS_NAND_PAGE_SIZE;
274 int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)
276 unsigned int block, lastblock;
280 * offs has to be aligned to a page address!
282 block = offs / CONFIG_SYS_NAND_BLOCK_SIZE;
283 lastblock = (offs + size - 1) / CONFIG_SYS_NAND_BLOCK_SIZE;
284 page = (offs % CONFIG_SYS_NAND_BLOCK_SIZE) / CONFIG_SYS_NAND_PAGE_SIZE;
286 while (block <= lastblock) {
287 if (!nand_is_bad_block(block)) {
291 while (page < CONFIG_SYS_NAND_PAGE_COUNT) {
292 nand_read_page(block, page, dst);
293 dst += CONFIG_SYS_NAND_PAGE_SIZE;
308 /* nand_init() - initialize data to make nand usable by SPL */
312 * Init board specific nand support
314 mtd = nand_to_mtd(&nand_chip);
315 nand_chip.IO_ADDR_R = nand_chip.IO_ADDR_W =
316 (void __iomem *)CONFIG_SYS_NAND_BASE;
317 board_nand_init(&nand_chip);
319 #ifdef CONFIG_SPL_NAND_SOFTECC
320 if (nand_chip.ecc.mode == NAND_ECC_SOFT) {
321 nand_chip.ecc.calculate = nand_calculate_ecc;
322 nand_chip.ecc.correct = nand_correct_data;
326 if (nand_chip.select_chip)
327 nand_chip.select_chip(mtd, 0);
330 /* Unselect after operation */
331 void nand_deselect(void)
333 if (nand_chip.select_chip)
334 nand_chip.select_chip(mtd, -1);