2 * (C) Copyright 2006 OpenMoko, Inc.
3 * Author: Harald Welte <laforge@openmoko.org>
5 * SPDX-License-Identifier: GPL-2.0+
11 #include <asm/arch/s3c24x0_cpu.h>
14 #define S3C2410_NFCONF_EN (1<<15)
15 #define S3C2410_NFCONF_512BYTE (1<<14)
16 #define S3C2410_NFCONF_4STEP (1<<13)
17 #define S3C2410_NFCONF_INITECC (1<<12)
18 #define S3C2410_NFCONF_nFCE (1<<11)
19 #define S3C2410_NFCONF_TACLS(x) ((x)<<8)
20 #define S3C2410_NFCONF_TWRPH0(x) ((x)<<4)
21 #define S3C2410_NFCONF_TWRPH1(x) ((x)<<0)
23 #define S3C2410_ADDR_NALE 4
24 #define S3C2410_ADDR_NCLE 8
26 #ifdef CONFIG_NAND_SPL
28 /* in the early stage of NAND flash booting, printf() is not available */
29 #define printf(fmt, args...)
31 static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
34 struct nand_chip *this = mtd->priv;
36 for (i = 0; i < len; i++)
37 buf[i] = readb(this->IO_ADDR_R);
41 static void s3c2410_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
43 struct nand_chip *chip = mtd->priv;
44 struct s3c2410_nand *nand = s3c2410_get_base_nand();
46 debug("hwcontrol(): 0x%02x 0x%02x\n", cmd, ctrl);
48 if (ctrl & NAND_CTRL_CHANGE) {
49 ulong IO_ADDR_W = (ulong)nand;
51 if (!(ctrl & NAND_CLE))
52 IO_ADDR_W |= S3C2410_ADDR_NCLE;
53 if (!(ctrl & NAND_ALE))
54 IO_ADDR_W |= S3C2410_ADDR_NALE;
56 chip->IO_ADDR_W = (void *)IO_ADDR_W;
59 writel(readl(&nand->nfconf) & ~S3C2410_NFCONF_nFCE,
62 writel(readl(&nand->nfconf) | S3C2410_NFCONF_nFCE,
66 if (cmd != NAND_CMD_NONE)
67 writeb(cmd, chip->IO_ADDR_W);
70 static int s3c2410_dev_ready(struct mtd_info *mtd)
72 struct s3c2410_nand *nand = s3c2410_get_base_nand();
74 return readl(&nand->nfstat) & 0x01;
77 #ifdef CONFIG_S3C2410_NAND_HWECC
78 void s3c2410_nand_enable_hwecc(struct mtd_info *mtd, int mode)
80 struct s3c2410_nand *nand = s3c2410_get_base_nand();
81 debug("s3c2410_nand_enable_hwecc(%p, %d)\n", mtd, mode);
82 writel(readl(&nand->nfconf) | S3C2410_NFCONF_INITECC, &nand->nfconf);
85 static int s3c2410_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
88 struct s3c2410_nand *nand = s3c2410_get_base_nand();
89 ecc_code[0] = readb(&nand->nfecc);
90 ecc_code[1] = readb(&nand->nfecc + 1);
91 ecc_code[2] = readb(&nand->nfecc + 2);
92 debug("s3c2410_nand_calculate_hwecc(%p,): 0x%02x 0x%02x 0x%02x\n",
93 mtd , ecc_code[0], ecc_code[1], ecc_code[2]);
98 static int s3c2410_nand_correct_data(struct mtd_info *mtd, u_char *dat,
99 u_char *read_ecc, u_char *calc_ecc)
101 if (read_ecc[0] == calc_ecc[0] &&
102 read_ecc[1] == calc_ecc[1] &&
103 read_ecc[2] == calc_ecc[2])
106 printf("s3c2410_nand_correct_data: not implemented\n");
111 int board_nand_init(struct nand_chip *nand)
114 u_int8_t tacls, twrph0, twrph1;
115 struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
116 struct s3c2410_nand *nand_reg = s3c2410_get_base_nand();
118 debug("board_nand_init()\n");
120 writel(readl(&clk_power->clkcon) | (1 << 4), &clk_power->clkcon);
122 /* initialize hardware */
123 #if defined(CONFIG_S3C24XX_CUSTOM_NAND_TIMING)
124 tacls = CONFIG_S3C24XX_TACLS;
125 twrph0 = CONFIG_S3C24XX_TWRPH0;
126 twrph1 = CONFIG_S3C24XX_TWRPH1;
133 cfg = S3C2410_NFCONF_EN;
134 cfg |= S3C2410_NFCONF_TACLS(tacls - 1);
135 cfg |= S3C2410_NFCONF_TWRPH0(twrph0 - 1);
136 cfg |= S3C2410_NFCONF_TWRPH1(twrph1 - 1);
137 writel(cfg, &nand_reg->nfconf);
139 /* initialize nand_chip data structure */
140 nand->IO_ADDR_R = (void *)&nand_reg->nfdata;
141 nand->IO_ADDR_W = (void *)&nand_reg->nfdata;
143 nand->select_chip = NULL;
145 /* read_buf and write_buf are default */
146 /* read_byte and write_byte are default */
147 #ifdef CONFIG_NAND_SPL
148 nand->read_buf = nand_read_buf;
151 /* hwcontrol always must be implemented */
152 nand->cmd_ctrl = s3c2410_hwcontrol;
154 nand->dev_ready = s3c2410_dev_ready;
156 #ifdef CONFIG_S3C2410_NAND_HWECC
157 nand->ecc.hwctl = s3c2410_nand_enable_hwecc;
158 nand->ecc.calculate = s3c2410_nand_calculate_ecc;
159 nand->ecc.correct = s3c2410_nand_correct_data;
160 nand->ecc.mode = NAND_ECC_HW;
161 nand->ecc.size = CONFIG_SYS_NAND_ECCSIZE;
162 nand->ecc.bytes = CONFIG_SYS_NAND_ECCBYTES;
163 nand->ecc.strength = 1;
165 nand->ecc.mode = NAND_ECC_SOFT;
168 #ifdef CONFIG_S3C2410_NAND_BBT
169 nand->bbt_options |= NAND_BBT_USE_FLASH;
172 debug("end of nand_init\n");