git.sur5r.net Git - u-boot/blob - drivers/mtd/nand/vf610_nfc.c

   1 /*
   2  * Copyright 2009-2014 Freescale Semiconductor, Inc. and others
   3  *
   4  * Description: MPC5125, VF610, MCF54418 and Kinetis K70 Nand driver.
   5  * Ported to U-Boot by Stefan Agner
   6  * Based on RFC driver posted on Kernel Mailing list by Bill Pringlemeir
   7  * Jason ported to M54418TWR and MVFA5.
   8  * Authors: Stefan Agner <stefan.agner@toradex.com>
   9  *          Bill Pringlemeir <bpringlemeir@nbsps.com>
  10  *          Shaohui Xie <b21989@freescale.com>
  11  *          Jason Jin <Jason.jin@freescale.com>
  12  *
  13  * Based on original driver mpc5121_nfc.c.
  14  *
  15  * This is free software; you can redistribute it and/or modify it
  16  * under the terms of the GNU General Public License as published by
  17  * the Free Software Foundation; either version 2 of the License, or
  18  * (at your option) any later version.
  19  *
  20  * Limitations:
  21  * - Untested on MPC5125 and M54418.
  22  * - DMA not used.
  23  * - 2K pages or less.
  24  * - Only 2K page w. 64+OOB and hardware ECC.
  25  */
  26
  27 #include <common.h>
  28 #include <malloc.h>
  29
  30 #include <linux/mtd/mtd.h>
  31 #include <linux/mtd/nand.h>
  32 #include <linux/mtd/partitions.h>
  33
  34 #include <nand.h>
  35 #include <errno.h>
  36 #include <asm/io.h>
  37
  38 /* Register Offsets */
  39 #define NFC_FLASH_CMD1                  0x3F00
  40 #define NFC_FLASH_CMD2                  0x3F04
  41 #define NFC_COL_ADDR                    0x3F08
  42 #define NFC_ROW_ADDR                    0x3F0c
  43 #define NFC_ROW_ADDR_INC                0x3F14
  44 #define NFC_FLASH_STATUS1               0x3F18
  45 #define NFC_FLASH_STATUS2               0x3F1c
  46 #define NFC_CACHE_SWAP                  0x3F28
  47 #define NFC_SECTOR_SIZE                 0x3F2c
  48 #define NFC_FLASH_CONFIG                0x3F30
  49 #define NFC_IRQ_STATUS                  0x3F38
  50
  51 /* Addresses for NFC MAIN RAM BUFFER areas */
  52 #define NFC_MAIN_AREA(n)                ((n) *  0x1000)
  53
  54 #define PAGE_2K                         0x0800
  55 #define OOB_64                          0x0040
  56
  57 /*
  58  * NFC_CMD2[CODE] values. See section:
  59  *  - 31.4.7 Flash Command Code Description, Vybrid manual
  60  *  - 23.8.6 Flash Command Sequencer, MPC5125 manual
  61  *
  62  * Briefly these are bitmasks of controller cycles.
  63  */
  64 #define READ_PAGE_CMD_CODE              0x7EE0
  65 #define PROGRAM_PAGE_CMD_CODE           0x7FC0
  66 #define ERASE_CMD_CODE                  0x4EC0
  67 #define READ_ID_CMD_CODE                0x4804
  68 #define RESET_CMD_CODE                  0x4040
  69 #define STATUS_READ_CMD_CODE            0x4068
  70
  71 /* NFC ECC mode define */
  72 #define ECC_BYPASS                      0
  73 #define ECC_45_BYTE                     6
  74
  75 /*** Register Mask and bit definitions */
  76
  77 /* NFC_FLASH_CMD1 Field */
  78 #define CMD_BYTE2_MASK                          0xFF000000
  79 #define CMD_BYTE2_SHIFT                         24
  80
  81 /* NFC_FLASH_CM2 Field */
  82 #define CMD_BYTE1_MASK                          0xFF000000
  83 #define CMD_BYTE1_SHIFT                         24
  84 #define CMD_CODE_MASK                           0x00FFFF00
  85 #define CMD_CODE_SHIFT                          8
  86 #define BUFNO_MASK                              0x00000006
  87 #define BUFNO_SHIFT                             1
  88 #define START_BIT                               (1<<0)
  89
  90 /* NFC_COL_ADDR Field */
  91 #define COL_ADDR_MASK                           0x0000FFFF
  92 #define COL_ADDR_SHIFT                          0
  93
  94 /* NFC_ROW_ADDR Field */
  95 #define ROW_ADDR_MASK                           0x00FFFFFF
  96 #define ROW_ADDR_SHIFT                          0
  97 #define ROW_ADDR_CHIP_SEL_RB_MASK               0xF0000000
  98 #define ROW_ADDR_CHIP_SEL_RB_SHIFT              28
  99 #define ROW_ADDR_CHIP_SEL_MASK                  0x0F000000
 100 #define ROW_ADDR_CHIP_SEL_SHIFT                 24
 101
 102 /* NFC_FLASH_STATUS2 Field */
 103 #define STATUS_BYTE1_MASK                       0x000000FF
 104
 105 /* NFC_FLASH_CONFIG Field */
 106 #define CONFIG_ECC_SRAM_ADDR_MASK               0x7FC00000
 107 #define CONFIG_ECC_SRAM_ADDR_SHIFT              22
 108 #define CONFIG_ECC_SRAM_REQ_BIT                 (1<<21)
 109 #define CONFIG_DMA_REQ_BIT                      (1<<20)
 110 #define CONFIG_ECC_MODE_MASK                    0x000E0000
 111 #define CONFIG_ECC_MODE_SHIFT                   17
 112 #define CONFIG_FAST_FLASH_BIT                   (1<<16)
 113 #define CONFIG_16BIT                            (1<<7)
 114 #define CONFIG_BOOT_MODE_BIT                    (1<<6)
 115 #define CONFIG_ADDR_AUTO_INCR_BIT               (1<<5)
 116 #define CONFIG_BUFNO_AUTO_INCR_BIT              (1<<4)
 117 #define CONFIG_PAGE_CNT_MASK                    0xF
 118 #define CONFIG_PAGE_CNT_SHIFT                   0
 119
 120 /* NFC_IRQ_STATUS Field */
 121 #define IDLE_IRQ_BIT                            (1<<29)
 122 #define IDLE_EN_BIT                             (1<<20)
 123 #define CMD_DONE_CLEAR_BIT                      (1<<18)
 124 #define IDLE_CLEAR_BIT                          (1<<17)
 125
 126 #define NFC_TIMEOUT     (1000)
 127
 128 /* ECC status placed at end of buffers. */
 129 #define ECC_SRAM_ADDR   ((PAGE_2K+256-8) >> 3)
 130 #define ECC_STATUS_MASK 0x80
 131 #define ECC_ERR_COUNT   0x3F
 132
 133 /*
 134  * ECC status is stored at NFC_CFG[ECCADD] +4 for little-endian
 135  * and +7 for big-endian SOC.
 136  */
 137 #ifdef CONFIG_VF610
 138 #define ECC_OFFSET      4
 139 #else
 140 #define ECC_OFFSET      7
 141 #endif
 142
 143 struct vf610_nfc {
 144         struct mtd_info   *mtd;
 145         struct nand_chip   chip;
 146         void __iomem      *regs;
 147         uint               column;
 148         /* Status and ID are in alternate locations. */
 149         int                alt_buf;
 150 #define ALT_BUF_ID   1
 151 #define ALT_BUF_STAT 2
 152         struct clk        *clk;
 153 };
 154
 155 #define mtd_to_nfc(_mtd) \
 156         (struct vf610_nfc *)((struct nand_chip *)_mtd->priv)->priv
 157
 158 static struct nand_ecclayout vf610_nfc_ecc45 = {
 159         .eccbytes = 45,
 160         .eccpos = {19, 20, 21, 22, 23,
 161                    24, 25, 26, 27, 28, 29, 30, 31,
 162                    32, 33, 34, 35, 36, 37, 38, 39,
 163                    40, 41, 42, 43, 44, 45, 46, 47,
 164                    48, 49, 50, 51, 52, 53, 54, 55,
 165                    56, 57, 58, 59, 60, 61, 62, 63},
 166         .oobfree = {
 167                 {.offset = 8,
 168                  .length = 11} }
 169 };
 170
 171 static inline u32 vf610_nfc_read(struct mtd_info *mtd, uint reg)
 172 {
 173         struct vf610_nfc *nfc = mtd_to_nfc(mtd);
 174
 175         return readl(nfc->regs + reg);
 176 }
 177
 178 static inline void vf610_nfc_write(struct mtd_info *mtd, uint reg, u32 val)
 179 {
 180         struct vf610_nfc *nfc = mtd_to_nfc(mtd);
 181
 182         writel(val, nfc->regs + reg);
 183 }
 184
 185 static inline void vf610_nfc_set(struct mtd_info *mtd, uint reg, u32 bits)
 186 {
 187         vf610_nfc_write(mtd, reg, vf610_nfc_read(mtd, reg) | bits);
 188 }
 189
 190 static inline void vf610_nfc_clear(struct mtd_info *mtd, uint reg, u32 bits)
 191 {
 192         vf610_nfc_write(mtd, reg, vf610_nfc_read(mtd, reg) & ~bits);
 193 }
 194
 195 static inline void vf610_nfc_set_field(struct mtd_info *mtd, u32 reg,
 196                                        u32 mask, u32 shift, u32 val)
 197 {
 198         vf610_nfc_write(mtd, reg,
 199                         (vf610_nfc_read(mtd, reg) & (~mask)) | val << shift);
 200 }
 201
 202 static inline void vf610_nfc_memcpy(void *dst, const void *src, size_t n)
 203 {
 204         /*
 205          * Use this accessor for the interal SRAM buffers. On ARM we can
 206          * treat the SRAM buffer as if its memory, hence use memcpy
 207          */
 208         memcpy(dst, src, n);
 209 }
 210
 211 /* Clear flags for upcoming command */
 212 static inline void vf610_nfc_clear_status(void __iomem *regbase)
 213 {
 214         void __iomem *reg = regbase + NFC_IRQ_STATUS;
 215         u32 tmp = __raw_readl(reg);
 216         tmp |= CMD_DONE_CLEAR_BIT | IDLE_CLEAR_BIT;
 217         __raw_writel(tmp, reg);
 218 }
 219
 220 /* Wait for complete operation */
 221 static inline void vf610_nfc_done(struct mtd_info *mtd)
 222 {
 223         struct vf610_nfc *nfc = mtd_to_nfc(mtd);
 224         uint start;
 225
 226         /*
 227          * Barrier is needed after this write. This write need
 228          * to be done before reading the next register the first
 229          * time.
 230          * vf610_nfc_set implicates such a barrier by using writel
 231          * to write to the register.
 232          */
 233         vf610_nfc_set(mtd, NFC_FLASH_CMD2, START_BIT);
 234
 235         start = get_timer(0);
 236
 237         while (!(vf610_nfc_read(mtd, NFC_IRQ_STATUS) & IDLE_IRQ_BIT)) {
 238                 if (get_timer(start) > NFC_TIMEOUT) {
 239                         printf("Timeout while waiting for !BUSY.\n");
 240                         return;
 241                 }
 242         }
 243         vf610_nfc_clear_status(nfc->regs);
 244 }
 245
 246 static u8 vf610_nfc_get_id(struct mtd_info *mtd, int col)
 247 {
 248         u32 flash_id;
 249
 250         if (col < 4) {
 251                 flash_id = vf610_nfc_read(mtd, NFC_FLASH_STATUS1);
 252                 return (flash_id >> (3-col)*8) & 0xff;
 253         } else {
 254                 flash_id = vf610_nfc_read(mtd, NFC_FLASH_STATUS2);
 255                 return flash_id >> 24;
 256         }
 257 }
 258
 259 static u8 vf610_nfc_get_status(struct mtd_info *mtd)
 260 {
 261         return vf610_nfc_read(mtd, NFC_FLASH_STATUS2) & STATUS_BYTE1_MASK;
 262 }
 263
 264 /* Single command */
 265 static void vf610_nfc_send_command(void __iomem *regbase, u32 cmd_byte1,
 266                                    u32 cmd_code)
 267 {
 268         void __iomem *reg = regbase + NFC_FLASH_CMD2;
 269         u32 tmp;
 270         vf610_nfc_clear_status(regbase);
 271
 272         tmp = __raw_readl(reg);
 273         tmp &= ~(CMD_BYTE1_MASK | CMD_CODE_MASK | BUFNO_MASK);
 274         tmp |= cmd_byte1 << CMD_BYTE1_SHIFT;
 275         tmp |= cmd_code << CMD_CODE_SHIFT;
 276         __raw_writel(tmp, reg);
 277 }
 278
 279 /* Two commands */
 280 static void vf610_nfc_send_commands(void __iomem *regbase, u32 cmd_byte1,
 281                               u32 cmd_byte2, u32 cmd_code)
 282 {
 283         void __iomem *reg = regbase + NFC_FLASH_CMD1;
 284         u32 tmp;
 285         vf610_nfc_send_command(regbase, cmd_byte1, cmd_code);
 286
 287         tmp = __raw_readl(reg);
 288         tmp &= ~CMD_BYTE2_MASK;
 289         tmp |= cmd_byte2 << CMD_BYTE2_SHIFT;
 290         __raw_writel(tmp, reg);
 291 }
 292
 293 static void vf610_nfc_addr_cycle(struct mtd_info *mtd, int column, int page)
 294 {
 295         if (column != -1) {
 296                 struct vf610_nfc *nfc = mtd_to_nfc(mtd);
 297                 if (nfc->chip.options & NAND_BUSWIDTH_16)
 298                         column = column / 2;
 299                 vf610_nfc_set_field(mtd, NFC_COL_ADDR, COL_ADDR_MASK,
 300                                     COL_ADDR_SHIFT, column);
 301         }
 302         if (page != -1)
 303                 vf610_nfc_set_field(mtd, NFC_ROW_ADDR, ROW_ADDR_MASK,
 304                                     ROW_ADDR_SHIFT, page);
 305 }
 306
 307 static inline void vf610_nfc_ecc_mode(struct mtd_info *mtd, int ecc_mode)
 308 {
 309         vf610_nfc_set_field(mtd, NFC_FLASH_CONFIG,
 310                             CONFIG_ECC_MODE_MASK,
 311                             CONFIG_ECC_MODE_SHIFT, ecc_mode);
 312 }
 313
 314 static inline void vf610_nfc_transfer_size(void __iomem *regbase, int size)
 315 {
 316         __raw_writel(size, regbase + NFC_SECTOR_SIZE);
 317 }
 318
 319 /* Send command to NAND chip */
 320 static void vf610_nfc_command(struct mtd_info *mtd, unsigned command,
 321                               int column, int page)
 322 {
 323         struct vf610_nfc *nfc = mtd_to_nfc(mtd);
 324         int page_sz = nfc->chip.options & NAND_BUSWIDTH_16 ? 1 : 0;
 325
 326         nfc->column = max(column, 0);
 327         nfc->alt_buf = 0;
 328
 329         switch (command) {
 330         case NAND_CMD_SEQIN:
 331                 /* Use valid column/page from preread... */
 332                 vf610_nfc_addr_cycle(mtd, column, page);
 333                 /*
 334                  * SEQIN => data => PAGEPROG sequence is done by the controller
 335                  * hence we do not need to issue the command here...
 336                  */
 337                 return;
 338         case NAND_CMD_PAGEPROG:
 339                 page_sz += mtd->writesize + mtd->oobsize;
 340                 vf610_nfc_transfer_size(nfc->regs, page_sz);
 341                 vf610_nfc_send_commands(nfc->regs, NAND_CMD_SEQIN,
 342                                         command, PROGRAM_PAGE_CMD_CODE);
 343                 vf610_nfc_ecc_mode(mtd, ECC_45_BYTE);
 344                 break;
 345
 346         case NAND_CMD_RESET:
 347                 vf610_nfc_transfer_size(nfc->regs, 0);
 348                 vf610_nfc_send_command(nfc->regs, command, RESET_CMD_CODE);
 349                 break;
 350
 351         case NAND_CMD_READOOB:
 352                 page_sz += mtd->oobsize;
 353                 column = mtd->writesize;
 354                 vf610_nfc_transfer_size(nfc->regs, page_sz);
 355                 vf610_nfc_send_commands(nfc->regs, NAND_CMD_READ0,
 356                                         NAND_CMD_READSTART, READ_PAGE_CMD_CODE);
 357                 vf610_nfc_addr_cycle(mtd, column, page);
 358                 vf610_nfc_ecc_mode(mtd, ECC_BYPASS);
 359                 break;
 360
 361         case NAND_CMD_READ0:
 362                 page_sz += mtd->writesize + mtd->oobsize;
 363                 column = 0;
 364                 vf610_nfc_transfer_size(nfc->regs, page_sz);
 365                 vf610_nfc_send_commands(nfc->regs, NAND_CMD_READ0,
 366                                         NAND_CMD_READSTART, READ_PAGE_CMD_CODE);
 367                 vf610_nfc_addr_cycle(mtd, column, page);
 368                 vf610_nfc_ecc_mode(mtd, ECC_45_BYTE);
 369                 break;
 370
 371         case NAND_CMD_ERASE1:
 372                 vf610_nfc_transfer_size(nfc->regs, 0);
 373                 vf610_nfc_send_commands(nfc->regs, command,
 374                                         NAND_CMD_ERASE2, ERASE_CMD_CODE);
 375                 vf610_nfc_addr_cycle(mtd, column, page);
 376                 break;
 377
 378         case NAND_CMD_READID:
 379                 nfc->alt_buf = ALT_BUF_ID;
 380                 vf610_nfc_transfer_size(nfc->regs, 0);
 381                 vf610_nfc_send_command(nfc->regs, command, READ_ID_CMD_CODE);
 382                 break;
 383
 384         case NAND_CMD_STATUS:
 385                 nfc->alt_buf = ALT_BUF_STAT;
 386                 vf610_nfc_transfer_size(nfc->regs, 0);
 387                 vf610_nfc_send_command(nfc->regs, command,
 388                                        STATUS_READ_CMD_CODE);
 389                 break;
 390         default:
 391                 return;
 392         }
 393
 394         vf610_nfc_done(mtd);
 395 }
 396
 397 /* Read data from NFC buffers */
 398 static void vf610_nfc_read_buf(struct mtd_info *mtd, u_char *buf, int len)
 399 {
 400         struct vf610_nfc *nfc = mtd_to_nfc(mtd);
 401         uint c = nfc->column;
 402
 403         switch (nfc->alt_buf) {
 404         case ALT_BUF_ID:
 405                 *buf = vf610_nfc_get_id(mtd, c);
 406                 break;
 407         case ALT_BUF_STAT:
 408                 *buf = vf610_nfc_get_status(mtd);
 409                 break;
 410         default:
 411                 vf610_nfc_memcpy(buf, nfc->regs + NFC_MAIN_AREA(0) + c, len);
 412                 break;
 413         }
 414
 415         nfc->column += len;
 416 }
 417
 418 /* Write data to NFC buffers */
 419 static void vf610_nfc_write_buf(struct mtd_info *mtd, const u_char *buf,
 420                                 int len)
 421 {
 422         struct vf610_nfc *nfc = mtd_to_nfc(mtd);
 423         uint c = nfc->column;
 424         uint l;
 425
 426         l = min((uint)len, mtd->writesize + mtd->oobsize - c);
 427         nfc->column += l;
 428         vf610_nfc_memcpy(nfc->regs + NFC_MAIN_AREA(0) + c, buf, l);
 429 }
 430
 431 /* Read byte from NFC buffers */
 432 static u8 vf610_nfc_read_byte(struct mtd_info *mtd)
 433 {
 434         u8 tmp;
 435         vf610_nfc_read_buf(mtd, &tmp, sizeof(tmp));
 436         return tmp;
 437 }
 438
 439 /* Read word from NFC buffers */
 440 static u16 vf610_nfc_read_word(struct mtd_info *mtd)
 441 {
 442         u16 tmp;
 443         vf610_nfc_read_buf(mtd, (u_char *)&tmp, sizeof(tmp));
 444         return tmp;
 445 }
 446
 447 /* If not provided, upper layers apply a fixed delay. */
 448 static int vf610_nfc_dev_ready(struct mtd_info *mtd)
 449 {
 450         /* NFC handles R/B internally; always ready.  */
 451         return 1;
 452 }
 453
 454 /*
 455  * This function supports Vybrid only (MPC5125 would have full RB and four CS)
 456  */
 457 static void vf610_nfc_select_chip(struct mtd_info *mtd, int chip)
 458 {
 459 #ifdef CONFIG_VF610
 460         u32 tmp = vf610_nfc_read(mtd, NFC_ROW_ADDR);
 461         tmp &= ~(ROW_ADDR_CHIP_SEL_RB_MASK | ROW_ADDR_CHIP_SEL_MASK);
 462         tmp |= 1 << ROW_ADDR_CHIP_SEL_RB_SHIFT;
 463
 464         if (chip == 0)
 465                 tmp |= 1 << ROW_ADDR_CHIP_SEL_SHIFT;
 466         else if (chip == 1)
 467                 tmp |= 2 << ROW_ADDR_CHIP_SEL_SHIFT;
 468
 469         vf610_nfc_write(mtd, NFC_ROW_ADDR, tmp);
 470 #endif
 471 }
 472
 473 /* Count the number of 0's in buff upto max_bits */
 474 static inline int count_written_bits(uint8_t *buff, int size, int max_bits)
 475 {
 476         uint32_t *buff32 = (uint32_t *)buff;
 477         int k, written_bits = 0;
 478
 479         for (k = 0; k < (size / 4); k++) {
 480                 written_bits += hweight32(~buff32[k]);
 481                 if (written_bits > max_bits)
 482                         break;
 483         }
 484
 485         return written_bits;
 486 }
 487
 488 static inline int vf610_nfc_correct_data(struct mtd_info *mtd, u_char *dat)
 489 {
 490         struct vf610_nfc *nfc = mtd_to_nfc(mtd);
 491         u8 ecc_status;
 492         u8 ecc_count;
 493         int flip;
 494
 495         ecc_status = __raw_readb(nfc->regs + ECC_SRAM_ADDR * 8 + ECC_OFFSET);
 496         ecc_count = ecc_status & ECC_ERR_COUNT;
 497         if (!(ecc_status & ECC_STATUS_MASK))
 498                 return ecc_count;
 499
 500         /* If 'ecc_count' zero or less then buffer is all 0xff or erased. */
 501         flip = count_written_bits(dat, nfc->chip.ecc.size, ecc_count);
 502
 503         /* ECC failed. */
 504         if (flip > ecc_count && flip > (nfc->chip.ecc.strength / 2))
 505                 return -1;
 506
 507         /* Erased page. */
 508         memset(dat, 0xff, nfc->chip.ecc.size);
 509         return 0;
 510 }
 511
 512
 513 static int vf610_nfc_read_page(struct mtd_info *mtd, struct nand_chip *chip,
 514                                 uint8_t *buf, int oob_required, int page)
 515 {
 516         int eccsize = chip->ecc.size;
 517         int stat;
 518         uint8_t *p = buf;
 519
 520
 521         vf610_nfc_read_buf(mtd, p, eccsize);
 522
 523         if (oob_required)
 524                 vf610_nfc_read_buf(mtd, chip->oob_poi, mtd->oobsize);
 525
 526         stat = vf610_nfc_correct_data(mtd, p);
 527
 528         if (stat < 0)
 529                 mtd->ecc_stats.failed++;
 530         else
 531                 mtd->ecc_stats.corrected += stat;
 532
 533         return 0;
 534 }
 535
 536 /*
 537  * ECC will be calculated automatically
 538  */
 539 static int vf610_nfc_write_page(struct mtd_info *mtd, struct nand_chip *chip,
 540                                const uint8_t *buf, int oob_required)
 541 {
 542         vf610_nfc_write_buf(mtd, buf, mtd->writesize);
 543         if (oob_required)
 544                 vf610_nfc_write_buf(mtd, chip->oob_poi, mtd->oobsize);
 545
 546         return 0;
 547 }
 548
 549 struct vf610_nfc_config {
 550         int hardware_ecc;
 551         int width;
 552         int flash_bbt;
 553 };
 554
 555 static int vf610_nfc_nand_init(int devnum, void __iomem *addr)
 556 {
 557         struct mtd_info *mtd = &nand_info[devnum];
 558         struct nand_chip *chip;
 559         struct vf610_nfc *nfc;
 560         int err = 0;
 561         struct vf610_nfc_config cfg = {
 562                 .hardware_ecc = 1,
 563 #ifdef CONFIG_SYS_NAND_BUSWIDTH_16BIT
 564                 .width = 16,
 565 #else
 566                 .width = 8,
 567 #endif
 568                 .flash_bbt = 1,
 569         };
 570
 571         nfc = malloc(sizeof(*nfc));
 572         if (!nfc) {
 573                 printf(KERN_ERR "%s: Memory exhausted!\n", __func__);
 574                 return -ENOMEM;
 575         }
 576
 577         chip = &nfc->chip;
 578         nfc->regs = addr;
 579
 580         mtd->priv = chip;
 581         chip->priv = nfc;
 582
 583         if (cfg.width == 16) {
 584                 chip->options |= NAND_BUSWIDTH_16;
 585                 vf610_nfc_set(mtd, NFC_FLASH_CONFIG, CONFIG_16BIT);
 586         } else {
 587                 chip->options &= ~NAND_BUSWIDTH_16;
 588                 vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CONFIG_16BIT);
 589         }
 590
 591         /* Disable subpage writes as we do not provide ecc->hwctl */
 592         chip->options |= NAND_NO_SUBPAGE_WRITE;
 593
 594         chip->dev_ready = vf610_nfc_dev_ready;
 595         chip->cmdfunc = vf610_nfc_command;
 596         chip->read_byte = vf610_nfc_read_byte;
 597         chip->read_word = vf610_nfc_read_word;
 598         chip->read_buf = vf610_nfc_read_buf;
 599         chip->write_buf = vf610_nfc_write_buf;
 600         chip->select_chip = vf610_nfc_select_chip;
 601
 602         /* Bad block options. */
 603         if (cfg.flash_bbt)
 604                 chip->bbt_options = NAND_BBT_USE_FLASH | NAND_BBT_NO_OOB |
 605                                     NAND_BBT_CREATE;
 606
 607         /* Set configuration register. */
 608         vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CONFIG_ADDR_AUTO_INCR_BIT);
 609         vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CONFIG_BUFNO_AUTO_INCR_BIT);
 610         vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CONFIG_BOOT_MODE_BIT);
 611         vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CONFIG_DMA_REQ_BIT);
 612         vf610_nfc_set(mtd, NFC_FLASH_CONFIG, CONFIG_FAST_FLASH_BIT);
 613
 614         /* Enable Idle IRQ */
 615         vf610_nfc_set(mtd, NFC_IRQ_STATUS, IDLE_EN_BIT);
 616
 617         /* PAGE_CNT = 1 */
 618         vf610_nfc_set_field(mtd, NFC_FLASH_CONFIG, CONFIG_PAGE_CNT_MASK,
 619                             CONFIG_PAGE_CNT_SHIFT, 1);
 620
 621         /* Set ECC_STATUS offset */
 622         vf610_nfc_set_field(mtd, NFC_FLASH_CONFIG,
 623                             CONFIG_ECC_SRAM_ADDR_MASK,
 624                             CONFIG_ECC_SRAM_ADDR_SHIFT, ECC_SRAM_ADDR);
 625
 626         /* first scan to find the device and get the page size */
 627         if (nand_scan_ident(mtd, CONFIG_SYS_MAX_NAND_DEVICE, NULL)) {
 628                 err = -ENXIO;
 629                 goto error;
 630         }
 631
 632         chip->ecc.mode = NAND_ECC_SOFT; /* default */
 633
 634         /* Single buffer only, max 256 OOB minus ECC status */
 635         if (mtd->writesize + mtd->oobsize > PAGE_2K + 256 - 8) {
 636                 dev_err(nfc->dev, "Unsupported flash size\n");
 637                 err = -ENXIO;
 638                 goto error;
 639         }
 640
 641         if (cfg.hardware_ecc) {
 642                 if (mtd->writesize != PAGE_2K && mtd->oobsize < 64) {
 643                         dev_err(nfc->dev, "Unsupported flash with hwecc\n");
 644                         err = -ENXIO;
 645                         goto error;
 646                 }
 647
 648                 chip->ecc.layout = &vf610_nfc_ecc45;
 649
 650                 /* propagate ecc.layout to mtd_info */
 651                 mtd->ecclayout = chip->ecc.layout;
 652                 chip->ecc.read_page = vf610_nfc_read_page;
 653                 chip->ecc.write_page = vf610_nfc_write_page;
 654                 chip->ecc.mode = NAND_ECC_HW;
 655
 656                 chip->ecc.bytes = 45;
 657                 chip->ecc.size = PAGE_2K;
 658                 chip->ecc.strength = 24;
 659
 660                 /* Enable ECC_STATUS */
 661                 vf610_nfc_set(mtd, NFC_FLASH_CONFIG, CONFIG_ECC_SRAM_REQ_BIT);
 662         }
 663
 664         /* second phase scan */
 665         err = nand_scan_tail(mtd);
 666         if (err)
 667                 return err;
 668
 669         err = nand_register(devnum);
 670         if (err)
 671                 return err;
 672
 673         return 0;
 674
 675 error:
 676         return err;
 677 }
 678
 679 void board_nand_init(void)
 680 {
 681         int err = vf610_nfc_nand_init(0, (void __iomem *)CONFIG_SYS_NAND_BASE);
 682         if (err)
 683                 printf("VF610 NAND init failed (err %d)\n", err);
 684 }