git.sur5r.net Git - u-boot/blob - drivers/mtd/nand/vf610_nfc.c

   1 /*
   2  * Copyright 2009-2014 Freescale Semiconductor, Inc. and others
   3  *
   4  * Description: MPC5125, VF610, MCF54418 and Kinetis K70 Nand driver.
   5  * Ported to U-Boot by Stefan Agner
   6  * Based on RFC driver posted on Kernel Mailing list by Bill Pringlemeir
   7  * Jason ported to M54418TWR and MVFA5.
   8  * Authors: Stefan Agner <stefan.agner@toradex.com>
   9  *          Bill Pringlemeir <bpringlemeir@nbsps.com>
  10  *          Shaohui Xie <b21989@freescale.com>
  11  *          Jason Jin <Jason.jin@freescale.com>
  12  *
  13  * Based on original driver mpc5121_nfc.c.
  14  *
  15  * This is free software; you can redistribute it and/or modify it
  16  * under the terms of the GNU General Public License as published by
  17  * the Free Software Foundation; either version 2 of the License, or
  18  * (at your option) any later version.
  19  *
  20  * Limitations:
  21  * - Untested on MPC5125 and M54418.
  22  * - DMA not used.
  23  * - 2K pages or less.
  24  * - Only 2K page w. 64+OOB and hardware ECC.
  25  */
  26
  27 #include <common.h>
  28 #include <malloc.h>
  29
  30 #include <linux/mtd/mtd.h>
  31 #include <linux/mtd/nand.h>
  32 #include <linux/mtd/partitions.h>
  33
  34 #include <nand.h>
  35 #include <errno.h>
  36 #include <asm/io.h>
  37
  38 /* Register Offsets */
  39 #define NFC_FLASH_CMD1                  0x3F00
  40 #define NFC_FLASH_CMD2                  0x3F04
  41 #define NFC_COL_ADDR                    0x3F08
  42 #define NFC_ROW_ADDR                    0x3F0c
  43 #define NFC_ROW_ADDR_INC                0x3F14
  44 #define NFC_FLASH_STATUS1               0x3F18
  45 #define NFC_FLASH_STATUS2               0x3F1c
  46 #define NFC_CACHE_SWAP                  0x3F28
  47 #define NFC_SECTOR_SIZE                 0x3F2c
  48 #define NFC_FLASH_CONFIG                0x3F30
  49 #define NFC_IRQ_STATUS                  0x3F38
  50
  51 /* Addresses for NFC MAIN RAM BUFFER areas */
  52 #define NFC_MAIN_AREA(n)                ((n) *  0x1000)
  53
  54 #define PAGE_2K                         0x0800
  55 #define OOB_64                          0x0040
  56
  57 /*
  58  * NFC_CMD2[CODE] values. See section:
  59  *  - 31.4.7 Flash Command Code Description, Vybrid manual
  60  *  - 23.8.6 Flash Command Sequencer, MPC5125 manual
  61  *
  62  * Briefly these are bitmasks of controller cycles.
  63  */
  64 #define READ_PAGE_CMD_CODE              0x7EE0
  65 #define PROGRAM_PAGE_CMD_CODE           0x7FC0
  66 #define ERASE_CMD_CODE                  0x4EC0
  67 #define READ_ID_CMD_CODE                0x4804
  68 #define RESET_CMD_CODE                  0x4040
  69 #define STATUS_READ_CMD_CODE            0x4068
  70
  71 /* NFC ECC mode define */
  72 #define ECC_BYPASS                      0
  73 #define ECC_45_BYTE                     6
  74 #define ECC_60_BYTE                     7
  75
  76 /*** Register Mask and bit definitions */
  77
  78 /* NFC_FLASH_CMD1 Field */
  79 #define CMD_BYTE2_MASK                          0xFF000000
  80 #define CMD_BYTE2_SHIFT                         24
  81
  82 /* NFC_FLASH_CM2 Field */
  83 #define CMD_BYTE1_MASK                          0xFF000000
  84 #define CMD_BYTE1_SHIFT                         24
  85 #define CMD_CODE_MASK                           0x00FFFF00
  86 #define CMD_CODE_SHIFT                          8
  87 #define BUFNO_MASK                              0x00000006
  88 #define BUFNO_SHIFT                             1
  89 #define START_BIT                               (1<<0)
  90
  91 /* NFC_COL_ADDR Field */
  92 #define COL_ADDR_MASK                           0x0000FFFF
  93 #define COL_ADDR_SHIFT                          0
  94
  95 /* NFC_ROW_ADDR Field */
  96 #define ROW_ADDR_MASK                           0x00FFFFFF
  97 #define ROW_ADDR_SHIFT                          0
  98 #define ROW_ADDR_CHIP_SEL_RB_MASK               0xF0000000
  99 #define ROW_ADDR_CHIP_SEL_RB_SHIFT              28
 100 #define ROW_ADDR_CHIP_SEL_MASK                  0x0F000000
 101 #define ROW_ADDR_CHIP_SEL_SHIFT                 24
 102
 103 /* NFC_FLASH_STATUS2 Field */
 104 #define STATUS_BYTE1_MASK                       0x000000FF
 105
 106 /* NFC_FLASH_CONFIG Field */
 107 #define CONFIG_ECC_SRAM_ADDR_MASK               0x7FC00000
 108 #define CONFIG_ECC_SRAM_ADDR_SHIFT              22
 109 #define CONFIG_ECC_SRAM_REQ_BIT                 (1<<21)
 110 #define CONFIG_DMA_REQ_BIT                      (1<<20)
 111 #define CONFIG_ECC_MODE_MASK                    0x000E0000
 112 #define CONFIG_ECC_MODE_SHIFT                   17
 113 #define CONFIG_FAST_FLASH_BIT                   (1<<16)
 114 #define CONFIG_16BIT                            (1<<7)
 115 #define CONFIG_BOOT_MODE_BIT                    (1<<6)
 116 #define CONFIG_ADDR_AUTO_INCR_BIT               (1<<5)
 117 #define CONFIG_BUFNO_AUTO_INCR_BIT              (1<<4)
 118 #define CONFIG_PAGE_CNT_MASK                    0xF
 119 #define CONFIG_PAGE_CNT_SHIFT                   0
 120
 121 /* NFC_IRQ_STATUS Field */
 122 #define IDLE_IRQ_BIT                            (1<<29)
 123 #define IDLE_EN_BIT                             (1<<20)
 124 #define CMD_DONE_CLEAR_BIT                      (1<<18)
 125 #define IDLE_CLEAR_BIT                          (1<<17)
 126
 127 #define NFC_TIMEOUT     (1000)
 128
 129 /* ECC status placed at end of buffers. */
 130 #define ECC_SRAM_ADDR   ((PAGE_2K+256-8) >> 3)
 131 #define ECC_STATUS_MASK 0x80
 132 #define ECC_ERR_COUNT   0x3F
 133
 134 /*
 135  * ECC status is stored at NFC_CFG[ECCADD] +4 for little-endian
 136  * and +7 for big-endian SOC.
 137  */
 138 #ifdef CONFIG_VF610
 139 #define ECC_OFFSET      4
 140 #else
 141 #define ECC_OFFSET      7
 142 #endif
 143
 144 struct vf610_nfc {
 145         struct mtd_info   *mtd;
 146         struct nand_chip   chip;
 147         void __iomem      *regs;
 148         uint               column;
 149         /* Status and ID are in alternate locations. */
 150         int                alt_buf;
 151 #define ALT_BUF_ID   1
 152 #define ALT_BUF_STAT 2
 153         struct clk        *clk;
 154 };
 155
 156 #define mtd_to_nfc(_mtd) \
 157         (struct vf610_nfc *)((struct nand_chip *)_mtd->priv)->priv
 158
 159 #if defined(CONFIG_SYS_NAND_VF610_NFC_45_ECC_BYTES)
 160 #define ECC_HW_MODE ECC_45_BYTE
 161
 162 static struct nand_ecclayout vf610_nfc_ecc = {
 163         .eccbytes = 45,
 164         .eccpos = {19, 20, 21, 22, 23,
 165                    24, 25, 26, 27, 28, 29, 30, 31,
 166                    32, 33, 34, 35, 36, 37, 38, 39,
 167                    40, 41, 42, 43, 44, 45, 46, 47,
 168                    48, 49, 50, 51, 52, 53, 54, 55,
 169                    56, 57, 58, 59, 60, 61, 62, 63},
 170         .oobfree = {
 171                 {.offset = 8,
 172                  .length = 11} }
 173 };
 174 #elif defined(CONFIG_SYS_NAND_VF610_NFC_60_ECC_BYTES)
 175 #define ECC_HW_MODE ECC_60_BYTE
 176
 177 static struct nand_ecclayout vf610_nfc_ecc = {
 178         .eccbytes = 60,
 179         .eccpos = { 4,  5,  6,  7,  8,  9, 10, 11,
 180                    12, 13, 14, 15, 16, 17, 18, 19,
 181                    20, 21, 22, 23, 24, 25, 26, 27,
 182                    28, 29, 30, 31, 32, 33, 34, 35,
 183                    36, 37, 38, 39, 40, 41, 42, 43,
 184                    44, 45, 46, 47, 48, 49, 50, 51,
 185                    52, 53, 54, 55, 56, 57, 58, 59,
 186                    60, 61, 62, 63 },
 187         .oobfree = {
 188                 {.offset = 2,
 189                  .length = 2} }
 190 };
 191 #endif
 192
 193 static inline u32 vf610_nfc_read(struct mtd_info *mtd, uint reg)
 194 {
 195         struct vf610_nfc *nfc = mtd_to_nfc(mtd);
 196
 197         return readl(nfc->regs + reg);
 198 }
 199
 200 static inline void vf610_nfc_write(struct mtd_info *mtd, uint reg, u32 val)
 201 {
 202         struct vf610_nfc *nfc = mtd_to_nfc(mtd);
 203
 204         writel(val, nfc->regs + reg);
 205 }
 206
 207 static inline void vf610_nfc_set(struct mtd_info *mtd, uint reg, u32 bits)
 208 {
 209         vf610_nfc_write(mtd, reg, vf610_nfc_read(mtd, reg) | bits);
 210 }
 211
 212 static inline void vf610_nfc_clear(struct mtd_info *mtd, uint reg, u32 bits)
 213 {
 214         vf610_nfc_write(mtd, reg, vf610_nfc_read(mtd, reg) & ~bits);
 215 }
 216
 217 static inline void vf610_nfc_set_field(struct mtd_info *mtd, u32 reg,
 218                                        u32 mask, u32 shift, u32 val)
 219 {
 220         vf610_nfc_write(mtd, reg,
 221                         (vf610_nfc_read(mtd, reg) & (~mask)) | val << shift);
 222 }
 223
 224 static inline void vf610_nfc_memcpy(void *dst, const void *src, size_t n)
 225 {
 226         /*
 227          * Use this accessor for the interal SRAM buffers. On ARM we can
 228          * treat the SRAM buffer as if its memory, hence use memcpy
 229          */
 230         memcpy(dst, src, n);
 231 }
 232
 233 /* Clear flags for upcoming command */
 234 static inline void vf610_nfc_clear_status(void __iomem *regbase)
 235 {
 236         void __iomem *reg = regbase + NFC_IRQ_STATUS;
 237         u32 tmp = __raw_readl(reg);
 238         tmp |= CMD_DONE_CLEAR_BIT | IDLE_CLEAR_BIT;
 239         __raw_writel(tmp, reg);
 240 }
 241
 242 /* Wait for complete operation */
 243 static inline void vf610_nfc_done(struct mtd_info *mtd)
 244 {
 245         struct vf610_nfc *nfc = mtd_to_nfc(mtd);
 246         uint start;
 247
 248         /*
 249          * Barrier is needed after this write. This write need
 250          * to be done before reading the next register the first
 251          * time.
 252          * vf610_nfc_set implicates such a barrier by using writel
 253          * to write to the register.
 254          */
 255         vf610_nfc_set(mtd, NFC_FLASH_CMD2, START_BIT);
 256
 257         start = get_timer(0);
 258
 259         while (!(vf610_nfc_read(mtd, NFC_IRQ_STATUS) & IDLE_IRQ_BIT)) {
 260                 if (get_timer(start) > NFC_TIMEOUT) {
 261                         printf("Timeout while waiting for !BUSY.\n");
 262                         return;
 263                 }
 264         }
 265         vf610_nfc_clear_status(nfc->regs);
 266 }
 267
 268 static u8 vf610_nfc_get_id(struct mtd_info *mtd, int col)
 269 {
 270         u32 flash_id;
 271
 272         if (col < 4) {
 273                 flash_id = vf610_nfc_read(mtd, NFC_FLASH_STATUS1);
 274                 return (flash_id >> (3-col)*8) & 0xff;
 275         } else {
 276                 flash_id = vf610_nfc_read(mtd, NFC_FLASH_STATUS2);
 277                 return flash_id >> 24;
 278         }
 279 }
 280
 281 static u8 vf610_nfc_get_status(struct mtd_info *mtd)
 282 {
 283         return vf610_nfc_read(mtd, NFC_FLASH_STATUS2) & STATUS_BYTE1_MASK;
 284 }
 285
 286 /* Single command */
 287 static void vf610_nfc_send_command(void __iomem *regbase, u32 cmd_byte1,
 288                                    u32 cmd_code)
 289 {
 290         void __iomem *reg = regbase + NFC_FLASH_CMD2;
 291         u32 tmp;
 292         vf610_nfc_clear_status(regbase);
 293
 294         tmp = __raw_readl(reg);
 295         tmp &= ~(CMD_BYTE1_MASK | CMD_CODE_MASK | BUFNO_MASK);
 296         tmp |= cmd_byte1 << CMD_BYTE1_SHIFT;
 297         tmp |= cmd_code << CMD_CODE_SHIFT;
 298         __raw_writel(tmp, reg);
 299 }
 300
 301 /* Two commands */
 302 static void vf610_nfc_send_commands(void __iomem *regbase, u32 cmd_byte1,
 303                               u32 cmd_byte2, u32 cmd_code)
 304 {
 305         void __iomem *reg = regbase + NFC_FLASH_CMD1;
 306         u32 tmp;
 307         vf610_nfc_send_command(regbase, cmd_byte1, cmd_code);
 308
 309         tmp = __raw_readl(reg);
 310         tmp &= ~CMD_BYTE2_MASK;
 311         tmp |= cmd_byte2 << CMD_BYTE2_SHIFT;
 312         __raw_writel(tmp, reg);
 313 }
 314
 315 static void vf610_nfc_addr_cycle(struct mtd_info *mtd, int column, int page)
 316 {
 317         if (column != -1) {
 318                 struct vf610_nfc *nfc = mtd_to_nfc(mtd);
 319                 if (nfc->chip.options & NAND_BUSWIDTH_16)
 320                         column = column / 2;
 321                 vf610_nfc_set_field(mtd, NFC_COL_ADDR, COL_ADDR_MASK,
 322                                     COL_ADDR_SHIFT, column);
 323         }
 324         if (page != -1)
 325                 vf610_nfc_set_field(mtd, NFC_ROW_ADDR, ROW_ADDR_MASK,
 326                                     ROW_ADDR_SHIFT, page);
 327 }
 328
 329 static inline void vf610_nfc_ecc_mode(struct mtd_info *mtd, int ecc_mode)
 330 {
 331         vf610_nfc_set_field(mtd, NFC_FLASH_CONFIG,
 332                             CONFIG_ECC_MODE_MASK,
 333                             CONFIG_ECC_MODE_SHIFT, ecc_mode);
 334 }
 335
 336 static inline void vf610_nfc_transfer_size(void __iomem *regbase, int size)
 337 {
 338         __raw_writel(size, regbase + NFC_SECTOR_SIZE);
 339 }
 340
 341 /* Send command to NAND chip */
 342 static void vf610_nfc_command(struct mtd_info *mtd, unsigned command,
 343                               int column, int page)
 344 {
 345         struct vf610_nfc *nfc = mtd_to_nfc(mtd);
 346         int page_sz = nfc->chip.options & NAND_BUSWIDTH_16 ? 1 : 0;
 347
 348         nfc->column = max(column, 0);
 349         nfc->alt_buf = 0;
 350
 351         switch (command) {
 352         case NAND_CMD_SEQIN:
 353                 /* Use valid column/page from preread... */
 354                 vf610_nfc_addr_cycle(mtd, column, page);
 355                 /*
 356                  * SEQIN => data => PAGEPROG sequence is done by the controller
 357                  * hence we do not need to issue the command here...
 358                  */
 359                 return;
 360         case NAND_CMD_PAGEPROG:
 361                 page_sz += mtd->writesize + mtd->oobsize;
 362                 vf610_nfc_transfer_size(nfc->regs, page_sz);
 363                 vf610_nfc_send_commands(nfc->regs, NAND_CMD_SEQIN,
 364                                         command, PROGRAM_PAGE_CMD_CODE);
 365                 vf610_nfc_ecc_mode(mtd, ECC_HW_MODE);
 366                 break;
 367
 368         case NAND_CMD_RESET:
 369                 vf610_nfc_transfer_size(nfc->regs, 0);
 370                 vf610_nfc_send_command(nfc->regs, command, RESET_CMD_CODE);
 371                 break;
 372
 373         case NAND_CMD_READOOB:
 374                 page_sz += mtd->oobsize;
 375                 column = mtd->writesize;
 376                 vf610_nfc_transfer_size(nfc->regs, page_sz);
 377                 vf610_nfc_send_commands(nfc->regs, NAND_CMD_READ0,
 378                                         NAND_CMD_READSTART, READ_PAGE_CMD_CODE);
 379                 vf610_nfc_addr_cycle(mtd, column, page);
 380                 vf610_nfc_ecc_mode(mtd, ECC_BYPASS);
 381                 break;
 382
 383         case NAND_CMD_READ0:
 384                 page_sz += mtd->writesize + mtd->oobsize;
 385                 column = 0;
 386                 vf610_nfc_transfer_size(nfc->regs, page_sz);
 387                 vf610_nfc_send_commands(nfc->regs, NAND_CMD_READ0,
 388                                         NAND_CMD_READSTART, READ_PAGE_CMD_CODE);
 389                 vf610_nfc_addr_cycle(mtd, column, page);
 390                 vf610_nfc_ecc_mode(mtd, ECC_HW_MODE);
 391                 break;
 392
 393         case NAND_CMD_ERASE1:
 394                 vf610_nfc_transfer_size(nfc->regs, 0);
 395                 vf610_nfc_send_commands(nfc->regs, command,
 396                                         NAND_CMD_ERASE2, ERASE_CMD_CODE);
 397                 vf610_nfc_addr_cycle(mtd, column, page);
 398                 break;
 399
 400         case NAND_CMD_READID:
 401                 nfc->alt_buf = ALT_BUF_ID;
 402                 vf610_nfc_transfer_size(nfc->regs, 0);
 403                 vf610_nfc_send_command(nfc->regs, command, READ_ID_CMD_CODE);
 404                 break;
 405
 406         case NAND_CMD_STATUS:
 407                 nfc->alt_buf = ALT_BUF_STAT;
 408                 vf610_nfc_transfer_size(nfc->regs, 0);
 409                 vf610_nfc_send_command(nfc->regs, command,
 410                                        STATUS_READ_CMD_CODE);
 411                 break;
 412         default:
 413                 return;
 414         }
 415
 416         vf610_nfc_done(mtd);
 417 }
 418
 419 /* Read data from NFC buffers */
 420 static void vf610_nfc_read_buf(struct mtd_info *mtd, u_char *buf, int len)
 421 {
 422         struct vf610_nfc *nfc = mtd_to_nfc(mtd);
 423         uint c = nfc->column;
 424
 425         switch (nfc->alt_buf) {
 426         case ALT_BUF_ID:
 427                 *buf = vf610_nfc_get_id(mtd, c);
 428                 break;
 429         case ALT_BUF_STAT:
 430                 *buf = vf610_nfc_get_status(mtd);
 431                 break;
 432         default:
 433                 vf610_nfc_memcpy(buf, nfc->regs + NFC_MAIN_AREA(0) + c, len);
 434                 break;
 435         }
 436
 437         nfc->column += len;
 438 }
 439
 440 /* Write data to NFC buffers */
 441 static void vf610_nfc_write_buf(struct mtd_info *mtd, const u_char *buf,
 442                                 int len)
 443 {
 444         struct vf610_nfc *nfc = mtd_to_nfc(mtd);
 445         uint c = nfc->column;
 446         uint l;
 447
 448         l = min((uint)len, mtd->writesize + mtd->oobsize - c);
 449         nfc->column += l;
 450         vf610_nfc_memcpy(nfc->regs + NFC_MAIN_AREA(0) + c, buf, l);
 451 }
 452
 453 /* Read byte from NFC buffers */
 454 static u8 vf610_nfc_read_byte(struct mtd_info *mtd)
 455 {
 456         u8 tmp;
 457         vf610_nfc_read_buf(mtd, &tmp, sizeof(tmp));
 458         return tmp;
 459 }
 460
 461 /* Read word from NFC buffers */
 462 static u16 vf610_nfc_read_word(struct mtd_info *mtd)
 463 {
 464         u16 tmp;
 465         vf610_nfc_read_buf(mtd, (u_char *)&tmp, sizeof(tmp));
 466         return tmp;
 467 }
 468
 469 /* If not provided, upper layers apply a fixed delay. */
 470 static int vf610_nfc_dev_ready(struct mtd_info *mtd)
 471 {
 472         /* NFC handles R/B internally; always ready.  */
 473         return 1;
 474 }
 475
 476 /*
 477  * This function supports Vybrid only (MPC5125 would have full RB and four CS)
 478  */
 479 static void vf610_nfc_select_chip(struct mtd_info *mtd, int chip)
 480 {
 481 #ifdef CONFIG_VF610
 482         u32 tmp = vf610_nfc_read(mtd, NFC_ROW_ADDR);
 483         tmp &= ~(ROW_ADDR_CHIP_SEL_RB_MASK | ROW_ADDR_CHIP_SEL_MASK);
 484         tmp |= 1 << ROW_ADDR_CHIP_SEL_RB_SHIFT;
 485
 486         if (chip == 0)
 487                 tmp |= 1 << ROW_ADDR_CHIP_SEL_SHIFT;
 488         else if (chip == 1)
 489                 tmp |= 2 << ROW_ADDR_CHIP_SEL_SHIFT;
 490
 491         vf610_nfc_write(mtd, NFC_ROW_ADDR, tmp);
 492 #endif
 493 }
 494
 495 /* Count the number of 0's in buff upto max_bits */
 496 static inline int count_written_bits(uint8_t *buff, int size, int max_bits)
 497 {
 498         uint32_t *buff32 = (uint32_t *)buff;
 499         int k, written_bits = 0;
 500
 501         for (k = 0; k < (size / 4); k++) {
 502                 written_bits += hweight32(~buff32[k]);
 503                 if (written_bits > max_bits)
 504                         break;
 505         }
 506
 507         return written_bits;
 508 }
 509
 510 static inline int vf610_nfc_correct_data(struct mtd_info *mtd, u_char *dat)
 511 {
 512         struct vf610_nfc *nfc = mtd_to_nfc(mtd);
 513         u8 ecc_status;
 514         u8 ecc_count;
 515         int flip;
 516
 517         ecc_status = __raw_readb(nfc->regs + ECC_SRAM_ADDR * 8 + ECC_OFFSET);
 518         ecc_count = ecc_status & ECC_ERR_COUNT;
 519         if (!(ecc_status & ECC_STATUS_MASK))
 520                 return ecc_count;
 521
 522         /* If 'ecc_count' zero or less then buffer is all 0xff or erased. */
 523         flip = count_written_bits(dat, nfc->chip.ecc.size, ecc_count);
 524
 525         /* ECC failed. */
 526         if (flip > ecc_count && flip > (nfc->chip.ecc.strength / 2))
 527                 return -1;
 528
 529         /* Erased page. */
 530         memset(dat, 0xff, nfc->chip.ecc.size);
 531         return 0;
 532 }
 533
 534
 535 static int vf610_nfc_read_page(struct mtd_info *mtd, struct nand_chip *chip,
 536                                 uint8_t *buf, int oob_required, int page)
 537 {
 538         int eccsize = chip->ecc.size;
 539         int stat;
 540         uint8_t *p = buf;
 541
 542
 543         vf610_nfc_read_buf(mtd, p, eccsize);
 544
 545         if (oob_required)
 546                 vf610_nfc_read_buf(mtd, chip->oob_poi, mtd->oobsize);
 547
 548         stat = vf610_nfc_correct_data(mtd, p);
 549
 550         if (stat < 0)
 551                 mtd->ecc_stats.failed++;
 552         else
 553                 mtd->ecc_stats.corrected += stat;
 554
 555         return 0;
 556 }
 557
 558 /*
 559  * ECC will be calculated automatically
 560  */
 561 static int vf610_nfc_write_page(struct mtd_info *mtd, struct nand_chip *chip,
 562                                const uint8_t *buf, int oob_required)
 563 {
 564         vf610_nfc_write_buf(mtd, buf, mtd->writesize);
 565         if (oob_required)
 566                 vf610_nfc_write_buf(mtd, chip->oob_poi, mtd->oobsize);
 567
 568         return 0;
 569 }
 570
 571 struct vf610_nfc_config {
 572         int hardware_ecc;
 573         int width;
 574         int flash_bbt;
 575 };
 576
 577 static int vf610_nfc_nand_init(int devnum, void __iomem *addr)
 578 {
 579         struct mtd_info *mtd = &nand_info[devnum];
 580         struct nand_chip *chip;
 581         struct vf610_nfc *nfc;
 582         int err = 0;
 583         struct vf610_nfc_config cfg = {
 584                 .hardware_ecc = 1,
 585 #ifdef CONFIG_SYS_NAND_BUSWIDTH_16BIT
 586                 .width = 16,
 587 #else
 588                 .width = 8,
 589 #endif
 590                 .flash_bbt = 1,
 591         };
 592
 593         nfc = malloc(sizeof(*nfc));
 594         if (!nfc) {
 595                 printf(KERN_ERR "%s: Memory exhausted!\n", __func__);
 596                 return -ENOMEM;
 597         }
 598
 599         chip = &nfc->chip;
 600         nfc->regs = addr;
 601
 602         mtd->priv = chip;
 603         chip->priv = nfc;
 604
 605         if (cfg.width == 16) {
 606                 chip->options |= NAND_BUSWIDTH_16;
 607                 vf610_nfc_set(mtd, NFC_FLASH_CONFIG, CONFIG_16BIT);
 608         } else {
 609                 chip->options &= ~NAND_BUSWIDTH_16;
 610                 vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CONFIG_16BIT);
 611         }
 612
 613         /* Disable subpage writes as we do not provide ecc->hwctl */
 614         chip->options |= NAND_NO_SUBPAGE_WRITE;
 615
 616         chip->dev_ready = vf610_nfc_dev_ready;
 617         chip->cmdfunc = vf610_nfc_command;
 618         chip->read_byte = vf610_nfc_read_byte;
 619         chip->read_word = vf610_nfc_read_word;
 620         chip->read_buf = vf610_nfc_read_buf;
 621         chip->write_buf = vf610_nfc_write_buf;
 622         chip->select_chip = vf610_nfc_select_chip;
 623
 624         /* Bad block options. */
 625         if (cfg.flash_bbt)
 626                 chip->bbt_options = NAND_BBT_USE_FLASH | NAND_BBT_NO_OOB |
 627                                     NAND_BBT_CREATE;
 628
 629         /* Set configuration register. */
 630         vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CONFIG_ADDR_AUTO_INCR_BIT);
 631         vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CONFIG_BUFNO_AUTO_INCR_BIT);
 632         vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CONFIG_BOOT_MODE_BIT);
 633         vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CONFIG_DMA_REQ_BIT);
 634         vf610_nfc_set(mtd, NFC_FLASH_CONFIG, CONFIG_FAST_FLASH_BIT);
 635
 636         /* Enable Idle IRQ */
 637         vf610_nfc_set(mtd, NFC_IRQ_STATUS, IDLE_EN_BIT);
 638
 639         /* PAGE_CNT = 1 */
 640         vf610_nfc_set_field(mtd, NFC_FLASH_CONFIG, CONFIG_PAGE_CNT_MASK,
 641                             CONFIG_PAGE_CNT_SHIFT, 1);
 642
 643         /* Set ECC_STATUS offset */
 644         vf610_nfc_set_field(mtd, NFC_FLASH_CONFIG,
 645                             CONFIG_ECC_SRAM_ADDR_MASK,
 646                             CONFIG_ECC_SRAM_ADDR_SHIFT, ECC_SRAM_ADDR);
 647
 648         /* first scan to find the device and get the page size */
 649         if (nand_scan_ident(mtd, CONFIG_SYS_MAX_NAND_DEVICE, NULL)) {
 650                 err = -ENXIO;
 651                 goto error;
 652         }
 653
 654         chip->ecc.mode = NAND_ECC_SOFT; /* default */
 655
 656         /* Single buffer only, max 256 OOB minus ECC status */
 657         if (mtd->writesize + mtd->oobsize > PAGE_2K + 256 - 8) {
 658                 dev_err(nfc->dev, "Unsupported flash size\n");
 659                 err = -ENXIO;
 660                 goto error;
 661         }
 662
 663         if (cfg.hardware_ecc) {
 664                 if (mtd->writesize != PAGE_2K && mtd->oobsize < 64) {
 665                         dev_err(nfc->dev, "Unsupported flash with hwecc\n");
 666                         err = -ENXIO;
 667                         goto error;
 668                 }
 669
 670                 /* Current HW ECC layouts only use 64 bytes of OOB */
 671                 if (mtd->oobsize > 64)
 672                         mtd->oobsize = 64;
 673
 674                 /* propagate ecc.layout to mtd_info */
 675                 mtd->ecclayout = chip->ecc.layout;
 676                 chip->ecc.read_page = vf610_nfc_read_page;
 677                 chip->ecc.write_page = vf610_nfc_write_page;
 678                 chip->ecc.mode = NAND_ECC_HW;
 679
 680                 chip->ecc.size = PAGE_2K;
 681                 chip->ecc.layout = &vf610_nfc_ecc;
 682 #if defined(CONFIG_SYS_NAND_VF610_NFC_45_ECC_BYTES)
 683                 chip->ecc.strength = 24;
 684                 chip->ecc.bytes = 45;
 685 #elif defined(CONFIG_SYS_NAND_VF610_NFC_60_ECC_BYTES)
 686                 chip->ecc.strength = 32;
 687                 chip->ecc.bytes = 60;
 688 #endif
 689
 690                 /* Enable ECC_STATUS */
 691                 vf610_nfc_set(mtd, NFC_FLASH_CONFIG, CONFIG_ECC_SRAM_REQ_BIT);
 692         }
 693
 694         /* second phase scan */
 695         err = nand_scan_tail(mtd);
 696         if (err)
 697                 return err;
 698
 699         err = nand_register(devnum);
 700         if (err)
 701                 return err;
 702
 703         return 0;
 704
 705 error:
 706         return err;
 707 }
 708
 709 void board_nand_init(void)
 710 {
 711         int err = vf610_nfc_nand_init(0, (void __iomem *)CONFIG_SYS_NAND_BASE);
 712         if (err)
 713                 printf("VF610 NAND init failed (err %d)\n", err);
 714 }