git.sur5r.net Git - u-boot/blob - drivers/mtd/nand/vf610_nfc.c

   1 /*
   2  * Copyright 2009-2014 Freescale Semiconductor, Inc. and others
   3  *
   4  * Description: MPC5125, VF610, MCF54418 and Kinetis K70 Nand driver.
   5  * Ported to U-Boot by Stefan Agner
   6  * Based on RFC driver posted on Kernel Mailing list by Bill Pringlemeir
   7  * Jason ported to M54418TWR and MVFA5.
   8  * Authors: Stefan Agner <stefan.agner@toradex.com>
   9  *          Bill Pringlemeir <bpringlemeir@nbsps.com>
  10  *          Shaohui Xie <b21989@freescale.com>
  11  *          Jason Jin <Jason.jin@freescale.com>
  12  *
  13  * Based on original driver mpc5121_nfc.c.
  14  *
  15  * This is free software; you can redistribute it and/or modify it
  16  * under the terms of the GNU General Public License as published by
  17  * the Free Software Foundation; either version 2 of the License, or
  18  * (at your option) any later version.
  19  *
  20  * Limitations:
  21  * - Untested on MPC5125 and M54418.
  22  * - DMA not used.
  23  * - 2K pages or less.
  24  * - Only 2K page w. 64+OOB and hardware ECC.
  25  */
  26
  27 #include <common.h>
  28 #include <malloc.h>
  29
  30 #include <linux/mtd/mtd.h>
  31 #include <linux/mtd/nand.h>
  32 #include <linux/mtd/partitions.h>
  33
  34 #include <nand.h>
  35 #include <errno.h>
  36 #include <asm/io.h>
  37
  38 /* Register Offsets */
  39 #define NFC_FLASH_CMD1                  0x3F00
  40 #define NFC_FLASH_CMD2                  0x3F04
  41 #define NFC_COL_ADDR                    0x3F08
  42 #define NFC_ROW_ADDR                    0x3F0c
  43 #define NFC_ROW_ADDR_INC                0x3F14
  44 #define NFC_FLASH_STATUS1               0x3F18
  45 #define NFC_FLASH_STATUS2               0x3F1c
  46 #define NFC_CACHE_SWAP                  0x3F28
  47 #define NFC_SECTOR_SIZE                 0x3F2c
  48 #define NFC_FLASH_CONFIG                0x3F30
  49 #define NFC_IRQ_STATUS                  0x3F38
  50
  51 /* Addresses for NFC MAIN RAM BUFFER areas */
  52 #define NFC_MAIN_AREA(n)                ((n) *  0x1000)
  53
  54 #define PAGE_2K                         0x0800
  55 #define OOB_64                          0x0040
  56
  57 /*
  58  * NFC_CMD2[CODE] values. See section:
  59  *  - 31.4.7 Flash Command Code Description, Vybrid manual
  60  *  - 23.8.6 Flash Command Sequencer, MPC5125 manual
  61  *
  62  * Briefly these are bitmasks of controller cycles.
  63  */
  64 #define READ_PAGE_CMD_CODE              0x7EE0
  65 #define PROGRAM_PAGE_CMD_CODE           0x7FC0
  66 #define ERASE_CMD_CODE                  0x4EC0
  67 #define READ_ID_CMD_CODE                0x4804
  68 #define RESET_CMD_CODE                  0x4040
  69 #define STATUS_READ_CMD_CODE            0x4068
  70
  71 /* NFC ECC mode define */
  72 #define ECC_BYPASS                      0
  73 #define ECC_45_BYTE                     6
  74
  75 /*** Register Mask and bit definitions */
  76
  77 /* NFC_FLASH_CMD1 Field */
  78 #define CMD_BYTE2_MASK                          0xFF000000
  79 #define CMD_BYTE2_SHIFT                         24
  80
  81 /* NFC_FLASH_CM2 Field */
  82 #define CMD_BYTE1_MASK                          0xFF000000
  83 #define CMD_BYTE1_SHIFT                         24
  84 #define CMD_CODE_MASK                           0x00FFFF00
  85 #define CMD_CODE_SHIFT                          8
  86 #define BUFNO_MASK                              0x00000006
  87 #define BUFNO_SHIFT                             1
  88 #define START_BIT                               (1<<0)
  89
  90 /* NFC_COL_ADDR Field */
  91 #define COL_ADDR_MASK                           0x0000FFFF
  92 #define COL_ADDR_SHIFT                          0
  93
  94 /* NFC_ROW_ADDR Field */
  95 #define ROW_ADDR_MASK                           0x00FFFFFF
  96 #define ROW_ADDR_SHIFT                          0
  97 #define ROW_ADDR_CHIP_SEL_RB_MASK               0xF0000000
  98 #define ROW_ADDR_CHIP_SEL_RB_SHIFT              28
  99 #define ROW_ADDR_CHIP_SEL_MASK                  0x0F000000
 100 #define ROW_ADDR_CHIP_SEL_SHIFT                 24
 101
 102 /* NFC_FLASH_STATUS2 Field */
 103 #define STATUS_BYTE1_MASK                       0x000000FF
 104
 105 /* NFC_FLASH_CONFIG Field */
 106 #define CONFIG_ECC_SRAM_ADDR_MASK               0x7FC00000
 107 #define CONFIG_ECC_SRAM_ADDR_SHIFT              22
 108 #define CONFIG_ECC_SRAM_REQ_BIT                 (1<<21)
 109 #define CONFIG_DMA_REQ_BIT                      (1<<20)
 110 #define CONFIG_ECC_MODE_MASK                    0x000E0000
 111 #define CONFIG_ECC_MODE_SHIFT                   17
 112 #define CONFIG_FAST_FLASH_BIT                   (1<<16)
 113 #define CONFIG_16BIT                            (1<<7)
 114 #define CONFIG_BOOT_MODE_BIT                    (1<<6)
 115 #define CONFIG_ADDR_AUTO_INCR_BIT               (1<<5)
 116 #define CONFIG_BUFNO_AUTO_INCR_BIT              (1<<4)
 117 #define CONFIG_PAGE_CNT_MASK                    0xF
 118 #define CONFIG_PAGE_CNT_SHIFT                   0
 119
 120 /* NFC_IRQ_STATUS Field */
 121 #define IDLE_IRQ_BIT                            (1<<29)
 122 #define IDLE_EN_BIT                             (1<<20)
 123 #define CMD_DONE_CLEAR_BIT                      (1<<18)
 124 #define IDLE_CLEAR_BIT                          (1<<17)
 125
 126 #define NFC_TIMEOUT     (1000)
 127
 128 /* ECC status placed at end of buffers. */
 129 #define ECC_SRAM_ADDR   ((PAGE_2K+256-8) >> 3)
 130 #define ECC_STATUS_MASK 0x80
 131 #define ECC_ERR_COUNT   0x3F
 132
 133 /*
 134  * ECC status is stored at NFC_CFG[ECCADD] +4 for little-endian
 135  * and +7 for big-endian SOC.
 136  */
 137 #ifdef CONFIG_VF610
 138 #define ECC_OFFSET      4
 139 #else
 140 #define ECC_OFFSET      7
 141 #endif
 142
 143 struct vf610_nfc {
 144         struct mtd_info   *mtd;
 145         struct nand_chip   chip;
 146         void __iomem      *regs;
 147         uint               column;
 148         int                spareonly;
 149         int                page_sz;
 150         int                page;
 151         /* Status and ID are in alternate locations. */
 152         int                alt_buf;
 153 #define ALT_BUF_ID   1
 154 #define ALT_BUF_STAT 2
 155         struct clk        *clk;
 156 };
 157
 158 #define mtd_to_nfc(_mtd) \
 159         (struct vf610_nfc *)((struct nand_chip *)_mtd->priv)->priv
 160
 161 static u8 bbt_pattern[] = {'B', 'b', 't', '0' };
 162 static u8 mirror_pattern[] = {'1', 't', 'b', 'B' };
 163
 164 static struct nand_bbt_descr bbt_main_descr = {
 165         .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE |
 166                    NAND_BBT_2BIT | NAND_BBT_VERSION,
 167         .offs = 11,
 168         .len = 4,
 169         .veroffs = 15,
 170         .maxblocks = 4,
 171         .pattern = bbt_pattern,
 172 };
 173
 174 static struct nand_bbt_descr bbt_mirror_descr = {
 175         .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE |
 176                    NAND_BBT_2BIT | NAND_BBT_VERSION,
 177         .offs = 11,
 178         .len = 4,
 179         .veroffs = 15,
 180         .maxblocks = 4,
 181         .pattern = mirror_pattern,
 182 };
 183
 184 static struct nand_ecclayout vf610_nfc_ecc45 = {
 185         .eccbytes = 45,
 186         .eccpos = {19, 20, 21, 22, 23,
 187                    24, 25, 26, 27, 28, 29, 30, 31,
 188                    32, 33, 34, 35, 36, 37, 38, 39,
 189                    40, 41, 42, 43, 44, 45, 46, 47,
 190                    48, 49, 50, 51, 52, 53, 54, 55,
 191                    56, 57, 58, 59, 60, 61, 62, 63},
 192         .oobfree = {
 193                 {.offset = 8,
 194                  .length = 11} }
 195 };
 196
 197 static inline u32 vf610_nfc_read(struct mtd_info *mtd, uint reg)
 198 {
 199         struct vf610_nfc *nfc = mtd_to_nfc(mtd);
 200
 201         return readl(nfc->regs + reg);
 202 }
 203
 204 static inline void vf610_nfc_write(struct mtd_info *mtd, uint reg, u32 val)
 205 {
 206         struct vf610_nfc *nfc = mtd_to_nfc(mtd);
 207
 208         writel(val, nfc->regs + reg);
 209 }
 210
 211 static inline void vf610_nfc_set(struct mtd_info *mtd, uint reg, u32 bits)
 212 {
 213         vf610_nfc_write(mtd, reg, vf610_nfc_read(mtd, reg) | bits);
 214 }
 215
 216 static inline void vf610_nfc_clear(struct mtd_info *mtd, uint reg, u32 bits)
 217 {
 218         vf610_nfc_write(mtd, reg, vf610_nfc_read(mtd, reg) & ~bits);
 219 }
 220
 221 static inline void vf610_nfc_set_field(struct mtd_info *mtd, u32 reg,
 222                                        u32 mask, u32 shift, u32 val)
 223 {
 224         vf610_nfc_write(mtd, reg,
 225                         (vf610_nfc_read(mtd, reg) & (~mask)) | val << shift);
 226 }
 227
 228 static inline void vf610_nfc_memcpy(void *dst, const void *src, size_t n)
 229 {
 230         /*
 231          * Use this accessor for the interal SRAM buffers. On ARM we can
 232          * treat the SRAM buffer as if its memory, hence use memcpy
 233          */
 234         memcpy(dst, src, n);
 235 }
 236
 237 /* Clear flags for upcoming command */
 238 static inline void vf610_nfc_clear_status(void __iomem *regbase)
 239 {
 240         void __iomem *reg = regbase + NFC_IRQ_STATUS;
 241         u32 tmp = __raw_readl(reg);
 242         tmp |= CMD_DONE_CLEAR_BIT | IDLE_CLEAR_BIT;
 243         __raw_writel(tmp, reg);
 244 }
 245
 246 /* Wait for complete operation */
 247 static inline void vf610_nfc_done(struct mtd_info *mtd)
 248 {
 249         struct vf610_nfc *nfc = mtd_to_nfc(mtd);
 250         uint start;
 251
 252         /*
 253          * Barrier is needed after this write. This write need
 254          * to be done before reading the next register the first
 255          * time.
 256          * vf610_nfc_set implicates such a barrier by using writel
 257          * to write to the register.
 258          */
 259         vf610_nfc_set(mtd, NFC_FLASH_CMD2, START_BIT);
 260
 261         start = get_timer(0);
 262
 263         while (!(vf610_nfc_read(mtd, NFC_IRQ_STATUS) & IDLE_IRQ_BIT)) {
 264                 if (get_timer(start) > NFC_TIMEOUT) {
 265                         printf("Timeout while waiting for !BUSY.\n");
 266                         return;
 267                 }
 268         }
 269         vf610_nfc_clear_status(nfc->regs);
 270 }
 271
 272 static u8 vf610_nfc_get_id(struct mtd_info *mtd, int col)
 273 {
 274         u32 flash_id;
 275
 276         if (col < 4) {
 277                 flash_id = vf610_nfc_read(mtd, NFC_FLASH_STATUS1);
 278                 return (flash_id >> (3-col)*8) & 0xff;
 279         } else {
 280                 flash_id = vf610_nfc_read(mtd, NFC_FLASH_STATUS2);
 281                 return flash_id >> 24;
 282         }
 283 }
 284
 285 static u8 vf610_nfc_get_status(struct mtd_info *mtd)
 286 {
 287         return vf610_nfc_read(mtd, NFC_FLASH_STATUS2) & STATUS_BYTE1_MASK;
 288 }
 289
 290 /* Single command */
 291 static void vf610_nfc_send_command(void __iomem *regbase, u32 cmd_byte1,
 292                                    u32 cmd_code)
 293 {
 294         void __iomem *reg = regbase + NFC_FLASH_CMD2;
 295         u32 tmp;
 296         vf610_nfc_clear_status(regbase);
 297
 298         tmp = __raw_readl(reg);
 299         tmp &= ~(CMD_BYTE1_MASK | CMD_CODE_MASK | BUFNO_MASK);
 300         tmp |= cmd_byte1 << CMD_BYTE1_SHIFT;
 301         tmp |= cmd_code << CMD_CODE_SHIFT;
 302         __raw_writel(tmp, reg);
 303 }
 304
 305 /* Two commands */
 306 static void vf610_nfc_send_commands(void __iomem *regbase, u32 cmd_byte1,
 307                               u32 cmd_byte2, u32 cmd_code)
 308 {
 309         void __iomem *reg = regbase + NFC_FLASH_CMD1;
 310         u32 tmp;
 311         vf610_nfc_send_command(regbase, cmd_byte1, cmd_code);
 312
 313         tmp = __raw_readl(reg);
 314         tmp &= ~CMD_BYTE2_MASK;
 315         tmp |= cmd_byte2 << CMD_BYTE2_SHIFT;
 316         __raw_writel(tmp, reg);
 317 }
 318
 319 static void vf610_nfc_addr_cycle(struct mtd_info *mtd, int column, int page)
 320 {
 321         if (column != -1) {
 322                 struct vf610_nfc *nfc = mtd_to_nfc(mtd);
 323                 if (nfc->chip.options | NAND_BUSWIDTH_16)
 324                         column = column/2;
 325                 vf610_nfc_set_field(mtd, NFC_COL_ADDR, COL_ADDR_MASK,
 326                                     COL_ADDR_SHIFT, column);
 327         }
 328         if (page != -1)
 329                 vf610_nfc_set_field(mtd, NFC_ROW_ADDR, ROW_ADDR_MASK,
 330                                     ROW_ADDR_SHIFT, page);
 331 }
 332
 333 static inline void vf610_nfc_transfer_size(void __iomem *regbase, int size)
 334 {
 335         __raw_writel(size, regbase + NFC_SECTOR_SIZE);
 336 }
 337
 338 /* Send command to NAND chip */
 339 static void vf610_nfc_command(struct mtd_info *mtd, unsigned command,
 340                               int column, int page)
 341 {
 342         struct vf610_nfc *nfc = mtd_to_nfc(mtd);
 343
 344         nfc->column     = max(column, 0);
 345         nfc->spareonly  = 0;
 346         nfc->alt_buf    = 0;
 347
 348         switch (command) {
 349         case NAND_CMD_PAGEPROG:
 350                 nfc->page = -1;
 351                 vf610_nfc_transfer_size(nfc->regs, nfc->page_sz);
 352                 vf610_nfc_send_commands(nfc->regs, NAND_CMD_SEQIN,
 353                                         command, PROGRAM_PAGE_CMD_CODE);
 354                 vf610_nfc_addr_cycle(mtd, column, page);
 355                 break;
 356
 357         case NAND_CMD_RESET:
 358                 vf610_nfc_transfer_size(nfc->regs, 0);
 359                 vf610_nfc_send_command(nfc->regs, command, RESET_CMD_CODE);
 360                 break;
 361         /*
 362          * NFC does not support sub-page reads and writes,
 363          * so emulate them using full page transfers.
 364          */
 365         case NAND_CMD_READOOB:
 366                 nfc->spareonly = 1;
 367         case NAND_CMD_SEQIN: /* Pre-read for partial writes. */
 368         case NAND_CMD_READ0:
 369                 column = 0;
 370                 /* Already read? */
 371                 if (nfc->page == page)
 372                         return;
 373                 nfc->page = page;
 374                 vf610_nfc_transfer_size(nfc->regs, nfc->page_sz);
 375                 vf610_nfc_send_commands(nfc->regs, NAND_CMD_READ0,
 376                                         NAND_CMD_READSTART, READ_PAGE_CMD_CODE);
 377                 vf610_nfc_addr_cycle(mtd, column, page);
 378                 break;
 379
 380         case NAND_CMD_ERASE1:
 381                 nfc->page = -1;
 382                 vf610_nfc_transfer_size(nfc->regs, 0);
 383                 vf610_nfc_send_commands(nfc->regs, command,
 384                                         NAND_CMD_ERASE2, ERASE_CMD_CODE);
 385                 vf610_nfc_addr_cycle(mtd, column, page);
 386                 break;
 387
 388         case NAND_CMD_READID:
 389                 nfc->alt_buf = ALT_BUF_ID;
 390                 vf610_nfc_transfer_size(nfc->regs, 0);
 391                 vf610_nfc_send_command(nfc->regs, command, READ_ID_CMD_CODE);
 392                 break;
 393
 394         case NAND_CMD_STATUS:
 395                 nfc->alt_buf = ALT_BUF_STAT;
 396                 vf610_nfc_transfer_size(nfc->regs, 0);
 397                 vf610_nfc_send_command(nfc->regs, command,
 398                                        STATUS_READ_CMD_CODE);
 399                 break;
 400         default:
 401                 return;
 402         }
 403
 404         vf610_nfc_done(mtd);
 405 }
 406
 407 static inline void vf610_nfc_read_spare(struct mtd_info *mtd, void *buf,
 408                                         int len)
 409 {
 410         struct vf610_nfc *nfc = mtd_to_nfc(mtd);
 411
 412         len = min(mtd->oobsize, (uint)len);
 413         if (len > 0)
 414                 vf610_nfc_memcpy(buf, nfc->regs + mtd->writesize, len);
 415 }
 416
 417 /* Read data from NFC buffers */
 418 static void vf610_nfc_read_buf(struct mtd_info *mtd, u_char *buf, int len)
 419 {
 420         struct vf610_nfc *nfc = mtd_to_nfc(mtd);
 421         uint c = nfc->column;
 422         uint l;
 423
 424         /* Handle main area */
 425         if (!nfc->spareonly) {
 426                 l = min((uint)len, mtd->writesize - c);
 427                 nfc->column += l;
 428
 429                 if (!nfc->alt_buf)
 430                         vf610_nfc_memcpy(buf, nfc->regs + NFC_MAIN_AREA(0) + c,
 431                                          l);
 432                 else
 433                         if (nfc->alt_buf & ALT_BUF_ID)
 434                                 *buf = vf610_nfc_get_id(mtd, c);
 435                         else
 436                                 *buf = vf610_nfc_get_status(mtd);
 437
 438                 buf += l;
 439                 len -= l;
 440         }
 441
 442         /* Handle spare area access */
 443         if (len) {
 444                 nfc->column += len;
 445                 vf610_nfc_read_spare(mtd, buf, len);
 446         }
 447 }
 448
 449 /* Write data to NFC buffers */
 450 static void vf610_nfc_write_buf(struct mtd_info *mtd, const u_char *buf,
 451                                 int len)
 452 {
 453         struct vf610_nfc *nfc = mtd_to_nfc(mtd);
 454         uint c = nfc->column;
 455         uint l;
 456
 457         l = min((uint)len, mtd->writesize + mtd->oobsize - c);
 458         nfc->column += l;
 459         vf610_nfc_memcpy(nfc->regs + NFC_MAIN_AREA(0) + c, buf, l);
 460 }
 461
 462 /* Read byte from NFC buffers */
 463 static u8 vf610_nfc_read_byte(struct mtd_info *mtd)
 464 {
 465         u8 tmp;
 466         vf610_nfc_read_buf(mtd, &tmp, sizeof(tmp));
 467         return tmp;
 468 }
 469
 470 /* Read word from NFC buffers */
 471 static u16 vf610_nfc_read_word(struct mtd_info *mtd)
 472 {
 473         u16 tmp;
 474         vf610_nfc_read_buf(mtd, (u_char *)&tmp, sizeof(tmp));
 475         return tmp;
 476 }
 477
 478 /* If not provided, upper layers apply a fixed delay. */
 479 static int vf610_nfc_dev_ready(struct mtd_info *mtd)
 480 {
 481         /* NFC handles R/B internally; always ready.  */
 482         return 1;
 483 }
 484
 485 /*
 486  * This function supports Vybrid only (MPC5125 would have full RB and four CS)
 487  */
 488 static void vf610_nfc_select_chip(struct mtd_info *mtd, int chip)
 489 {
 490 #ifdef CONFIG_VF610
 491         u32 tmp = vf610_nfc_read(mtd, NFC_ROW_ADDR);
 492         tmp &= ~(ROW_ADDR_CHIP_SEL_RB_MASK | ROW_ADDR_CHIP_SEL_MASK);
 493         tmp |= 1 << ROW_ADDR_CHIP_SEL_RB_SHIFT;
 494
 495         if (chip == 0)
 496                 tmp |= 1 << ROW_ADDR_CHIP_SEL_SHIFT;
 497         else if (chip == 1)
 498                 tmp |= 2 << ROW_ADDR_CHIP_SEL_SHIFT;
 499
 500         vf610_nfc_write(mtd, NFC_ROW_ADDR, tmp);
 501 #endif
 502 }
 503
 504 /* Count the number of 0's in buff upto max_bits */
 505 static inline int count_written_bits(uint8_t *buff, int size, int max_bits)
 506 {
 507         uint32_t *buff32 = (uint32_t *)buff;
 508         int k, written_bits = 0;
 509
 510         for (k = 0; k < (size / 4); k++) {
 511                 written_bits += hweight32(~buff32[k]);
 512                 if (written_bits > max_bits)
 513                         break;
 514         }
 515
 516         return written_bits;
 517 }
 518
 519 static inline int vf610_nfc_correct_data(struct mtd_info *mtd, u_char *dat)
 520 {
 521         struct vf610_nfc *nfc = mtd_to_nfc(mtd);
 522         u8 ecc_status;
 523         u8 ecc_count;
 524         int flip;
 525
 526         ecc_status = __raw_readb(nfc->regs + ECC_SRAM_ADDR * 8 + ECC_OFFSET);
 527         ecc_count = ecc_status & ECC_ERR_COUNT;
 528         if (!(ecc_status & ECC_STATUS_MASK))
 529                 return ecc_count;
 530
 531         /* If 'ecc_count' zero or less then buffer is all 0xff or erased. */
 532         flip = count_written_bits(dat, nfc->chip.ecc.size, ecc_count);
 533
 534         /* ECC failed. */
 535         if (flip > ecc_count) {
 536                 nfc->page = -1;
 537                 return -1;
 538         }
 539
 540         /* Erased page. */
 541         memset(dat, 0xff, nfc->chip.ecc.size);
 542         return 0;
 543 }
 544
 545
 546 static int vf610_nfc_read_page(struct mtd_info *mtd, struct nand_chip *chip,
 547                                 uint8_t *buf, int oob_required, int page)
 548 {
 549         int eccsize = chip->ecc.size;
 550         int stat;
 551         uint8_t *p = buf;
 552
 553
 554         vf610_nfc_read_buf(mtd, p, eccsize);
 555
 556         if (oob_required)
 557                 vf610_nfc_read_buf(mtd, chip->oob_poi, mtd->oobsize);
 558
 559         stat = vf610_nfc_correct_data(mtd, p);
 560
 561         if (stat < 0)
 562                 mtd->ecc_stats.failed++;
 563         else
 564                 mtd->ecc_stats.corrected += stat;
 565
 566         return 0;
 567 }
 568
 569 /*
 570  * ECC will be calculated automatically
 571  */
 572 static int vf610_nfc_write_page(struct mtd_info *mtd, struct nand_chip *chip,
 573                                const uint8_t *buf, int oob_required)
 574 {
 575         vf610_nfc_write_buf(mtd, buf, mtd->writesize);
 576         if (oob_required)
 577                 vf610_nfc_write_buf(mtd, chip->oob_poi, mtd->oobsize);
 578
 579         return 0;
 580 }
 581
 582 struct vf610_nfc_config {
 583         int hardware_ecc;
 584         int width;
 585         int flash_bbt;
 586 };
 587
 588 static int vf610_nfc_nand_init(int devnum, void __iomem *addr)
 589 {
 590         struct mtd_info *mtd = &nand_info[devnum];
 591         struct nand_chip *chip;
 592         struct vf610_nfc *nfc;
 593         int err = 0;
 594         struct vf610_nfc_config cfg = {
 595                 .hardware_ecc = 1,
 596 #ifdef CONFIG_SYS_NAND_BUSWIDTH_16BIT
 597                 .width = 16,
 598 #else
 599                 .width = 8,
 600 #endif
 601                 .flash_bbt = 1,
 602         };
 603
 604         nfc = malloc(sizeof(*nfc));
 605         if (!nfc) {
 606                 printf(KERN_ERR "%s: Memory exhausted!\n", __func__);
 607                 return -ENOMEM;
 608         }
 609
 610         chip = &nfc->chip;
 611         nfc->regs = addr;
 612
 613         mtd->priv = chip;
 614         chip->priv = nfc;
 615
 616         if (cfg.width == 16) {
 617                 chip->options |= NAND_BUSWIDTH_16;
 618                 vf610_nfc_set(mtd, NFC_FLASH_CONFIG, CONFIG_16BIT);
 619         } else {
 620                 chip->options &= ~NAND_BUSWIDTH_16;
 621                 vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CONFIG_16BIT);
 622         }
 623
 624         /* Disable subpage writes as we do not provide ecc->hwctl */
 625         chip->options |= NAND_NO_SUBPAGE_WRITE;
 626
 627         chip->dev_ready = vf610_nfc_dev_ready;
 628         chip->cmdfunc = vf610_nfc_command;
 629         chip->read_byte = vf610_nfc_read_byte;
 630         chip->read_word = vf610_nfc_read_word;
 631         chip->read_buf = vf610_nfc_read_buf;
 632         chip->write_buf = vf610_nfc_write_buf;
 633         chip->select_chip = vf610_nfc_select_chip;
 634
 635         /* Bad block options. */
 636         if (cfg.flash_bbt)
 637                 chip->bbt_options = NAND_BBT_USE_FLASH | NAND_BBT_CREATE;
 638
 639         /* Default to software ECC until flash ID. */
 640         vf610_nfc_set_field(mtd, NFC_FLASH_CONFIG,
 641                             CONFIG_ECC_MODE_MASK,
 642                             CONFIG_ECC_MODE_SHIFT, ECC_BYPASS);
 643
 644         chip->bbt_td = &bbt_main_descr;
 645         chip->bbt_md = &bbt_mirror_descr;
 646
 647         nfc->page_sz = PAGE_2K + OOB_64;
 648         nfc->page_sz += cfg.width == 16 ? 1 : 0;
 649
 650         /* Set configuration register. */
 651         vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CONFIG_ADDR_AUTO_INCR_BIT);
 652         vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CONFIG_BUFNO_AUTO_INCR_BIT);
 653         vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CONFIG_BOOT_MODE_BIT);
 654         vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CONFIG_DMA_REQ_BIT);
 655         vf610_nfc_set(mtd, NFC_FLASH_CONFIG, CONFIG_FAST_FLASH_BIT);
 656
 657         /* Enable Idle IRQ */
 658         vf610_nfc_set(mtd, NFC_IRQ_STATUS, IDLE_EN_BIT);
 659
 660         /* PAGE_CNT = 1 */
 661         vf610_nfc_set_field(mtd, NFC_FLASH_CONFIG, CONFIG_PAGE_CNT_MASK,
 662                             CONFIG_PAGE_CNT_SHIFT, 1);
 663
 664         /* Set ECC_STATUS offset */
 665         vf610_nfc_set_field(mtd, NFC_FLASH_CONFIG,
 666                             CONFIG_ECC_SRAM_ADDR_MASK,
 667                             CONFIG_ECC_SRAM_ADDR_SHIFT, ECC_SRAM_ADDR);
 668
 669         /* first scan to find the device and get the page size */
 670         if (nand_scan_ident(mtd, CONFIG_SYS_MAX_NAND_DEVICE, NULL)) {
 671                 err = -ENXIO;
 672                 goto error;
 673         }
 674
 675         chip->ecc.mode = NAND_ECC_SOFT; /* default */
 676
 677         nfc->page_sz = mtd->writesize + mtd->oobsize;
 678
 679         /* Single buffer only, max 256 OOB minus ECC status */
 680         if (nfc->page_sz > PAGE_2K + 256 - 8) {
 681                 dev_err(nfc->dev, "Unsupported flash size\n");
 682                 err = -ENXIO;
 683                 goto error;
 684         }
 685         nfc->page_sz += cfg.width == 16 ? 1 : 0;
 686
 687         if (cfg.hardware_ecc) {
 688                 if (mtd->writesize != PAGE_2K && mtd->oobsize < 64) {
 689                         dev_err(nfc->dev, "Unsupported flash with hwecc\n");
 690                         err = -ENXIO;
 691                         goto error;
 692                 }
 693
 694                 chip->ecc.layout = &vf610_nfc_ecc45;
 695
 696                 /* propagate ecc.layout to mtd_info */
 697                 mtd->ecclayout = chip->ecc.layout;
 698                 chip->ecc.read_page = vf610_nfc_read_page;
 699                 chip->ecc.write_page = vf610_nfc_write_page;
 700                 chip->ecc.mode = NAND_ECC_HW;
 701
 702                 chip->ecc.bytes = 45;
 703                 chip->ecc.size = PAGE_2K;
 704                 chip->ecc.strength = 24;
 705
 706                 /* set ECC mode to 45 bytes OOB with 24 bits correction */
 707                 vf610_nfc_set_field(mtd, NFC_FLASH_CONFIG,
 708                                     CONFIG_ECC_MODE_MASK,
 709                                     CONFIG_ECC_MODE_SHIFT, ECC_45_BYTE);
 710
 711                 /* Enable ECC_STATUS */
 712                 vf610_nfc_set(mtd, NFC_FLASH_CONFIG, CONFIG_ECC_SRAM_REQ_BIT);
 713         }
 714
 715         /* second phase scan */
 716         err = nand_scan_tail(mtd);
 717         if (err)
 718                 return err;
 719
 720         err = nand_register(devnum);
 721         if (err)
 722                 return err;
 723
 724         return 0;
 725
 726 error:
 727         return err;
 728 }
 729
 730 void board_nand_init(void)
 731 {
 732         int err = vf610_nfc_nand_init(0, (void __iomem *)CONFIG_SYS_NAND_BASE);
 733         if (err)
 734                 printf("VF610 NAND init failed (err %d)\n", err);
 735 }