2 * linux/drivers/mtd/onenand/onenand_base.c
4 * Copyright (C) 2005-2007 Samsung Electronics
5 * Kyungmin Park <kyungmin.park@samsung.com>
8 * Adrian Hunter <ext-adrian.hunter@nokia.com>:
9 * auto-placement support, read-while load support, various fixes
10 * Copyright (C) Nokia Corporation, 2007
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
18 #include <linux/mtd/compat.h>
19 #include <linux/mtd/mtd.h>
20 #include <linux/mtd/onenand.h>
23 #include <asm/errno.h>
26 /* It should access 16-bit instead of 8-bit */
27 static inline void *memcpy_16(void *dst, const void *src, unsigned int len)
39 static const unsigned char ffchars[] = {
40 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
41 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
42 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
43 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
44 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
45 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
46 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
47 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
51 * onenand_readw - [OneNAND Interface] Read OneNAND register
52 * @param addr address to read
54 * Read OneNAND register
56 static unsigned short onenand_readw(void __iomem * addr)
62 * onenand_writew - [OneNAND Interface] Write OneNAND register with value
63 * @param value value to write
64 * @param addr address to write
66 * Write OneNAND register with value
68 static void onenand_writew(unsigned short value, void __iomem * addr)
74 * onenand_block_address - [DEFAULT] Get block address
75 * @param device the device id
76 * @param block the block
77 * @return translated block address if DDP, otherwise same
79 * Setup Start Address 1 Register (F100h)
81 static int onenand_block_address(struct onenand_chip *this, int block)
83 /* Device Flash Core select, NAND Flash Block Address */
84 if (block & this->density_mask)
85 return ONENAND_DDP_CHIP1 | (block ^ this->density_mask);
91 * onenand_bufferram_address - [DEFAULT] Get bufferram address
92 * @param device the device id
93 * @param block the block
94 * @return set DBS value if DDP, otherwise 0
96 * Setup Start Address 2 Register (F101h) for DDP
98 static int onenand_bufferram_address(struct onenand_chip *this, int block)
100 /* Device BufferRAM Select */
101 if (block & this->density_mask)
102 return ONENAND_DDP_CHIP1;
104 return ONENAND_DDP_CHIP0;
108 * onenand_page_address - [DEFAULT] Get page address
109 * @param page the page address
110 * @param sector the sector address
111 * @return combined page and sector address
113 * Setup Start Address 8 Register (F107h)
115 static int onenand_page_address(int page, int sector)
117 /* Flash Page Address, Flash Sector Address */
120 fpa = page & ONENAND_FPA_MASK;
121 fsa = sector & ONENAND_FSA_MASK;
123 return ((fpa << ONENAND_FPA_SHIFT) | fsa);
127 * onenand_buffer_address - [DEFAULT] Get buffer address
128 * @param dataram1 DataRAM index
129 * @param sectors the sector address
130 * @param count the number of sectors
131 * @return the start buffer value
133 * Setup Start Buffer Register (F200h)
135 static int onenand_buffer_address(int dataram1, int sectors, int count)
139 /* BufferRAM Sector Address */
140 bsa = sectors & ONENAND_BSA_MASK;
143 bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */
145 bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */
147 /* BufferRAM Sector Count */
148 bsc = count & ONENAND_BSC_MASK;
150 return ((bsa << ONENAND_BSA_SHIFT) | bsc);
154 * onenand_get_density - [DEFAULT] Get OneNAND density
155 * @param dev_id OneNAND device ID
157 * Get OneNAND density from device ID
159 static inline int onenand_get_density(int dev_id)
161 int density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
162 return (density & ONENAND_DEVICE_DENSITY_MASK);
166 * onenand_command - [DEFAULT] Send command to OneNAND device
167 * @param mtd MTD device structure
168 * @param cmd the command to be sent
169 * @param addr offset to read from or write to
170 * @param len number of bytes to read or write
172 * Send command to OneNAND device. This function is used for middle/large page
173 * devices (1KB/2KB Bytes per page)
175 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr,
178 struct onenand_chip *this = mtd->priv;
179 int value, readcmd = 0;
181 /* Now we use page size operation */
182 int sectors = 4, count = 4;
184 /* Address translation */
186 case ONENAND_CMD_UNLOCK:
187 case ONENAND_CMD_LOCK:
188 case ONENAND_CMD_LOCK_TIGHT:
189 case ONENAND_CMD_UNLOCK_ALL:
194 case ONENAND_CMD_ERASE:
195 case ONENAND_CMD_BUFFERRAM:
196 block = (int)(addr >> this->erase_shift);
201 block = (int)(addr >> this->erase_shift);
202 page = (int)(addr >> this->page_shift);
203 page &= this->page_mask;
207 /* NOTE: The setting order of the registers is very important! */
208 if (cmd == ONENAND_CMD_BUFFERRAM) {
209 /* Select DataRAM for DDP */
210 value = onenand_bufferram_address(this, block);
211 this->write_word(value,
212 this->base + ONENAND_REG_START_ADDRESS2);
214 /* Switch to the next data buffer */
215 ONENAND_SET_NEXT_BUFFERRAM(this);
221 /* Write 'DFS, FBA' of Flash */
222 value = onenand_block_address(this, block);
223 this->write_word(value,
224 this->base + ONENAND_REG_START_ADDRESS1);
226 /* Write 'DFS, FBA' of Flash */
227 value = onenand_bufferram_address(this, block);
228 this->write_word(value,
229 this->base + ONENAND_REG_START_ADDRESS2);
236 case ONENAND_CMD_READ:
237 case ONENAND_CMD_READOOB:
238 dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
243 dataram = ONENAND_CURRENT_BUFFERRAM(this);
247 /* Write 'FPA, FSA' of Flash */
248 value = onenand_page_address(page, sectors);
249 this->write_word(value,
250 this->base + ONENAND_REG_START_ADDRESS8);
252 /* Write 'BSA, BSC' of DataRAM */
253 value = onenand_buffer_address(dataram, sectors, count);
254 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
257 /* Interrupt clear */
258 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
260 this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
266 * onenand_wait - [DEFAULT] wait until the command is done
267 * @param mtd MTD device structure
268 * @param state state to select the max. timeout value
270 * Wait for command done. This applies to all OneNAND command
271 * Read can take up to 30us, erase up to 2ms and program up to 350us
272 * according to general OneNAND specs
274 static int onenand_wait(struct mtd_info *mtd, int state)
276 struct onenand_chip *this = mtd->priv;
277 unsigned int flags = ONENAND_INT_MASTER;
278 unsigned int interrupt = 0;
279 unsigned int ctrl, ecc;
282 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
283 if (interrupt & flags)
287 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
289 if (ctrl & ONENAND_CTRL_ERROR) {
290 printk("onenand_wait: controller error = 0x%04x\n", ctrl);
291 if (ctrl & ONENAND_CTRL_LOCK)
292 printk("onenand_wait: it's locked error = 0x%04x\n",
298 if (interrupt & ONENAND_INT_READ) {
299 ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
300 if (ecc & ONENAND_ECC_2BIT_ALL) {
301 MTDDEBUG (MTD_DEBUG_LEVEL0,
302 "onenand_wait: ECC error = 0x%04x\n", ecc);
311 * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
312 * @param mtd MTD data structure
313 * @param area BufferRAM area
314 * @return offset given area
316 * Return BufferRAM offset given area
318 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
320 struct onenand_chip *this = mtd->priv;
322 if (ONENAND_CURRENT_BUFFERRAM(this)) {
323 if (area == ONENAND_DATARAM)
324 return mtd->writesize;
325 if (area == ONENAND_SPARERAM)
333 * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
334 * @param mtd MTD data structure
335 * @param area BufferRAM area
336 * @param buffer the databuffer to put/get data
337 * @param offset offset to read from or write to
338 * @param count number of bytes to read/write
340 * Read the BufferRAM area
342 static int onenand_read_bufferram(struct mtd_info *mtd, loff_t addr, int area,
343 unsigned char *buffer, int offset,
346 struct onenand_chip *this = mtd->priv;
347 void __iomem *bufferram;
349 bufferram = this->base + area;
350 bufferram += onenand_bufferram_offset(mtd, area);
352 memcpy_16(buffer, bufferram + offset, count);
358 * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
359 * @param mtd MTD data structure
360 * @param area BufferRAM area
361 * @param buffer the databuffer to put/get data
362 * @param offset offset to read from or write to
363 * @param count number of bytes to read/write
365 * Read the BufferRAM area with Sync. Burst Mode
367 static int onenand_sync_read_bufferram(struct mtd_info *mtd, loff_t addr, int area,
368 unsigned char *buffer, int offset,
371 struct onenand_chip *this = mtd->priv;
372 void __iomem *bufferram;
374 bufferram = this->base + area;
375 bufferram += onenand_bufferram_offset(mtd, area);
377 this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
379 memcpy_16(buffer, bufferram + offset, count);
381 this->mmcontrol(mtd, 0);
387 * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
388 * @param mtd MTD data structure
389 * @param area BufferRAM area
390 * @param buffer the databuffer to put/get data
391 * @param offset offset to read from or write to
392 * @param count number of bytes to read/write
394 * Write the BufferRAM area
396 static int onenand_write_bufferram(struct mtd_info *mtd, loff_t addr, int area,
397 const unsigned char *buffer, int offset,
400 struct onenand_chip *this = mtd->priv;
401 void __iomem *bufferram;
403 bufferram = this->base + area;
404 bufferram += onenand_bufferram_offset(mtd, area);
406 memcpy_16(bufferram + offset, buffer, count);
412 * onenand_check_bufferram - [GENERIC] Check BufferRAM information
413 * @param mtd MTD data structure
414 * @param addr address to check
415 * @return 1 if there are valid data, otherwise 0
417 * Check bufferram if there is data we required
419 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
421 struct onenand_chip *this = mtd->priv;
422 int blockpage, found = 0;
425 #ifdef CONFIG_S3C64XX
429 if (ONENAND_IS_2PLANE(this))
430 blockpage = onenand_get_2x_blockpage(mtd, addr);
432 blockpage = (int) (addr >> this->page_shift);
434 /* Is there valid data? */
435 i = ONENAND_CURRENT_BUFFERRAM(this);
436 if (this->bufferram[i].blockpage == blockpage)
439 /* Check another BufferRAM */
440 i = ONENAND_NEXT_BUFFERRAM(this);
441 if (this->bufferram[i].blockpage == blockpage) {
442 ONENAND_SET_NEXT_BUFFERRAM(this);
447 if (found && ONENAND_IS_DDP(this)) {
448 /* Select DataRAM for DDP */
449 int block = (int) (addr >> this->erase_shift);
450 int value = onenand_bufferram_address(this, block);
451 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
458 * onenand_update_bufferram - [GENERIC] Update BufferRAM information
459 * @param mtd MTD data structure
460 * @param addr address to update
461 * @param valid valid flag
463 * Update BufferRAM information
465 static int onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
468 struct onenand_chip *this = mtd->priv;
472 if (ONENAND_IS_2PLANE(this))
473 blockpage = onenand_get_2x_blockpage(mtd, addr);
475 blockpage = (int)(addr >> this->page_shift);
477 /* Invalidate another BufferRAM */
478 i = ONENAND_NEXT_BUFFERRAM(this);
479 if (this->bufferram[i].blockpage == blockpage)
480 this->bufferram[i].blockpage = -1;
482 /* Update BufferRAM */
483 i = ONENAND_CURRENT_BUFFERRAM(this);
485 this->bufferram[i].blockpage = blockpage;
487 this->bufferram[i].blockpage = -1;
493 * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information
494 * @param mtd MTD data structure
495 * @param addr start address to invalidate
496 * @param len length to invalidate
498 * Invalidate BufferRAM information
500 static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr,
503 struct onenand_chip *this = mtd->priv;
505 loff_t end_addr = addr + len;
507 /* Invalidate BufferRAM */
508 for (i = 0; i < MAX_BUFFERRAM; i++) {
509 loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift;
511 if (buf_addr >= addr && buf_addr < end_addr)
512 this->bufferram[i].blockpage = -1;
517 * onenand_get_device - [GENERIC] Get chip for selected access
518 * @param mtd MTD device structure
519 * @param new_state the state which is requested
521 * Get the device and lock it for exclusive access
523 static void onenand_get_device(struct mtd_info *mtd, int new_state)
529 * onenand_release_device - [GENERIC] release chip
530 * @param mtd MTD device structure
532 * Deselect, release chip lock and wake up anyone waiting on the device
534 static void onenand_release_device(struct mtd_info *mtd)
540 * onenand_transfer_auto_oob - [Internal] oob auto-placement transfer
541 * @param mtd MTD device structure
542 * @param buf destination address
543 * @param column oob offset to read from
544 * @param thislen oob length to read
546 static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf,
547 int column, int thislen)
549 struct onenand_chip *this = mtd->priv;
550 struct nand_oobfree *free;
551 int readcol = column;
552 int readend = column + thislen;
555 uint8_t *oob_buf = this->oob_buf;
557 free = this->ecclayout->oobfree;
558 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
559 if (readcol >= lastgap)
560 readcol += free->offset - lastgap;
561 if (readend >= lastgap)
562 readend += free->offset - lastgap;
563 lastgap = free->offset + free->length;
565 this->read_bufferram(mtd, 0, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
566 free = this->ecclayout->oobfree;
567 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
568 int free_end = free->offset + free->length;
569 if (free->offset < readend && free_end > readcol) {
570 int st = max_t(int,free->offset,readcol);
571 int ed = min_t(int,free_end,readend);
573 memcpy(buf, oob_buf + st, n);
575 } else if (column == 0)
582 * onenand_read_ops_nolock - [OneNAND Interface] OneNAND read main and/or out-of-band
583 * @param mtd MTD device structure
584 * @param from offset to read from
585 * @param ops oob operation description structure
587 * OneNAND read main and/or out-of-band data
589 static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from,
590 struct mtd_oob_ops *ops)
592 struct onenand_chip *this = mtd->priv;
593 struct mtd_ecc_stats stats;
594 size_t len = ops->len;
595 size_t ooblen = ops->ooblen;
596 u_char *buf = ops->datbuf;
597 u_char *oobbuf = ops->oobbuf;
598 int read = 0, column, thislen;
599 int oobread = 0, oobcolumn, thisooblen, oobsize;
600 int ret = 0, boundary = 0;
601 int writesize = this->writesize;
603 MTDDEBUG(MTD_DEBUG_LEVEL3, "onenand_read_ops_nolock: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
605 if (ops->mode == MTD_OOB_AUTO)
606 oobsize = this->ecclayout->oobavail;
608 oobsize = mtd->oobsize;
610 oobcolumn = from & (mtd->oobsize - 1);
612 /* Do not allow reads past end of device */
613 if ((from + len) > mtd->size) {
614 printk(KERN_ERR "onenand_read_ops_nolock: Attempt read beyond end of device\n");
620 stats = mtd->ecc_stats;
622 /* Read-while-load method */
624 /* Do first load to bufferRAM */
626 if (!onenand_check_bufferram(mtd, from)) {
627 this->main_buf = buf;
628 this->command(mtd, ONENAND_CMD_READ, from, writesize);
629 ret = this->wait(mtd, FL_READING);
630 onenand_update_bufferram(mtd, from, !ret);
636 thislen = min_t(int, writesize, len - read);
637 column = from & (writesize - 1);
638 if (column + thislen > writesize)
639 thislen = writesize - column;
642 /* If there is more to load then start next load */
644 if (read + thislen < len) {
645 this->main_buf = buf + thislen;
646 this->command(mtd, ONENAND_CMD_READ, from, writesize);
648 * Chip boundary handling in DDP
649 * Now we issued chip 1 read and pointed chip 1
650 * bufferam so we have to point chip 0 bufferam.
652 if (ONENAND_IS_DDP(this) &&
653 unlikely(from == (this->chipsize >> 1))) {
654 this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
658 ONENAND_SET_PREV_BUFFERRAM(this);
661 /* While load is going, read from last bufferRAM */
662 this->read_bufferram(mtd, from - thislen, ONENAND_DATARAM, buf, column, thislen);
664 /* Read oob area if needed */
666 thisooblen = oobsize - oobcolumn;
667 thisooblen = min_t(int, thisooblen, ooblen - oobread);
669 if (ops->mode == MTD_OOB_AUTO)
670 onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
672 this->read_bufferram(mtd, 0, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
673 oobread += thisooblen;
674 oobbuf += thisooblen;
678 /* See if we are done */
682 /* Set up for next read from bufferRAM */
683 if (unlikely(boundary))
684 this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
685 ONENAND_SET_NEXT_BUFFERRAM(this);
687 thislen = min_t(int, writesize, len - read);
690 /* Now wait for load */
691 ret = this->wait(mtd, FL_READING);
692 onenand_update_bufferram(mtd, from, !ret);
698 * Return success, if no ECC failures, else -EBADMSG
699 * fs driver will take care of that, because
700 * retlen == desired len and result == -EBADMSG
703 ops->oobretlen = oobread;
708 if (mtd->ecc_stats.failed - stats.failed)
711 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
715 * onenand_read_oob_nolock - [MTD Interface] OneNAND read out-of-band
716 * @param mtd MTD device structure
717 * @param from offset to read from
718 * @param ops oob operation description structure
720 * OneNAND read out-of-band data from the spare area
722 static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from,
723 struct mtd_oob_ops *ops)
725 struct onenand_chip *this = mtd->priv;
726 struct mtd_ecc_stats stats;
727 int read = 0, thislen, column, oobsize;
728 size_t len = ops->ooblen;
729 mtd_oob_mode_t mode = ops->mode;
730 u_char *buf = ops->oobbuf;
733 from += ops->ooboffs;
735 MTDDEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob_nolock: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
737 /* Initialize return length value */
740 if (mode == MTD_OOB_AUTO)
741 oobsize = this->ecclayout->oobavail;
743 oobsize = mtd->oobsize;
745 column = from & (mtd->oobsize - 1);
747 if (unlikely(column >= oobsize)) {
748 printk(KERN_ERR "onenand_read_oob_nolock: Attempted to start read outside oob\n");
752 /* Do not allow reads past end of device */
753 if (unlikely(from >= mtd->size ||
754 column + len > ((mtd->size >> this->page_shift) -
755 (from >> this->page_shift)) * oobsize)) {
756 printk(KERN_ERR "onenand_read_oob_nolock: Attempted to read beyond end of device\n");
760 stats = mtd->ecc_stats;
763 thislen = oobsize - column;
764 thislen = min_t(int, thislen, len);
766 this->spare_buf = buf;
767 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
769 onenand_update_bufferram(mtd, from, 0);
771 ret = this->wait(mtd, FL_READING);
772 if (ret && ret != -EBADMSG) {
773 printk(KERN_ERR "onenand_read_oob_nolock: read failed = 0x%x\n", ret);
777 if (mode == MTD_OOB_AUTO)
778 onenand_transfer_auto_oob(mtd, buf, column, thislen);
780 this->read_bufferram(mtd, 0, ONENAND_SPARERAM, buf, column, thislen);
792 from += mtd->writesize;
797 ops->oobretlen = read;
802 if (mtd->ecc_stats.failed - stats.failed)
809 * onenand_read - [MTD Interface] MTD compability function for onenand_read_ecc
810 * @param mtd MTD device structure
811 * @param from offset to read from
812 * @param len number of bytes to read
813 * @param retlen pointer to variable to store the number of read bytes
814 * @param buf the databuffer to put data
816 * This function simply calls onenand_read_ecc with oob buffer and oobsel = NULL
818 int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
819 size_t * retlen, u_char * buf)
821 struct mtd_oob_ops ops = {
829 onenand_get_device(mtd, FL_READING);
830 ret = onenand_read_ops_nolock(mtd, from, &ops);
831 onenand_release_device(mtd);
833 *retlen = ops.retlen;
838 * onenand_read_oob - [MTD Interface] OneNAND read out-of-band
839 * @param mtd MTD device structure
840 * @param from offset to read from
841 * @param ops oob operations description structure
843 * OneNAND main and/or out-of-band
845 int onenand_read_oob(struct mtd_info *mtd, loff_t from,
846 struct mtd_oob_ops *ops)
855 /* Not implemented yet */
860 onenand_get_device(mtd, FL_READING);
862 ret = onenand_read_ops_nolock(mtd, from, ops);
864 ret = onenand_read_oob_nolock(mtd, from, ops);
865 onenand_release_device(mtd);
871 * onenand_bbt_wait - [DEFAULT] wait until the command is done
872 * @param mtd MTD device structure
873 * @param state state to select the max. timeout value
875 * Wait for command done.
877 static int onenand_bbt_wait(struct mtd_info *mtd, int state)
879 struct onenand_chip *this = mtd->priv;
880 unsigned int flags = ONENAND_INT_MASTER;
881 unsigned int interrupt;
885 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
886 if (interrupt & flags)
890 /* To get correct interrupt status in timeout case */
891 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
892 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
894 if (interrupt & ONENAND_INT_READ) {
895 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
896 if (ecc & ONENAND_ECC_2BIT_ALL)
897 return ONENAND_BBT_READ_ERROR;
899 printk(KERN_ERR "onenand_bbt_wait: read timeout!"
900 "ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
901 return ONENAND_BBT_READ_FATAL_ERROR;
904 /* Initial bad block case: 0x2400 or 0x0400 */
905 if (ctrl & ONENAND_CTRL_ERROR) {
906 printk(KERN_DEBUG "onenand_bbt_wait: controller error = 0x%04x\n", ctrl);
907 return ONENAND_BBT_READ_ERROR;
914 * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan
915 * @param mtd MTD device structure
916 * @param from offset to read from
917 * @param ops oob operation description structure
919 * OneNAND read out-of-band data from the spare area for bbt scan
921 int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,
922 struct mtd_oob_ops *ops)
924 struct onenand_chip *this = mtd->priv;
925 int read = 0, thislen, column;
927 size_t len = ops->ooblen;
928 u_char *buf = ops->oobbuf;
930 MTDDEBUG(MTD_DEBUG_LEVEL3, "onenand_bbt_read_oob: from = 0x%08x, len = %zi\n", (unsigned int) from, len);
932 /* Initialize return value */
935 /* Do not allow reads past end of device */
936 if (unlikely((from + len) > mtd->size)) {
937 printk(KERN_ERR "onenand_bbt_read_oob: Attempt read beyond end of device\n");
938 return ONENAND_BBT_READ_FATAL_ERROR;
941 /* Grab the lock and see if the device is available */
942 onenand_get_device(mtd, FL_READING);
944 column = from & (mtd->oobsize - 1);
948 thislen = mtd->oobsize - column;
949 thislen = min_t(int, thislen, len);
951 this->spare_buf = buf;
952 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
954 onenand_update_bufferram(mtd, from, 0);
956 ret = this->bbt_wait(mtd, FL_READING);
960 this->read_spareram(mtd, 0, ONENAND_SPARERAM, buf, column, thislen);
969 /* Update Page size */
970 from += this->writesize;
975 /* Deselect and wake up anyone waiting on the device */
976 onenand_release_device(mtd);
978 ops->oobretlen = read;
983 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
985 * onenand_verify_oob - [GENERIC] verify the oob contents after a write
986 * @param mtd MTD device structure
987 * @param buf the databuffer to verify
988 * @param to offset to read from
990 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to)
992 struct onenand_chip *this = mtd->priv;
993 u_char *oob_buf = this->oob_buf;
996 this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize);
997 onenand_update_bufferram(mtd, to, 0);
998 status = this->wait(mtd, FL_READING);
1002 this->read_bufferram(mtd, 0, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
1003 for (i = 0; i < mtd->oobsize; i++)
1004 if (buf[i] != 0xFF && buf[i] != oob_buf[i])
1011 * onenand_verify - [GENERIC] verify the chip contents after a write
1012 * @param mtd MTD device structure
1013 * @param buf the databuffer to verify
1014 * @param addr offset to read from
1015 * @param len number of bytes to read and compare
1017 static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)
1019 struct onenand_chip *this = mtd->priv;
1020 void __iomem *dataram;
1022 int thislen, column;
1025 thislen = min_t(int, this->writesize, len);
1026 column = addr & (this->writesize - 1);
1027 if (column + thislen > this->writesize)
1028 thislen = this->writesize - column;
1030 this->command(mtd, ONENAND_CMD_READ, addr, this->writesize);
1032 onenand_update_bufferram(mtd, addr, 0);
1034 ret = this->wait(mtd, FL_READING);
1038 onenand_update_bufferram(mtd, addr, 1);
1040 dataram = this->base + ONENAND_DATARAM;
1041 dataram += onenand_bufferram_offset(mtd, ONENAND_DATARAM);
1043 if (memcmp(buf, dataram + column, thislen))
1054 #define onenand_verify(...) (0)
1055 #define onenand_verify_oob(...) (0)
1058 #define NOTALIGNED(x) ((x & (mtd->writesize - 1)) != 0)
1061 * onenand_fill_auto_oob - [Internal] oob auto-placement transfer
1062 * @param mtd MTD device structure
1063 * @param oob_buf oob buffer
1064 * @param buf source address
1065 * @param column oob offset to write to
1066 * @param thislen oob length to write
1068 static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf,
1069 const u_char *buf, int column, int thislen)
1071 struct onenand_chip *this = mtd->priv;
1072 struct nand_oobfree *free;
1073 int writecol = column;
1074 int writeend = column + thislen;
1078 free = this->ecclayout->oobfree;
1079 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1080 if (writecol >= lastgap)
1081 writecol += free->offset - lastgap;
1082 if (writeend >= lastgap)
1083 writeend += free->offset - lastgap;
1084 lastgap = free->offset + free->length;
1086 free = this->ecclayout->oobfree;
1087 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1088 int free_end = free->offset + free->length;
1089 if (free->offset < writeend && free_end > writecol) {
1090 int st = max_t(int,free->offset,writecol);
1091 int ed = min_t(int,free_end,writeend);
1093 memcpy(oob_buf + st, buf, n);
1095 } else if (column == 0)
1102 * onenand_write_ops_nolock - [OneNAND Interface] write main and/or out-of-band
1103 * @param mtd MTD device structure
1104 * @param to offset to write to
1105 * @param ops oob operation description structure
1107 * Write main and/or oob with ECC
1109 static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to,
1110 struct mtd_oob_ops *ops)
1112 struct onenand_chip *this = mtd->priv;
1113 int written = 0, column, thislen, subpage;
1114 int oobwritten = 0, oobcolumn, thisooblen, oobsize;
1115 size_t len = ops->len;
1116 size_t ooblen = ops->ooblen;
1117 const u_char *buf = ops->datbuf;
1118 const u_char *oob = ops->oobbuf;
1122 MTDDEBUG(MTD_DEBUG_LEVEL3, "onenand_write_ops_nolock: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1124 /* Initialize retlen, in case of early exit */
1128 /* Do not allow writes past end of device */
1129 if (unlikely((to + len) > mtd->size)) {
1130 printk(KERN_ERR "onenand_write_ops_nolock: Attempt write to past end of device\n");
1134 /* Reject writes, which are not page aligned */
1135 if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
1136 printk(KERN_ERR "onenand_write_ops_nolock: Attempt to write not page aligned data\n");
1140 if (ops->mode == MTD_OOB_AUTO)
1141 oobsize = this->ecclayout->oobavail;
1143 oobsize = mtd->oobsize;
1145 oobcolumn = to & (mtd->oobsize - 1);
1147 column = to & (mtd->writesize - 1);
1149 /* Loop until all data write */
1150 while (written < len) {
1151 u_char *wbuf = (u_char *) buf;
1153 thislen = min_t(int, mtd->writesize - column, len - written);
1154 thisooblen = min_t(int, oobsize - oobcolumn, ooblen - oobwritten);
1156 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1158 /* Partial page write */
1159 subpage = thislen < mtd->writesize;
1161 memset(this->page_buf, 0xff, mtd->writesize);
1162 memcpy(this->page_buf + column, buf, thislen);
1163 wbuf = this->page_buf;
1166 this->write_bufferram(mtd, to, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1169 oobbuf = this->oob_buf;
1171 /* We send data to spare ram with oobsize
1172 * * to prevent byte access */
1173 memset(oobbuf, 0xff, mtd->oobsize);
1174 if (ops->mode == MTD_OOB_AUTO)
1175 onenand_fill_auto_oob(mtd, oobbuf, oob, oobcolumn, thisooblen);
1177 memcpy(oobbuf + oobcolumn, oob, thisooblen);
1179 oobwritten += thisooblen;
1183 oobbuf = (u_char *) ffchars;
1185 this->write_bufferram(mtd, 0, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1187 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1189 ret = this->wait(mtd, FL_WRITING);
1191 /* In partial page write we don't update bufferram */
1192 onenand_update_bufferram(mtd, to, !ret && !subpage);
1193 if (ONENAND_IS_2PLANE(this)) {
1194 ONENAND_SET_BUFFERRAM1(this);
1195 onenand_update_bufferram(mtd, to + this->writesize, !ret && !subpage);
1199 printk(KERN_ERR "onenand_write_ops_nolock: write filaed %d\n", ret);
1203 /* Only check verify write turn on */
1204 ret = onenand_verify(mtd, buf, to, thislen);
1206 printk(KERN_ERR "onenand_write_ops_nolock: verify failed %d\n", ret);
1220 ops->retlen = written;
1226 * onenand_write_oob_nolock - [Internal] OneNAND write out-of-band
1227 * @param mtd MTD device structure
1228 * @param to offset to write to
1229 * @param len number of bytes to write
1230 * @param retlen pointer to variable to store the number of written bytes
1231 * @param buf the data to write
1232 * @param mode operation mode
1234 * OneNAND write out-of-band
1236 static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to,
1237 struct mtd_oob_ops *ops)
1239 struct onenand_chip *this = mtd->priv;
1240 int column, ret = 0, oobsize;
1243 size_t len = ops->ooblen;
1244 const u_char *buf = ops->oobbuf;
1245 mtd_oob_mode_t mode = ops->mode;
1249 MTDDEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob_nolock: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1251 /* Initialize retlen, in case of early exit */
1254 if (mode == MTD_OOB_AUTO)
1255 oobsize = this->ecclayout->oobavail;
1257 oobsize = mtd->oobsize;
1259 column = to & (mtd->oobsize - 1);
1261 if (unlikely(column >= oobsize)) {
1262 printk(KERN_ERR "onenand_write_oob_nolock: Attempted to start write outside oob\n");
1266 /* For compatibility with NAND: Do not allow write past end of page */
1267 if (unlikely(column + len > oobsize)) {
1268 printk(KERN_ERR "onenand_write_oob_nolock: "
1269 "Attempt to write past end of page\n");
1273 /* Do not allow reads past end of device */
1274 if (unlikely(to >= mtd->size ||
1275 column + len > ((mtd->size >> this->page_shift) -
1276 (to >> this->page_shift)) * oobsize)) {
1277 printk(KERN_ERR "onenand_write_oob_nolock: Attempted to write past end of device\n");
1281 oobbuf = this->oob_buf;
1283 /* Loop until all data write */
1284 while (written < len) {
1285 int thislen = min_t(int, oobsize, len - written);
1287 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
1289 /* We send data to spare ram with oobsize
1290 * to prevent byte access */
1291 memset(oobbuf, 0xff, mtd->oobsize);
1292 if (mode == MTD_OOB_AUTO)
1293 onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen);
1295 memcpy(oobbuf + column, buf, thislen);
1296 this->write_bufferram(mtd, 0, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1298 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
1300 onenand_update_bufferram(mtd, to, 0);
1301 if (ONENAND_IS_2PLANE(this)) {
1302 ONENAND_SET_BUFFERRAM1(this);
1303 onenand_update_bufferram(mtd, to + this->writesize, 0);
1306 ret = this->wait(mtd, FL_WRITING);
1308 printk(KERN_ERR "onenand_write_oob_nolock: write failed %d\n", ret);
1312 ret = onenand_verify_oob(mtd, oobbuf, to);
1314 printk(KERN_ERR "onenand_write_oob_nolock: verify failed %d\n", ret);
1322 to += mtd->writesize;
1327 ops->oobretlen = written;
1333 * onenand_write - [MTD Interface] compability function for onenand_write_ecc
1334 * @param mtd MTD device structure
1335 * @param to offset to write to
1336 * @param len number of bytes to write
1337 * @param retlen pointer to variable to store the number of written bytes
1338 * @param buf the data to write
1342 int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
1343 size_t * retlen, const u_char * buf)
1345 struct mtd_oob_ops ops = {
1348 .datbuf = (u_char *) buf,
1353 onenand_get_device(mtd, FL_WRITING);
1354 ret = onenand_write_ops_nolock(mtd, to, &ops);
1355 onenand_release_device(mtd);
1357 *retlen = ops.retlen;
1362 * onenand_write_oob - [MTD Interface] OneNAND write out-of-band
1363 * @param mtd MTD device structure
1364 * @param to offset to write to
1365 * @param ops oob operation description structure
1367 * OneNAND write main and/or out-of-band
1369 int onenand_write_oob(struct mtd_info *mtd, loff_t to,
1370 struct mtd_oob_ops *ops)
1374 switch (ops->mode) {
1379 /* Not implemented yet */
1384 onenand_get_device(mtd, FL_WRITING);
1386 ret = onenand_write_ops_nolock(mtd, to, ops);
1388 ret = onenand_write_oob_nolock(mtd, to, ops);
1389 onenand_release_device(mtd);
1396 * onenand_block_isbad_nolock - [GENERIC] Check if a block is marked bad
1397 * @param mtd MTD device structure
1398 * @param ofs offset from device start
1399 * @param allowbbt 1, if its allowed to access the bbt area
1401 * Check, if the block is bad, Either by reading the bad block table or
1402 * calling of the scan function.
1404 static int onenand_block_isbad_nolock(struct mtd_info *mtd, loff_t ofs, int allowbbt)
1406 struct onenand_chip *this = mtd->priv;
1407 struct bbm_info *bbm = this->bbm;
1409 /* Return info from the table */
1410 return bbm->isbad_bbt(mtd, ofs, allowbbt);
1415 * onenand_erase - [MTD Interface] erase block(s)
1416 * @param mtd MTD device structure
1417 * @param instr erase instruction
1419 * Erase one ore more blocks
1421 int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1423 struct onenand_chip *this = mtd->priv;
1424 unsigned int block_size;
1429 MTDDEBUG (MTD_DEBUG_LEVEL3,
1430 "onenand_erase: start = 0x%08x, len = %i\n",
1431 (unsigned int)instr->addr, (unsigned int)instr->len);
1433 block_size = (1 << this->erase_shift);
1435 /* Start address must align on block boundary */
1436 if (unlikely(instr->addr & (block_size - 1))) {
1437 MTDDEBUG (MTD_DEBUG_LEVEL0,
1438 "onenand_erase: Unaligned address\n");
1442 /* Length must align on block boundary */
1443 if (unlikely(instr->len & (block_size - 1))) {
1444 MTDDEBUG (MTD_DEBUG_LEVEL0,
1445 "onenand_erase: Length not block aligned\n");
1449 /* Do not allow erase past end of device */
1450 if (unlikely((instr->len + instr->addr) > mtd->size)) {
1451 MTDDEBUG (MTD_DEBUG_LEVEL0,
1452 "onenand_erase: Erase past end of device\n");
1456 instr->fail_addr = 0xffffffff;
1458 /* Grab the lock and see if the device is available */
1459 onenand_get_device(mtd, FL_ERASING);
1461 /* Loop throught the pages */
1465 instr->state = MTD_ERASING;
1469 /* Check if we have a bad block, we do not erase bad blocks */
1470 if (instr->priv == 0 && onenand_block_isbad_nolock(mtd, addr, 0)) {
1471 printk(KERN_WARNING "onenand_erase: attempt to erase"
1472 " a bad block at addr 0x%08x\n",
1473 (unsigned int) addr);
1474 instr->state = MTD_ERASE_FAILED;
1478 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1480 onenand_invalidate_bufferram(mtd, addr, block_size);
1482 ret = this->wait(mtd, FL_ERASING);
1483 /* Check, if it is write protected */
1486 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_erase: "
1487 "Device is write protected!!!\n");
1489 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_erase: "
1490 "Failed erase, block %d\n",
1491 (unsigned)(addr >> this->erase_shift));
1493 printk("onenand_erase: "
1494 "Device is write protected!!!\n");
1496 printk("onenand_erase: "
1497 "Failed erase, block %d\n",
1498 (unsigned)(addr >> this->erase_shift));
1499 instr->state = MTD_ERASE_FAILED;
1500 instr->fail_addr = addr;
1509 instr->state = MTD_ERASE_DONE;
1513 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1514 /* Do call back function */
1516 mtd_erase_callback(instr);
1518 /* Deselect and wake up anyone waiting on the device */
1519 onenand_release_device(mtd);
1525 * onenand_sync - [MTD Interface] sync
1526 * @param mtd MTD device structure
1528 * Sync is actually a wait for chip ready function
1530 void onenand_sync(struct mtd_info *mtd)
1532 MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1534 /* Grab the lock and see if the device is available */
1535 onenand_get_device(mtd, FL_SYNCING);
1537 /* Release it and go back */
1538 onenand_release_device(mtd);
1542 * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1543 * @param mtd MTD device structure
1544 * @param ofs offset relative to mtd start
1546 * Check whether the block is bad
1548 int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1552 /* Check for invalid offset */
1553 if (ofs > mtd->size)
1556 onenand_get_device(mtd, FL_READING);
1557 ret = onenand_block_isbad_nolock(mtd,ofs, 0);
1558 onenand_release_device(mtd);
1563 * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1564 * @param mtd MTD device structure
1565 * @param ofs offset relative to mtd start
1567 * Mark the block as bad
1569 int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1571 struct onenand_chip *this = mtd->priv;
1574 ret = onenand_block_isbad(mtd, ofs);
1576 /* If it was bad already, return success and do nothing */
1582 ret = this->block_markbad(mtd, ofs);
1587 * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
1588 * @param mtd MTD device structure
1589 * @param ofs offset relative to mtd start
1590 * @param len number of bytes to lock or unlock
1591 * @param cmd lock or unlock command
1593 * Lock or unlock one or more blocks
1595 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
1597 struct onenand_chip *this = mtd->priv;
1598 int start, end, block, value, status;
1601 start = ofs >> this->erase_shift;
1602 end = len >> this->erase_shift;
1604 if (cmd == ONENAND_CMD_LOCK)
1605 wp_status_mask = ONENAND_WP_LS;
1607 wp_status_mask = ONENAND_WP_US;
1609 /* Continuous lock scheme */
1610 if (this->options & ONENAND_HAS_CONT_LOCK) {
1611 /* Set start block address */
1612 this->write_word(start,
1613 this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1614 /* Set end block address */
1615 this->write_word(end - 1,
1616 this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1617 /* Write unlock command */
1618 this->command(mtd, cmd, 0, 0);
1620 /* There's no return value */
1621 this->wait(mtd, FL_UNLOCKING);
1624 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1625 & ONENAND_CTRL_ONGO)
1628 /* Check lock status */
1629 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1630 if (!(status & ONENAND_WP_US))
1631 printk(KERN_ERR "wp status = 0x%x\n", status);
1636 /* Block lock scheme */
1637 for (block = start; block < start + end; block++) {
1638 /* Set block address */
1639 value = onenand_block_address(this, block);
1640 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1641 /* Select DataRAM for DDP */
1642 value = onenand_bufferram_address(this, block);
1643 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1645 /* Set start block address */
1646 this->write_word(block,
1647 this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1648 /* Write unlock command */
1649 this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0);
1651 /* There's no return value */
1652 this->wait(mtd, FL_UNLOCKING);
1655 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1656 & ONENAND_CTRL_ONGO)
1659 /* Check lock status */
1660 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1661 if (!(status & ONENAND_WP_US))
1662 printk(KERN_ERR "block = %d, wp status = 0x%x\n",
1670 * onenand_lock - [MTD Interface] Lock block(s)
1671 * @param mtd MTD device structure
1672 * @param ofs offset relative to mtd start
1673 * @param len number of bytes to unlock
1675 * Lock one or more blocks
1677 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
1681 onenand_get_device(mtd, FL_LOCKING);
1682 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
1683 onenand_release_device(mtd);
1688 * onenand_unlock - [MTD Interface] Unlock block(s)
1689 * @param mtd MTD device structure
1690 * @param ofs offset relative to mtd start
1691 * @param len number of bytes to unlock
1693 * Unlock one or more blocks
1695 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1699 onenand_get_device(mtd, FL_LOCKING);
1700 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
1701 onenand_release_device(mtd);
1706 * onenand_check_lock_status - [OneNAND Interface] Check lock status
1707 * @param this onenand chip data structure
1711 static int onenand_check_lock_status(struct onenand_chip *this)
1713 unsigned int value, block, status;
1716 end = this->chipsize >> this->erase_shift;
1717 for (block = 0; block < end; block++) {
1718 /* Set block address */
1719 value = onenand_block_address(this, block);
1720 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1721 /* Select DataRAM for DDP */
1722 value = onenand_bufferram_address(this, block);
1723 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1724 /* Set start block address */
1725 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1727 /* Check lock status */
1728 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1729 if (!(status & ONENAND_WP_US)) {
1730 printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1739 * onenand_unlock_all - [OneNAND Interface] unlock all blocks
1740 * @param mtd MTD device structure
1744 static void onenand_unlock_all(struct mtd_info *mtd)
1746 struct onenand_chip *this = mtd->priv;
1748 size_t len = this->chipsize;
1750 if (this->options & ONENAND_HAS_UNLOCK_ALL) {
1751 /* Set start block address */
1752 this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1753 /* Write unlock command */
1754 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
1756 /* There's no return value */
1757 this->wait(mtd, FL_LOCKING);
1760 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1761 & ONENAND_CTRL_ONGO)
1766 /* Check lock status */
1767 if (onenand_check_lock_status(this))
1770 /* Workaround for all block unlock in DDP */
1771 if (ONENAND_IS_DDP(this)) {
1772 /* All blocks on another chip */
1773 ofs = this->chipsize >> 1;
1774 len = this->chipsize >> 1;
1778 onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
1783 * onenand_check_features - Check and set OneNAND features
1784 * @param mtd MTD data structure
1786 * Check and set OneNAND features
1790 static void onenand_check_features(struct mtd_info *mtd)
1792 struct onenand_chip *this = mtd->priv;
1793 unsigned int density, process;
1795 /* Lock scheme depends on density and process */
1796 density = onenand_get_density(this->device_id);
1797 process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
1801 case ONENAND_DEVICE_DENSITY_4Gb:
1802 this->options |= ONENAND_HAS_2PLANE;
1804 case ONENAND_DEVICE_DENSITY_2Gb:
1805 /* 2Gb DDP don't have 2 plane */
1806 if (!ONENAND_IS_DDP(this))
1807 this->options |= ONENAND_HAS_2PLANE;
1808 this->options |= ONENAND_HAS_UNLOCK_ALL;
1810 case ONENAND_DEVICE_DENSITY_1Gb:
1811 /* A-Die has all block unlock */
1813 this->options |= ONENAND_HAS_UNLOCK_ALL;
1817 /* Some OneNAND has continuous lock scheme */
1819 this->options |= ONENAND_HAS_CONT_LOCK;
1823 if (this->options & ONENAND_HAS_CONT_LOCK)
1824 printk(KERN_DEBUG "Lock scheme is Continuous Lock\n");
1825 if (this->options & ONENAND_HAS_UNLOCK_ALL)
1826 printk(KERN_DEBUG "Chip support all block unlock\n");
1827 if (this->options & ONENAND_HAS_2PLANE)
1828 printk(KERN_DEBUG "Chip has 2 plane\n");
1832 * onenand_print_device_info - Print device ID
1833 * @param device device ID
1837 char *onenand_print_device_info(int device, int version)
1839 int vcc, demuxed, ddp, density;
1840 char *dev_info = malloc(80);
1843 vcc = device & ONENAND_DEVICE_VCC_MASK;
1844 demuxed = device & ONENAND_DEVICE_IS_DEMUX;
1845 ddp = device & ONENAND_DEVICE_IS_DDP;
1846 density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
1847 p += sprintf(dev_info, "%sOneNAND%s %dMB %sV 16-bit (0x%02x)",
1848 demuxed ? "" : "Muxed ",
1850 (16 << density), vcc ? "2.65/3.3" : "1.8", device);
1852 sprintf(p, "\nOneNAND version = 0x%04x", version);
1853 printk("%s\n", dev_info);
1858 static const struct onenand_manufacturers onenand_manuf_ids[] = {
1859 {ONENAND_MFR_SAMSUNG, "Samsung"},
1863 * onenand_check_maf - Check manufacturer ID
1864 * @param manuf manufacturer ID
1866 * Check manufacturer ID
1868 static int onenand_check_maf(int manuf)
1870 int size = ARRAY_SIZE(onenand_manuf_ids);
1874 for (i = 0; size; i++)
1875 if (manuf == onenand_manuf_ids[i].id)
1879 name = onenand_manuf_ids[i].name;
1883 #ifdef ONENAND_DEBUG
1884 printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
1891 * onenand_probe - [OneNAND Interface] Probe the OneNAND device
1892 * @param mtd MTD device structure
1894 * OneNAND detection method:
1895 * Compare the the values from command with ones from register
1897 static int onenand_probe(struct mtd_info *mtd)
1899 struct onenand_chip *this = mtd->priv;
1900 int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
1904 /* Save system configuration 1 */
1905 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
1906 /* Clear Sync. Burst Read mode to read BootRAM */
1907 this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ), this->base + ONENAND_REG_SYS_CFG1);
1909 /* Send the command for reading device ID from BootRAM */
1910 this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
1912 /* Read manufacturer and device IDs from BootRAM */
1913 bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
1914 bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
1916 /* Reset OneNAND to read default register values */
1917 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
1920 this->wait(mtd, FL_RESETING);
1922 /* Restore system configuration 1 */
1923 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
1925 /* Check manufacturer ID */
1926 if (onenand_check_maf(bram_maf_id))
1929 /* Read manufacturer and device IDs from Register */
1930 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
1931 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
1932 ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
1934 /* Check OneNAND device */
1935 if (maf_id != bram_maf_id || dev_id != bram_dev_id)
1938 /* FIXME : Current OneNAND MTD doesn't support Flex-OneNAND */
1939 if (dev_id & (1 << 9)) {
1940 printk("Not yet support Flex-OneNAND\n");
1944 /* Flash device information */
1945 mtd->name = onenand_print_device_info(dev_id, ver_id);
1946 this->device_id = dev_id;
1948 density = onenand_get_density(dev_id);
1949 this->chipsize = (16 << density) << 20;
1950 /* Set density mask. it is used for DDP */
1951 if (ONENAND_IS_DDP(this))
1952 this->density_mask = (1 << (density + 6));
1954 this->density_mask = 0;
1956 /* OneNAND page size & block size */
1957 /* The data buffer size is equal to page size */
1959 this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
1960 mtd->oobsize = mtd->writesize >> 5;
1961 /* Pagers per block is always 64 in OneNAND */
1962 mtd->erasesize = mtd->writesize << 6;
1964 this->erase_shift = ffs(mtd->erasesize) - 1;
1965 this->page_shift = ffs(mtd->writesize) - 1;
1966 this->ppb_shift = (this->erase_shift - this->page_shift);
1967 this->page_mask = (mtd->erasesize / mtd->writesize) - 1;
1968 /* It's real page size */
1969 this->writesize = mtd->writesize;
1971 /* REVIST: Multichip handling */
1973 mtd->size = this->chipsize;
1975 /* Check OneNAND features */
1976 onenand_check_features(mtd);
1978 mtd->flags = MTD_CAP_NANDFLASH;
1979 mtd->erase = onenand_erase;
1980 mtd->read = onenand_read;
1981 mtd->write = onenand_write;
1982 mtd->read_oob = onenand_read_oob;
1983 mtd->write_oob = onenand_write_oob;
1984 mtd->sync = onenand_sync;
1985 mtd->block_isbad = onenand_block_isbad;
1986 mtd->block_markbad = onenand_block_markbad;
1992 * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
1993 * @param mtd MTD device structure
1994 * @param maxchips Number of chips to scan for
1996 * This fills out all the not initialized function pointers
1997 * with the defaults.
1998 * The flash ID is read and the mtd/chip structures are
1999 * filled with the appropriate values.
2001 int onenand_scan(struct mtd_info *mtd, int maxchips)
2003 struct onenand_chip *this = mtd->priv;
2005 if (!this->read_word)
2006 this->read_word = onenand_readw;
2007 if (!this->write_word)
2008 this->write_word = onenand_writew;
2011 this->command = onenand_command;
2013 this->wait = onenand_wait;
2014 if (!this->bbt_wait)
2015 this->bbt_wait = onenand_bbt_wait;
2017 if (!this->read_bufferram)
2018 this->read_bufferram = onenand_read_bufferram;
2019 if (!this->read_spareram)
2020 this->read_spareram = onenand_read_bufferram;
2021 if (!this->write_bufferram)
2022 this->write_bufferram = onenand_write_bufferram;
2024 if (!this->scan_bbt)
2025 this->scan_bbt = onenand_default_bbt;
2027 if (onenand_probe(mtd))
2030 /* Set Sync. Burst Read after probing */
2031 if (this->mmcontrol) {
2032 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
2033 this->read_bufferram = onenand_sync_read_bufferram;
2036 /* Allocate buffers, if necessary */
2037 if (!this->page_buf) {
2038 this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL);
2039 if (!this->page_buf) {
2040 printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
2043 this->options |= ONENAND_PAGEBUF_ALLOC;
2045 if (!this->oob_buf) {
2046 this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL);
2047 if (!this->oob_buf) {
2048 printk(KERN_ERR "onenand_scan: Can't allocate oob_buf\n");
2049 if (this->options & ONENAND_PAGEBUF_ALLOC) {
2050 this->options &= ~ONENAND_PAGEBUF_ALLOC;
2051 kfree(this->page_buf);
2055 this->options |= ONENAND_OOBBUF_ALLOC;
2058 /* Unlock whole block */
2059 onenand_unlock_all(mtd);
2061 return this->scan_bbt(mtd);
2065 * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
2066 * @param mtd MTD device structure
2068 void onenand_release(struct mtd_info *mtd)