2 * linux/drivers/mtd/onenand/onenand_base.c
4 * Copyright (C) 2005-2007 Samsung Electronics
5 * Kyungmin Park <kyungmin.park@samsung.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
14 #ifdef CONFIG_CMD_ONENAND
16 #include <linux/mtd/compat.h>
17 #include <linux/mtd/mtd.h>
18 #include <linux/mtd/onenand.h>
21 #include <asm/errno.h>
23 /* It should access 16-bit instead of 8-bit */
24 static inline void *memcpy_16(void *dst, const void *src, unsigned int len)
36 static const unsigned char ffchars[] = {
37 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
38 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
39 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
40 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
41 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
42 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
43 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
44 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
48 * onenand_readw - [OneNAND Interface] Read OneNAND register
49 * @param addr address to read
51 * Read OneNAND register
53 static unsigned short onenand_readw(void __iomem * addr)
59 * onenand_writew - [OneNAND Interface] Write OneNAND register with value
60 * @param value value to write
61 * @param addr address to write
63 * Write OneNAND register with value
65 static void onenand_writew(unsigned short value, void __iomem * addr)
71 * onenand_block_address - [DEFAULT] Get block address
72 * @param device the device id
73 * @param block the block
74 * @return translated block address if DDP, otherwise same
76 * Setup Start Address 1 Register (F100h)
78 static int onenand_block_address(int device, int block)
80 if (device & ONENAND_DEVICE_IS_DDP) {
81 /* Device Flash Core select, NAND Flash Block Address */
82 int dfs = 0, density, mask;
84 density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
85 mask = (1 << (density + 6));
90 return (dfs << ONENAND_DDP_SHIFT) | (block & (mask - 1));
97 * onenand_bufferram_address - [DEFAULT] Get bufferram address
98 * @param device the device id
99 * @param block the block
100 * @return set DBS value if DDP, otherwise 0
102 * Setup Start Address 2 Register (F101h) for DDP
104 static int onenand_bufferram_address(int device, int block)
106 if (device & ONENAND_DEVICE_IS_DDP) {
107 /* Device BufferRAM Select */
108 int dbs = 0, density, mask;
110 density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
111 mask = (1 << (density + 6));
116 return (dbs << ONENAND_DDP_SHIFT);
123 * onenand_page_address - [DEFAULT] Get page address
124 * @param page the page address
125 * @param sector the sector address
126 * @return combined page and sector address
128 * Setup Start Address 8 Register (F107h)
130 static int onenand_page_address(int page, int sector)
132 /* Flash Page Address, Flash Sector Address */
135 fpa = page & ONENAND_FPA_MASK;
136 fsa = sector & ONENAND_FSA_MASK;
138 return ((fpa << ONENAND_FPA_SHIFT) | fsa);
142 * onenand_buffer_address - [DEFAULT] Get buffer address
143 * @param dataram1 DataRAM index
144 * @param sectors the sector address
145 * @param count the number of sectors
146 * @return the start buffer value
148 * Setup Start Buffer Register (F200h)
150 static int onenand_buffer_address(int dataram1, int sectors, int count)
154 /* BufferRAM Sector Address */
155 bsa = sectors & ONENAND_BSA_MASK;
158 bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */
160 bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */
162 /* BufferRAM Sector Count */
163 bsc = count & ONENAND_BSC_MASK;
165 return ((bsa << ONENAND_BSA_SHIFT) | bsc);
169 * onenand_command - [DEFAULT] Send command to OneNAND device
170 * @param mtd MTD device structure
171 * @param cmd the command to be sent
172 * @param addr offset to read from or write to
173 * @param len number of bytes to read or write
175 * Send command to OneNAND device. This function is used for middle/large page
176 * devices (1KB/2KB Bytes per page)
178 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr,
181 struct onenand_chip *this = mtd->priv;
182 int value, readcmd = 0;
184 /* Now we use page size operation */
185 int sectors = 4, count = 4;
187 /* Address translation */
189 case ONENAND_CMD_UNLOCK:
190 case ONENAND_CMD_LOCK:
191 case ONENAND_CMD_LOCK_TIGHT:
196 case ONENAND_CMD_ERASE:
197 case ONENAND_CMD_BUFFERRAM:
198 block = (int)(addr >> this->erase_shift);
203 block = (int)(addr >> this->erase_shift);
204 page = (int)(addr >> this->page_shift);
205 page &= this->page_mask;
209 /* NOTE: The setting order of the registers is very important! */
210 if (cmd == ONENAND_CMD_BUFFERRAM) {
211 /* Select DataRAM for DDP */
212 value = onenand_bufferram_address(this->device_id, block);
213 this->write_word(value,
214 this->base + ONENAND_REG_START_ADDRESS2);
216 /* Switch to the next data buffer */
217 ONENAND_SET_NEXT_BUFFERRAM(this);
223 /* Write 'DFS, FBA' of Flash */
224 value = onenand_block_address(this->device_id, block);
225 this->write_word(value,
226 this->base + ONENAND_REG_START_ADDRESS1);
233 case ONENAND_CMD_READ:
234 case ONENAND_CMD_READOOB:
235 dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
240 dataram = ONENAND_CURRENT_BUFFERRAM(this);
244 /* Write 'FPA, FSA' of Flash */
245 value = onenand_page_address(page, sectors);
246 this->write_word(value,
247 this->base + ONENAND_REG_START_ADDRESS8);
249 /* Write 'BSA, BSC' of DataRAM */
250 value = onenand_buffer_address(dataram, sectors, count);
251 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
254 /* Select DataRAM for DDP */
256 onenand_bufferram_address(this->device_id, block);
257 this->write_word(value,
259 ONENAND_REG_START_ADDRESS2);
263 /* Interrupt clear */
264 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
266 this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
272 * onenand_wait - [DEFAULT] wait until the command is done
273 * @param mtd MTD device structure
274 * @param state state to select the max. timeout value
276 * Wait for command done. This applies to all OneNAND command
277 * Read can take up to 30us, erase up to 2ms and program up to 350us
278 * according to general OneNAND specs
280 static int onenand_wait(struct mtd_info *mtd, int state)
282 struct onenand_chip *this = mtd->priv;
283 unsigned int flags = ONENAND_INT_MASTER;
284 unsigned int interrupt = 0;
285 unsigned int ctrl, ecc;
288 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
289 if (interrupt & flags)
293 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
295 if (ctrl & ONENAND_CTRL_ERROR) {
296 MTDDEBUG (MTD_DEBUG_LEVEL0,
297 "onenand_wait: controller error = 0x%04x\n", ctrl);
301 if (ctrl & ONENAND_CTRL_LOCK) {
302 MTDDEBUG (MTD_DEBUG_LEVEL0,
303 "onenand_wait: it's locked error = 0x%04x\n", ctrl);
307 if (interrupt & ONENAND_INT_READ) {
308 ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
309 if (ecc & ONENAND_ECC_2BIT_ALL) {
310 MTDDEBUG (MTD_DEBUG_LEVEL0,
311 "onenand_wait: ECC error = 0x%04x\n", ecc);
320 * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
321 * @param mtd MTD data structure
322 * @param area BufferRAM area
323 * @return offset given area
325 * Return BufferRAM offset given area
327 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
329 struct onenand_chip *this = mtd->priv;
331 if (ONENAND_CURRENT_BUFFERRAM(this)) {
332 if (area == ONENAND_DATARAM)
333 return mtd->oobblock;
334 if (area == ONENAND_SPARERAM)
342 * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
343 * @param mtd MTD data structure
344 * @param area BufferRAM area
345 * @param buffer the databuffer to put/get data
346 * @param offset offset to read from or write to
347 * @param count number of bytes to read/write
349 * Read the BufferRAM area
351 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
352 unsigned char *buffer, int offset,
355 struct onenand_chip *this = mtd->priv;
356 void __iomem *bufferram;
358 bufferram = this->base + area;
359 bufferram += onenand_bufferram_offset(mtd, area);
361 memcpy_16(buffer, bufferram + offset, count);
367 * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
368 * @param mtd MTD data structure
369 * @param area BufferRAM area
370 * @param buffer the databuffer to put/get data
371 * @param offset offset to read from or write to
372 * @param count number of bytes to read/write
374 * Read the BufferRAM area with Sync. Burst Mode
376 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
377 unsigned char *buffer, int offset,
380 struct onenand_chip *this = mtd->priv;
381 void __iomem *bufferram;
383 bufferram = this->base + area;
384 bufferram += onenand_bufferram_offset(mtd, area);
386 this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
388 memcpy_16(buffer, bufferram + offset, count);
390 this->mmcontrol(mtd, 0);
396 * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
397 * @param mtd MTD data structure
398 * @param area BufferRAM area
399 * @param buffer the databuffer to put/get data
400 * @param offset offset to read from or write to
401 * @param count number of bytes to read/write
403 * Write the BufferRAM area
405 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
406 const unsigned char *buffer, int offset,
409 struct onenand_chip *this = mtd->priv;
410 void __iomem *bufferram;
412 bufferram = this->base + area;
413 bufferram += onenand_bufferram_offset(mtd, area);
415 memcpy_16(bufferram + offset, buffer, count);
421 * onenand_check_bufferram - [GENERIC] Check BufferRAM information
422 * @param mtd MTD data structure
423 * @param addr address to check
424 * @return 1 if there are valid data, otherwise 0
426 * Check bufferram if there is data we required
428 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
430 struct onenand_chip *this = mtd->priv;
434 block = (int)(addr >> this->erase_shift);
435 page = (int)(addr >> this->page_shift);
436 page &= this->page_mask;
438 i = ONENAND_CURRENT_BUFFERRAM(this);
440 /* Is there valid data? */
441 if (this->bufferram[i].block == block &&
442 this->bufferram[i].page == page && this->bufferram[i].valid)
449 * onenand_update_bufferram - [GENERIC] Update BufferRAM information
450 * @param mtd MTD data structure
451 * @param addr address to update
452 * @param valid valid flag
454 * Update BufferRAM information
456 static int onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
459 struct onenand_chip *this = mtd->priv;
463 block = (int)(addr >> this->erase_shift);
464 page = (int)(addr >> this->page_shift);
465 page &= this->page_mask;
467 /* Invalidate BufferRAM */
468 for (i = 0; i < MAX_BUFFERRAM; i++) {
469 if (this->bufferram[i].block == block &&
470 this->bufferram[i].page == page)
471 this->bufferram[i].valid = 0;
474 /* Update BufferRAM */
475 i = ONENAND_CURRENT_BUFFERRAM(this);
476 this->bufferram[i].block = block;
477 this->bufferram[i].page = page;
478 this->bufferram[i].valid = valid;
484 * onenand_get_device - [GENERIC] Get chip for selected access
485 * @param mtd MTD device structure
486 * @param new_state the state which is requested
488 * Get the device and lock it for exclusive access
490 static void onenand_get_device(struct mtd_info *mtd, int new_state)
496 * onenand_release_device - [GENERIC] release chip
497 * @param mtd MTD device structure
499 * Deselect, release chip lock and wake up anyone waiting on the device
501 static void onenand_release_device(struct mtd_info *mtd)
507 * onenand_read_ecc - [MTD Interface] Read data with ECC
508 * @param mtd MTD device structure
509 * @param from offset to read from
510 * @param len number of bytes to read
511 * @param retlen pointer to variable to store the number of read bytes
512 * @param buf the databuffer to put data
513 * @param oob_buf filesystem supplied oob data buffer
514 * @param oobsel oob selection structure
516 * OneNAND read with ECC
518 static int onenand_read_ecc(struct mtd_info *mtd, loff_t from, size_t len,
519 size_t * retlen, u_char * buf,
520 u_char * oob_buf, struct nand_oobinfo *oobsel)
522 struct onenand_chip *this = mtd->priv;
523 int read = 0, column;
527 MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_read_ecc: "
528 "from = 0x%08x, len = %i\n",
529 (unsigned int)from, (int)len);
531 /* Do not allow reads past end of device */
532 if ((from + len) > mtd->size) {
533 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_read_ecc: "
534 "Attempt read beyond end of device\n");
539 /* Grab the lock and see if the device is available */
540 onenand_get_device(mtd, FL_READING);
543 thislen = min_t(int, mtd->oobblock, len - read);
545 column = from & (mtd->oobblock - 1);
546 if (column + thislen > mtd->oobblock)
547 thislen = mtd->oobblock - column;
549 if (!onenand_check_bufferram(mtd, from)) {
550 this->command(mtd, ONENAND_CMD_READ, from,
552 ret = this->wait(mtd, FL_READING);
553 /* First copy data and check return value for ECC handling */
554 onenand_update_bufferram(mtd, from, 1);
557 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column,
565 MTDDEBUG (MTD_DEBUG_LEVEL0,
566 "onenand_read_ecc: read failed = %d\n", ret);
574 /* Deselect and wake up anyone waiting on the device */
575 onenand_release_device(mtd);
578 * Return success, if no ECC failures, else -EBADMSG
579 * fs driver will take care of that, because
580 * retlen == desired len and result == -EBADMSG
587 * onenand_read - [MTD Interface] MTD compability function for onenand_read_ecc
588 * @param mtd MTD device structure
589 * @param from offset to read from
590 * @param len number of bytes to read
591 * @param retlen pointer to variable to store the number of read bytes
592 * @param buf the databuffer to put data
594 * This function simply calls onenand_read_ecc with oob buffer and oobsel = NULL
596 int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
597 size_t * retlen, u_char * buf)
599 return onenand_read_ecc(mtd, from, len, retlen, buf, NULL, NULL);
603 * onenand_read_oob - [MTD Interface] OneNAND read out-of-band
604 * @param mtd MTD device structure
605 * @param from offset to read from
606 * @param len number of bytes to read
607 * @param retlen pointer to variable to store the number of read bytes
608 * @param buf the databuffer to put data
610 * OneNAND read out-of-band data from the spare area
612 int onenand_read_oob(struct mtd_info *mtd, loff_t from, size_t len,
613 size_t * retlen, u_char * buf)
615 struct onenand_chip *this = mtd->priv;
616 int read = 0, thislen, column;
619 MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_read_oob: "
620 "from = 0x%08x, len = %i\n",
621 (unsigned int)from, (int)len);
623 /* Initialize return length value */
626 /* Do not allow reads past end of device */
627 if (unlikely((from + len) > mtd->size)) {
628 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_read_oob: "
629 "Attempt read beyond end of device\n");
633 /* Grab the lock and see if the device is available */
634 onenand_get_device(mtd, FL_READING);
636 column = from & (mtd->oobsize - 1);
639 thislen = mtd->oobsize - column;
640 thislen = min_t(int, thislen, len);
642 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
644 onenand_update_bufferram(mtd, from, 0);
646 ret = this->wait(mtd, FL_READING);
647 /* First copy data and check return value for ECC handling */
649 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column,
657 MTDDEBUG (MTD_DEBUG_LEVEL0,
658 "onenand_read_oob: read failed = %d\n", ret);
666 from += mtd->oobblock;
671 /* Deselect and wake up anyone waiting on the device */
672 onenand_release_device(mtd);
678 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
680 * onenand_verify_page - [GENERIC] verify the chip contents after a write
681 * @param mtd MTD device structure
682 * @param buf the databuffer to verify
684 * Check DataRAM area directly
686 static int onenand_verify_page(struct mtd_info *mtd, u_char * buf,
689 struct onenand_chip *this = mtd->priv;
690 void __iomem *dataram0, *dataram1;
693 this->command(mtd, ONENAND_CMD_READ, addr, mtd->oobblock);
695 ret = this->wait(mtd, FL_READING);
699 onenand_update_bufferram(mtd, addr, 1);
701 /* Check, if the two dataram areas are same */
702 dataram0 = this->base + ONENAND_DATARAM;
703 dataram1 = dataram0 + mtd->oobblock;
705 if (memcmp(dataram0, dataram1, mtd->oobblock))
711 #define onenand_verify_page(...) (0)
714 #define NOTALIGNED(x) ((x & (mtd->oobblock - 1)) != 0)
717 * onenand_write_ecc - [MTD Interface] OneNAND write with ECC
718 * @param mtd MTD device structure
719 * @param to offset to write to
720 * @param len number of bytes to write
721 * @param retlen pointer to variable to store the number of written bytes
722 * @param buf the data to write
723 * @param eccbuf filesystem supplied oob data buffer
724 * @param oobsel oob selection structure
726 * OneNAND write with ECC
728 static int onenand_write_ecc(struct mtd_info *mtd, loff_t to, size_t len,
729 size_t * retlen, const u_char * buf,
730 u_char * eccbuf, struct nand_oobinfo *oobsel)
732 struct onenand_chip *this = mtd->priv;
736 MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_write_ecc: "
737 "to = 0x%08x, len = %i\n",
738 (unsigned int)to, (int)len);
740 /* Initialize retlen, in case of early exit */
743 /* Do not allow writes past end of device */
744 if (unlikely((to + len) > mtd->size)) {
745 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_write_ecc: "
746 "Attempt write to past end of device\n");
750 /* Reject writes, which are not page aligned */
751 if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
752 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_write_ecc: "
753 "Attempt to write not page aligned data\n");
757 /* Grab the lock and see if the device is available */
758 onenand_get_device(mtd, FL_WRITING);
760 /* Loop until all data write */
761 while (written < len) {
762 int thislen = min_t(int, mtd->oobblock, len - written);
764 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobblock);
766 this->write_bufferram(mtd, ONENAND_DATARAM, buf, 0, thislen);
767 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0,
770 this->command(mtd, ONENAND_CMD_PROG, to, mtd->oobblock);
772 onenand_update_bufferram(mtd, to, 1);
774 ret = this->wait(mtd, FL_WRITING);
776 MTDDEBUG (MTD_DEBUG_LEVEL0,
777 "onenand_write_ecc: write filaed %d\n", ret);
783 /* Only check verify write turn on */
784 ret = onenand_verify_page(mtd, (u_char *) buf, to);
786 MTDDEBUG (MTD_DEBUG_LEVEL0,
787 "onenand_write_ecc: verify failed %d\n", ret);
798 /* Deselect and wake up anyone waiting on the device */
799 onenand_release_device(mtd);
807 * onenand_write - [MTD Interface] compability function for onenand_write_ecc
808 * @param mtd MTD device structure
809 * @param to offset to write to
810 * @param len number of bytes to write
811 * @param retlen pointer to variable to store the number of written bytes
812 * @param buf the data to write
814 * This function simply calls onenand_write_ecc
815 * with oob buffer and oobsel = NULL
817 int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
818 size_t * retlen, const u_char * buf)
820 return onenand_write_ecc(mtd, to, len, retlen, buf, NULL, NULL);
824 * onenand_write_oob - [MTD Interface] OneNAND write out-of-band
825 * @param mtd MTD device structure
826 * @param to offset to write to
827 * @param len number of bytes to write
828 * @param retlen pointer to variable to store the number of written bytes
829 * @param buf the data to write
831 * OneNAND write out-of-band
833 int onenand_write_oob(struct mtd_info *mtd, loff_t to, size_t len,
834 size_t * retlen, const u_char * buf)
836 struct onenand_chip *this = mtd->priv;
840 MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_write_oob: "
841 "to = 0x%08x, len = %i\n",
842 (unsigned int)to, (int)len);
844 /* Initialize retlen, in case of early exit */
847 /* Do not allow writes past end of device */
848 if (unlikely((to + len) > mtd->size)) {
849 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_write_oob: "
850 "Attempt write to past end of device\n");
854 /* Grab the lock and see if the device is available */
855 onenand_get_device(mtd, FL_WRITING);
857 /* Loop until all data write */
858 while (written < len) {
859 int thislen = min_t(int, mtd->oobsize, len - written);
861 column = to & (mtd->oobsize - 1);
863 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
865 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0,
867 this->write_bufferram(mtd, ONENAND_SPARERAM, buf, column,
870 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
872 onenand_update_bufferram(mtd, to, 0);
874 status = this->wait(mtd, FL_WRITING);
886 /* Deselect and wake up anyone waiting on the device */
887 onenand_release_device(mtd);
895 * onenand_erase - [MTD Interface] erase block(s)
896 * @param mtd MTD device structure
897 * @param instr erase instruction
899 * Erase one ore more blocks
901 int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
903 struct onenand_chip *this = mtd->priv;
904 unsigned int block_size;
909 MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n",
910 (unsigned int)instr->addr, (unsigned int)instr->len);
912 block_size = (1 << this->erase_shift);
914 /* Start address must align on block boundary */
915 if (unlikely(instr->addr & (block_size - 1))) {
916 MTDDEBUG (MTD_DEBUG_LEVEL0,
917 "onenand_erase: Unaligned address\n");
921 /* Length must align on block boundary */
922 if (unlikely(instr->len & (block_size - 1))) {
923 MTDDEBUG (MTD_DEBUG_LEVEL0,
924 "onenand_erase: Length not block aligned\n");
928 /* Do not allow erase past end of device */
929 if (unlikely((instr->len + instr->addr) > mtd->size)) {
930 MTDDEBUG (MTD_DEBUG_LEVEL0,
931 "onenand_erase: Erase past end of device\n");
935 instr->fail_addr = 0xffffffff;
937 /* Grab the lock and see if the device is available */
938 onenand_get_device(mtd, FL_ERASING);
940 /* Loop throught the pages */
944 instr->state = MTD_ERASING;
948 /* TODO Check badblock */
950 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
952 ret = this->wait(mtd, FL_ERASING);
953 /* Check, if it is write protected */
956 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_erase: "
957 "Device is write protected!!!\n");
959 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_erase: "
960 "Failed erase, block %d\n",
961 (unsigned)(addr >> this->erase_shift));
962 instr->state = MTD_ERASE_FAILED;
963 instr->fail_addr = addr;
971 instr->state = MTD_ERASE_DONE;
975 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
976 /* Do call back function */
978 mtd_erase_callback(instr);
980 /* Deselect and wake up anyone waiting on the device */
981 onenand_release_device(mtd);
987 * onenand_sync - [MTD Interface] sync
988 * @param mtd MTD device structure
990 * Sync is actually a wait for chip ready function
992 void onenand_sync(struct mtd_info *mtd)
994 MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
996 /* Grab the lock and see if the device is available */
997 onenand_get_device(mtd, FL_SYNCING);
999 /* Release it and go back */
1000 onenand_release_device(mtd);
1004 * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1005 * @param mtd MTD device structure
1006 * @param ofs offset relative to mtd start
1008 int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1012 * 1. Bad block table (BBT)
1013 * -> using NAND BBT to support JFFS2
1014 * 2. Bad block management (BBM)
1015 * -> bad block replace scheme
1017 * Currently we do nothing
1023 * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1024 * @param mtd MTD device structure
1025 * @param ofs offset relative to mtd start
1027 int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1034 * onenand_unlock - [MTD Interface] Unlock block(s)
1035 * @param mtd MTD device structure
1036 * @param ofs offset relative to mtd start
1037 * @param len number of bytes to unlock
1039 * Unlock one or more blocks
1041 int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1043 struct onenand_chip *this = mtd->priv;
1044 int start, end, block, value, status;
1046 start = ofs >> this->erase_shift;
1047 end = len >> this->erase_shift;
1049 /* Continuous lock scheme */
1050 if (this->options & ONENAND_CONT_LOCK) {
1051 /* Set start block address */
1052 this->write_word(start,
1053 this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1054 /* Set end block address */
1055 this->write_word(end - 1,
1056 this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1057 /* Write unlock command */
1058 this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0);
1060 /* There's no return value */
1061 this->wait(mtd, FL_UNLOCKING);
1064 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1065 & ONENAND_CTRL_ONGO)
1068 /* Check lock status */
1069 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1070 if (!(status & ONENAND_WP_US))
1071 printk(KERN_ERR "wp status = 0x%x\n", status);
1076 /* Block lock scheme */
1077 for (block = start; block < end; block++) {
1078 /* Set start block address */
1079 this->write_word(block,
1080 this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1081 /* Write unlock command */
1082 this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0);
1084 /* There's no return value */
1085 this->wait(mtd, FL_UNLOCKING);
1088 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1089 & ONENAND_CTRL_ONGO)
1092 /* Set block address for read block status */
1093 value = onenand_block_address(this->device_id, block);
1094 this->write_word(value,
1095 this->base + ONENAND_REG_START_ADDRESS1);
1097 /* Check lock status */
1098 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1099 if (!(status & ONENAND_WP_US))
1100 printk(KERN_ERR "block = %d, wp status = 0x%x\n",
1108 * onenand_print_device_info - Print device ID
1109 * @param device device ID
1113 void onenand_print_device_info(int device, int verbose)
1115 int vcc, demuxed, ddp, density;
1120 vcc = device & ONENAND_DEVICE_VCC_MASK;
1121 demuxed = device & ONENAND_DEVICE_IS_DEMUX;
1122 ddp = device & ONENAND_DEVICE_IS_DDP;
1123 density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
1124 printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
1125 demuxed ? "" : "Muxed ",
1127 (16 << density), vcc ? "2.65/3.3" : "1.8", device);
1130 static const struct onenand_manufacturers onenand_manuf_ids[] = {
1131 {ONENAND_MFR_SAMSUNG, "Samsung"},
1132 {ONENAND_MFR_UNKNOWN, "Unknown"}
1136 * onenand_check_maf - Check manufacturer ID
1137 * @param manuf manufacturer ID
1139 * Check manufacturer ID
1141 static int onenand_check_maf(int manuf)
1145 for (i = 0; onenand_manuf_ids[i].id; i++) {
1146 if (manuf == onenand_manuf_ids[i].id)
1150 #ifdef ONENAND_DEBUG
1151 printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n",
1152 onenand_manuf_ids[i].name, manuf);
1155 return (i != ONENAND_MFR_UNKNOWN);
1159 * onenand_probe - [OneNAND Interface] Probe the OneNAND device
1160 * @param mtd MTD device structure
1162 * OneNAND detection method:
1163 * Compare the the values from command with ones from register
1165 static int onenand_probe(struct mtd_info *mtd)
1167 struct onenand_chip *this = mtd->priv;
1168 int bram_maf_id, bram_dev_id, maf_id, dev_id;
1172 /* Send the command for reading device ID from BootRAM */
1173 this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
1175 /* Read manufacturer and device IDs from BootRAM */
1176 bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
1177 bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
1179 /* Check manufacturer ID */
1180 if (onenand_check_maf(bram_maf_id))
1183 /* Reset OneNAND to read default register values */
1184 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
1188 for (i = 0; i < 10000; i++) ;
1191 /* Read manufacturer and device IDs from Register */
1192 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
1193 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
1195 /* Check OneNAND device */
1196 if (maf_id != bram_maf_id || dev_id != bram_dev_id)
1199 /* FIXME : Current OneNAND MTD doesn't support Flex-OneNAND */
1200 if (dev_id & (1 << 9)) {
1201 printk("Not yet support Flex-OneNAND\n");
1205 /* Flash device information */
1206 onenand_print_device_info(dev_id, 0);
1207 this->device_id = dev_id;
1209 density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1210 this->chipsize = (16 << density) << 20;
1212 /* OneNAND page size & block size */
1213 /* The data buffer size is equal to page size */
1215 this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
1216 mtd->oobsize = mtd->oobblock >> 5;
1217 /* Pagers per block is always 64 in OneNAND */
1218 mtd->erasesize = mtd->oobblock << 6;
1220 this->erase_shift = ffs(mtd->erasesize) - 1;
1221 this->page_shift = ffs(mtd->oobblock) - 1;
1222 this->ppb_shift = (this->erase_shift - this->page_shift);
1223 this->page_mask = (mtd->erasesize / mtd->oobblock) - 1;
1225 /* REVIST: Multichip handling */
1227 mtd->size = this->chipsize;
1230 version_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
1231 #ifdef ONENAND_DEBUG
1232 printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version_id);
1236 if (density <= ONENAND_DEVICE_DENSITY_512Mb &&
1237 !(version_id >> ONENAND_VERSION_PROCESS_SHIFT)) {
1238 printk(KERN_INFO "Lock scheme is Continues Lock\n");
1239 this->options |= ONENAND_CONT_LOCK;
1246 * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
1247 * @param mtd MTD device structure
1248 * @param maxchips Number of chips to scan for
1250 * This fills out all the not initialized function pointers
1251 * with the defaults.
1252 * The flash ID is read and the mtd/chip structures are
1253 * filled with the appropriate values.
1255 int onenand_scan(struct mtd_info *mtd, int maxchips)
1257 struct onenand_chip *this = mtd->priv;
1259 if (!this->read_word)
1260 this->read_word = onenand_readw;
1261 if (!this->write_word)
1262 this->write_word = onenand_writew;
1265 this->command = onenand_command;
1267 this->wait = onenand_wait;
1269 if (!this->read_bufferram)
1270 this->read_bufferram = onenand_read_bufferram;
1271 if (!this->write_bufferram)
1272 this->write_bufferram = onenand_write_bufferram;
1274 if (onenand_probe(mtd))
1277 /* Set Sync. Burst Read after probing */
1278 if (this->mmcontrol) {
1279 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
1280 this->read_bufferram = onenand_sync_read_bufferram;
1283 onenand_unlock(mtd, 0, mtd->size);
1285 return onenand_default_bbt(mtd);
1289 * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
1290 * @param mtd MTD device structure
1292 void onenand_release(struct mtd_info *mtd)
1296 #endif /* CONFIG_CMD_ONENAND */