3 * Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de
5 * SPDX-License-Identifier: GPL-2.0+
9 * Note: RAMTRON SPI FRAMs are ferroelectric, nonvolatile RAMs
10 * with an interface identical to SPI flash devices.
11 * However since they behave like RAM there are no delays or
12 * busy polls required. They can sustain read or write at the
13 * allowed SPI bus speed, which can be 40 MHz for some devices.
15 * Unfortunately some RAMTRON devices do not have a means of
16 * identifying them. They will leave the SO line undriven when
17 * the READ-ID command is issued. It is therefore mandatory
18 * that the MISO line has a proper pull-up, so that READ-ID
19 * will return a row of 0xff. This 0xff pseudo-id will cause
20 * probes by all vendor specific functions that are designed
21 * to handle it. If the MISO line is not pulled up, READ-ID
22 * could return any random noise, even mimicking another
25 * We use CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC
26 * to define which device will be assumed after a simple status
27 * register verify. This method is prone to false positive
28 * detection and should therefore be the last to be tried.
29 * Enter it in the last position in the table in spi_flash.c!
31 * The define CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC both activates
32 * compilation of the special handler and defines the device
38 #include <spi_flash.h>
39 #include "sf_internal.h"
42 * Properties of supported FRAMs
43 * Note: speed is currently not used because we have no method to deliver that
44 * value to the upper layers
46 struct ramtron_spi_fram_params {
47 u32 size; /* size in bytes */
48 u8 addr_len; /* number of address bytes */
49 u8 merge_cmd; /* some address bits are in the command byte */
50 u8 id1; /* device ID 1 (family, density) */
51 u8 id2; /* device ID 2 (sub, rev, rsvd) */
52 u32 speed; /* max. SPI clock in Hz */
53 const char *name; /* name for display and/or matching */
56 struct ramtron_spi_fram {
57 struct spi_flash flash;
58 const struct ramtron_spi_fram_params *params;
61 static inline struct ramtron_spi_fram *to_ramtron_spi_fram(struct spi_flash
64 return container_of(flash, struct ramtron_spi_fram, flash);
68 * table describing supported FRAM chips:
69 * chips without RDID command must have the values 0xff for id1 and id2
71 static const struct ramtron_spi_fram_params ramtron_spi_fram_table[] = {
126 #ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC
139 static int ramtron_common(struct spi_flash *flash,
140 u32 offset, size_t len, void *buf, u8 command)
142 struct ramtron_spi_fram *sn = to_ramtron_spi_fram(flash);
147 if (sn->params->addr_len == 3 && sn->params->merge_cmd == 0) {
149 cmd[1] = offset >> 16;
150 cmd[2] = offset >> 8;
153 } else if (sn->params->addr_len == 2 && sn->params->merge_cmd == 0) {
155 cmd[1] = offset >> 8;
159 printf("SF: unsupported addr_len or merge_cmd\n");
164 ret = spi_claim_bus(flash->spi);
166 debug("SF: Unable to claim SPI bus\n");
170 if (command == CMD_PAGE_PROGRAM) {
172 ret = spi_flash_cmd_write_enable(flash);
174 debug("SF: Enabling Write failed\n");
179 /* do the transaction */
180 if (command == CMD_PAGE_PROGRAM)
181 ret = spi_flash_cmd_write(flash->spi, cmd, cmd_len, buf, len);
183 ret = spi_flash_cmd_read(flash->spi, cmd, cmd_len, buf, len);
185 debug("SF: Transaction failed\n");
188 /* release the bus */
189 spi_release_bus(flash->spi);
193 static int ramtron_read(struct spi_flash *flash,
194 u32 offset, size_t len, void *buf)
196 return ramtron_common(flash, offset, len, buf,
197 CMD_READ_ARRAY_SLOW);
200 static int ramtron_write(struct spi_flash *flash,
201 u32 offset, size_t len, const void *buf)
203 return ramtron_common(flash, offset, len, (void *)buf,
207 static int ramtron_erase(struct spi_flash *flash, u32 offset, size_t len)
209 debug("SF: Erase of RAMTRON FRAMs is pointless\n");
214 * nore: we are called here with idcode pointing to the first non-0x7f byte
217 static struct spi_flash *spi_fram_probe_ramtron(struct spi_slave *spi,
220 const struct ramtron_spi_fram_params *params;
221 struct ramtron_spi_fram *sn;
223 #ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC
228 /* NOTE: the bus has been claimed before this function is called! */
231 /* JEDEC conformant RAMTRON id */
232 for (i = 0; i < ARRAY_SIZE(ramtron_spi_fram_table); i++) {
233 params = &ramtron_spi_fram_table[i];
234 if (idcode[1] == params->id1 &&
235 idcode[2] == params->id2)
239 #ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC
242 * probably open MISO line, pulled up.
243 * We COULD have a non JEDEC conformant FRAM here,
244 * read the status register to verify
246 ret = spi_flash_cmd(spi, CMD_READ_STATUS, &sr, 1);
250 /* Bits 5,4,0 are fixed 0 for all devices */
251 if ((sr & 0x31) != 0x00)
253 /* now find the device */
254 for (i = 0; i < ARRAY_SIZE(ramtron_spi_fram_table); i++) {
255 params = &ramtron_spi_fram_table[i];
256 if (!strcmp(params->name,
257 CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC))
260 debug("SF: Unsupported non-JEDEC RAMTRON device "
261 CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC "\n");
268 /* arriving here means no method has found a device we can handle */
269 debug("SF/ramtron: unsupported device id0=%02x id1=%02x id2=%02x\n",
270 idcode[0], idcode[1], idcode[2]);
274 sn = malloc(sizeof(*sn));
276 debug("SF: Failed to allocate memory\n");
282 sn->flash.write = ramtron_write;
283 sn->flash.read = ramtron_read;
284 sn->flash.erase = ramtron_erase;
285 sn->flash.size = params->size;
291 * The following table holds all device probe functions
292 * (All flashes are removed and implemented a common probe at
295 * shift: number of continuation bytes before the ID
296 * idcode: the expected IDCODE or 0xff for non JEDEC devices
297 * probe: the function to call
299 * Non JEDEC devices should be ordered in the table such that
300 * the probe functions with best detection algorithms come first.
302 * Several matching entries are permitted, they will be tried
303 * in sequence until a probe function returns non NULL.
305 * IDCODE_CONT_LEN may be redefined if a device needs to declare a
306 * larger "shift" value. IDCODE_PART_LEN generally shouldn't be
307 * changed. This is the max number of bytes probe functions may
308 * examine when looking up part-specific identification info.
310 * Probe functions will be given the idcode buffer starting at their
311 * manu id byte (the "idcode" in the table below). In other words,
312 * all of the continuation bytes will be skipped (the "shift" below).
314 #define IDCODE_CONT_LEN 0
315 #define IDCODE_PART_LEN 5
316 static const struct {
319 struct spi_flash *(*probe) (struct spi_slave *spi, u8 *idcode);
321 /* Keep it sorted by define name */
322 #ifdef CONFIG_SPI_FRAM_RAMTRON
323 { 6, 0xc2, spi_fram_probe_ramtron, },
324 # undef IDCODE_CONT_LEN
325 # define IDCODE_CONT_LEN 6
327 #ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC
328 { 0, 0xff, spi_fram_probe_ramtron, },
331 #define IDCODE_LEN (IDCODE_CONT_LEN + IDCODE_PART_LEN)
333 struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
334 unsigned int max_hz, unsigned int spi_mode)
336 struct spi_slave *spi;
337 struct spi_flash *flash = NULL;
339 u8 idcode[IDCODE_LEN], *idp;
341 spi = spi_setup_slave(bus, cs, max_hz, spi_mode);
343 printf("SF: Failed to set up slave\n");
347 ret = spi_claim_bus(spi);
349 debug("SF: Failed to claim SPI bus: %d\n", ret);
353 /* Read the ID codes */
354 ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
359 printf("SF: Got idcodes\n");
360 print_buffer(0, idcode, 1, sizeof(idcode), 0);
363 /* count the number of continuation bytes */
364 for (shift = 0, idp = idcode;
365 shift < IDCODE_CONT_LEN && *idp == 0x7f;
369 /* search the table for matches in shift and id */
370 for (i = 0; i < ARRAY_SIZE(flashes); ++i)
371 if (flashes[i].shift == shift && flashes[i].idcode == *idp) {
372 /* we have a match, call probe */
373 flash = flashes[i].probe(spi, idp);
379 printf("SF: Unsupported manufacturer %02x\n", *idp);
380 goto err_manufacturer_probe;
383 printf("SF: Detected %s with total size ", flash->name);
384 print_size(flash->size, "");
387 spi_release_bus(spi);
391 err_manufacturer_probe:
393 spi_release_bus(spi);
399 void spi_flash_free(struct spi_flash *flash)
401 spi_free_slave(flash->spi);