4 * Copyright (C) 2008 Atmel Corporation
5 * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik
6 * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
8 * SPDX-License-Identifier: GPL-2.0+
15 #include <spi_flash.h>
18 #include "sf_internal.h"
20 static void spi_flash_addr(u32 addr, u8 *cmd)
22 /* cmd[0] is actual command */
28 int spi_flash_cmd_read_status(struct spi_flash *flash, u8 *rs)
33 cmd = CMD_READ_STATUS;
34 ret = spi_flash_read_common(flash, &cmd, 1, rs, 1);
36 debug("SF: fail to read status register\n");
43 int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws)
48 cmd = CMD_WRITE_STATUS;
49 ret = spi_flash_write_common(flash, &cmd, 1, &ws, 1);
51 debug("SF: fail to write status register\n");
58 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
59 int spi_flash_cmd_read_config(struct spi_flash *flash, u8 *rc)
64 cmd = CMD_READ_CONFIG;
65 ret = spi_flash_read_common(flash, &cmd, 1, rc, 1);
67 debug("SF: fail to read config register\n");
74 int spi_flash_cmd_write_config(struct spi_flash *flash, u8 wc)
80 ret = spi_flash_cmd_read_status(flash, &data[0]);
84 cmd = CMD_WRITE_STATUS;
86 ret = spi_flash_write_common(flash, &cmd, 1, &data, 2);
88 debug("SF: fail to write config register\n");
96 #ifdef CONFIG_SPI_FLASH_BAR
97 static int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel)
102 if (flash->bank_curr == bank_sel) {
103 debug("SF: not require to enable bank%d\n", bank_sel);
107 cmd = flash->bank_write_cmd;
108 ret = spi_flash_write_common(flash, &cmd, 1, &bank_sel, 1);
110 debug("SF: fail to write bank register\n");
113 flash->bank_curr = bank_sel;
118 static int spi_flash_bank(struct spi_flash *flash, u32 offset)
123 bank_sel = offset / (SPI_FLASH_16MB_BOUN << flash->shift);
125 ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
127 debug("SF: fail to set bank%d\n", bank_sel);
135 #ifdef CONFIG_SF_DUAL_FLASH
136 static void spi_flash_dual_flash(struct spi_flash *flash, u32 *addr)
138 switch (flash->dual_flash) {
139 case SF_DUAL_STACKED_FLASH:
140 if (*addr >= (flash->size >> 1)) {
141 *addr -= flash->size >> 1;
142 flash->spi->flags |= SPI_XFER_U_PAGE;
144 flash->spi->flags &= ~SPI_XFER_U_PAGE;
147 case SF_DUAL_PARALLEL_FLASH:
148 *addr >>= flash->shift;
151 debug("SF: Unsupported dual_flash=%d\n", flash->dual_flash);
157 static int spi_flash_poll_status(struct spi_slave *spi, unsigned long timeout,
160 unsigned long timebase;
161 unsigned long flags = SPI_XFER_BEGIN;
164 u8 check_status = 0x0;
166 if (cmd == CMD_FLAG_STATUS)
167 check_status = poll_bit;
169 #ifdef CONFIG_SF_DUAL_FLASH
170 if (spi->flags & SPI_XFER_U_PAGE)
171 flags |= SPI_XFER_U_PAGE;
173 ret = spi_xfer(spi, 8, &cmd, NULL, flags);
175 debug("SF: fail to read %s status register\n",
176 cmd == CMD_READ_STATUS ? "read" : "flag");
180 timebase = get_timer(0);
184 ret = spi_xfer(spi, 8, NULL, &status, 0);
188 if ((status & poll_bit) == check_status)
191 } while (get_timer(timebase) < timeout);
193 spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END);
195 if ((status & poll_bit) == check_status)
199 debug("SF: time out!\n");
203 int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)
205 struct spi_slave *spi = flash->spi;
207 u8 poll_bit = STATUS_WIP;
208 u8 cmd = CMD_READ_STATUS;
210 ret = spi_flash_poll_status(spi, timeout, cmd, poll_bit);
214 if (flash->poll_cmd == CMD_FLAG_STATUS) {
215 poll_bit = STATUS_PEC;
216 cmd = CMD_FLAG_STATUS;
217 ret = spi_flash_poll_status(spi, timeout, cmd, poll_bit);
225 int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
226 size_t cmd_len, const void *buf, size_t buf_len)
228 struct spi_slave *spi = flash->spi;
229 unsigned long timeout = SPI_FLASH_PROG_TIMEOUT;
233 timeout = SPI_FLASH_PAGE_ERASE_TIMEOUT;
235 ret = spi_claim_bus(flash->spi);
237 debug("SF: unable to claim SPI bus\n");
241 ret = spi_flash_cmd_write_enable(flash);
243 debug("SF: enabling write failed\n");
247 ret = spi_flash_cmd_write(spi, cmd, cmd_len, buf, buf_len);
249 debug("SF: write cmd failed\n");
253 ret = spi_flash_cmd_wait_ready(flash, timeout);
255 debug("SF: write %s timed out\n",
256 timeout == SPI_FLASH_PROG_TIMEOUT ?
257 "program" : "page erase");
261 spi_release_bus(spi);
266 int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)
268 u32 erase_size, erase_addr;
269 u8 cmd[SPI_FLASH_CMD_LEN];
272 erase_size = flash->erase_size;
273 if (offset % erase_size || len % erase_size) {
274 debug("SF: Erase offset/length not multiple of erase size\n");
278 cmd[0] = flash->erase_cmd;
282 #ifdef CONFIG_SF_DUAL_FLASH
283 if (flash->dual_flash > SF_SINGLE_FLASH)
284 spi_flash_dual_flash(flash, &erase_addr);
286 #ifdef CONFIG_SPI_FLASH_BAR
287 ret = spi_flash_bank(flash, erase_addr);
291 spi_flash_addr(erase_addr, cmd);
293 debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
294 cmd[2], cmd[3], erase_addr);
296 ret = spi_flash_write_common(flash, cmd, sizeof(cmd), NULL, 0);
298 debug("SF: erase failed\n");
302 offset += erase_size;
309 int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
310 size_t len, const void *buf)
312 unsigned long byte_addr, page_size;
314 size_t chunk_len, actual;
315 u8 cmd[SPI_FLASH_CMD_LEN];
318 page_size = flash->page_size;
320 cmd[0] = flash->write_cmd;
321 for (actual = 0; actual < len; actual += chunk_len) {
324 #ifdef CONFIG_SF_DUAL_FLASH
325 if (flash->dual_flash > SF_SINGLE_FLASH)
326 spi_flash_dual_flash(flash, &write_addr);
328 #ifdef CONFIG_SPI_FLASH_BAR
329 ret = spi_flash_bank(flash, write_addr);
333 byte_addr = offset % page_size;
334 chunk_len = min(len - actual, (size_t)(page_size - byte_addr));
336 if (flash->spi->max_write_size)
337 chunk_len = min(chunk_len,
338 (size_t)flash->spi->max_write_size);
340 spi_flash_addr(write_addr, cmd);
342 debug("SF: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n",
343 buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
345 ret = spi_flash_write_common(flash, cmd, sizeof(cmd),
346 buf + actual, chunk_len);
348 debug("SF: write failed\n");
358 int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
359 size_t cmd_len, void *data, size_t data_len)
361 struct spi_slave *spi = flash->spi;
364 ret = spi_claim_bus(flash->spi);
366 debug("SF: unable to claim SPI bus\n");
370 ret = spi_flash_cmd_read(spi, cmd, cmd_len, data, data_len);
372 debug("SF: read cmd failed\n");
376 spi_release_bus(spi);
381 int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
382 size_t len, void *data)
385 u32 remain_len, read_len, read_addr;
389 /* Handle memory-mapped SPI */
390 if (flash->memory_map) {
391 ret = spi_claim_bus(flash->spi);
393 debug("SF: unable to claim SPI bus\n");
396 spi_xfer(flash->spi, 0, NULL, NULL, SPI_XFER_MMAP);
397 memcpy(data, flash->memory_map + offset, len);
398 spi_xfer(flash->spi, 0, NULL, NULL, SPI_XFER_MMAP_END);
399 spi_release_bus(flash->spi);
403 cmdsz = SPI_FLASH_CMD_LEN + flash->dummy_byte;
404 cmd = calloc(1, cmdsz);
406 debug("SF: Failed to allocate cmd\n");
410 cmd[0] = flash->read_cmd;
414 #ifdef CONFIG_SF_DUAL_FLASH
415 if (flash->dual_flash > SF_SINGLE_FLASH)
416 spi_flash_dual_flash(flash, &read_addr);
418 #ifdef CONFIG_SPI_FLASH_BAR
419 bank_sel = spi_flash_bank(flash, read_addr);
423 remain_len = ((SPI_FLASH_16MB_BOUN << flash->shift) *
424 (bank_sel + 1)) - offset;
425 if (len < remain_len)
428 read_len = remain_len;
430 spi_flash_addr(read_addr, cmd);
432 ret = spi_flash_read_common(flash, cmd, cmdsz, data, read_len);
434 debug("SF: read failed\n");
447 #ifdef CONFIG_SPI_FLASH_SST
448 static int sst_byte_write(struct spi_flash *flash, u32 offset, const void *buf)
458 debug("BP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
459 spi_w8r8(flash->spi, CMD_READ_STATUS), buf, cmd[0], offset);
461 ret = spi_flash_cmd_write_enable(flash);
465 ret = spi_flash_cmd_write(flash->spi, cmd, sizeof(cmd), buf, 1);
469 return spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
472 int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
475 size_t actual, cmd_len;
479 ret = spi_claim_bus(flash->spi);
481 debug("SF: Unable to claim SPI bus\n");
485 /* If the data is not word aligned, write out leading single byte */
488 ret = sst_byte_write(flash, offset, buf);
494 ret = spi_flash_cmd_write_enable(flash);
499 cmd[0] = CMD_SST_AAI_WP;
500 cmd[1] = offset >> 16;
501 cmd[2] = offset >> 8;
504 for (; actual < len - 1; actual += 2) {
505 debug("WP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
506 spi_w8r8(flash->spi, CMD_READ_STATUS), buf + actual,
509 ret = spi_flash_cmd_write(flash->spi, cmd, cmd_len,
512 debug("SF: sst word program failed\n");
516 ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
525 ret = spi_flash_cmd_write_disable(flash);
527 /* If there is a single trailing byte, write it out */
528 if (!ret && actual != len)
529 ret = sst_byte_write(flash, offset, buf + actual);
532 debug("SF: sst: program %s %zu bytes @ 0x%zx\n",
533 ret ? "failure" : "success", len, offset - actual);
535 spi_release_bus(flash->spi);
539 int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,
545 ret = spi_claim_bus(flash->spi);
547 debug("SF: Unable to claim SPI bus\n");
551 for (actual = 0; actual < len; actual++) {
552 ret = sst_byte_write(flash, offset, buf + actual);
554 debug("SF: sst byte program failed\n");
561 ret = spi_flash_cmd_write_disable(flash);
563 debug("SF: sst: program %s %zu bytes @ 0x%zx\n",
564 ret ? "failure" : "success", len, offset - actual);
566 spi_release_bus(flash->spi);