4 * Copyright (C) 2008 Atmel Corporation
5 * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik
6 * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
8 * SPDX-License-Identifier: GPL-2.0+
18 #include <spi_flash.h>
21 #include "sf_internal.h"
23 DECLARE_GLOBAL_DATA_PTR;
25 /* Read commands array */
26 static u8 spi_read_cmds_array[] = {
29 CMD_READ_DUAL_OUTPUT_FAST,
30 CMD_READ_DUAL_IO_FAST,
31 CMD_READ_QUAD_OUTPUT_FAST,
32 CMD_READ_QUAD_IO_FAST,
35 #ifdef CONFIG_SPI_FLASH_MACRONIX
36 static int spi_flash_set_qeb_mxic(struct spi_flash *flash)
41 ret = spi_flash_cmd_read_status(flash, &qeb_status);
45 if (qeb_status & STATUS_QEB_MXIC) {
46 debug("SF: mxic: QEB is already set\n");
48 ret = spi_flash_cmd_write_status(flash, STATUS_QEB_MXIC);
57 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
58 static int spi_flash_set_qeb_winspan(struct spi_flash *flash)
63 ret = spi_flash_cmd_read_config(flash, &qeb_status);
67 if (qeb_status & STATUS_QEB_WINSPAN) {
68 debug("SF: winspan: QEB is already set\n");
70 ret = spi_flash_cmd_write_config(flash, STATUS_QEB_WINSPAN);
79 static int spi_flash_set_qeb(struct spi_flash *flash, u8 idcode0)
82 #ifdef CONFIG_SPI_FLASH_MACRONIX
83 case SPI_FLASH_CFI_MFR_MACRONIX:
84 return spi_flash_set_qeb_mxic(flash);
86 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
87 case SPI_FLASH_CFI_MFR_SPANSION:
88 case SPI_FLASH_CFI_MFR_WINBOND:
89 return spi_flash_set_qeb_winspan(flash);
91 #ifdef CONFIG_SPI_FLASH_STMICRO
92 case SPI_FLASH_CFI_MFR_STMICRO:
93 debug("SF: QEB is volatile for %02x flash\n", idcode0);
97 printf("SF: Need set QEB func for %02x flash\n", idcode0);
102 #ifdef CONFIG_SPI_FLASH_BAR
103 static int spi_flash_read_bank(struct spi_flash *flash, u8 idcode0)
108 if (flash->size <= SPI_FLASH_16MB_BOUN)
112 case SPI_FLASH_CFI_MFR_SPANSION:
113 flash->bank_read_cmd = CMD_BANKADDR_BRRD;
114 flash->bank_write_cmd = CMD_BANKADDR_BRWR;
116 flash->bank_read_cmd = CMD_EXTNADDR_RDEAR;
117 flash->bank_write_cmd = CMD_EXTNADDR_WREAR;
120 ret = spi_flash_read_common(flash, &flash->bank_read_cmd, 1,
123 debug("SF: fail to read bank addr register\n");
128 flash->bank_curr = curr_bank;
133 static int spi_flash_validate_params(struct spi_slave *spi, u8 *idcode,
134 struct spi_flash *flash)
136 const struct spi_flash_params *params;
138 u16 jedec = idcode[1] << 8 | idcode[2];
139 u16 ext_jedec = idcode[3] << 8 | idcode[4];
141 /* Validate params from spi_flash_params table */
142 params = spi_flash_params_table;
143 for (; params->name != NULL; params++) {
144 if ((params->jedec >> 16) == idcode[0]) {
145 if ((params->jedec & 0xFFFF) == jedec) {
146 if (params->ext_jedec == 0)
148 else if (params->ext_jedec == ext_jedec)
155 printf("SF: Unsupported flash IDs: ");
156 printf("manuf %02x, jedec %04x, ext_jedec %04x\n",
157 idcode[0], jedec, ext_jedec);
158 return -EPROTONOSUPPORT;
161 /* Assign spi data */
163 flash->name = params->name;
164 flash->memory_map = spi->memory_map;
165 flash->dual_flash = flash->spi->option;
167 /* Assign spi_flash ops */
168 #ifndef CONFIG_DM_SPI_FLASH
169 flash->write = spi_flash_cmd_write_ops;
170 #if defined(CONFIG_SPI_FLASH_SST)
171 if (params->flags & SST_WR)
172 flash->flags |= SNOR_F_SST_WR;
174 if (params->flags & SNOR_F_SST_WR) {
175 if (flash->spi->op_mode_tx & SPI_OPM_TX_BP)
176 flash->write = sst_write_bp;
178 flash->write = sst_write_wp;
181 flash->erase = spi_flash_cmd_erase_ops;
182 flash->read = spi_flash_cmd_read_ops;
185 /* lock hooks are flash specific - assign them based on idcode0 */
187 #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST)
188 case SPI_FLASH_CFI_MFR_STMICRO:
189 case SPI_FLASH_CFI_MFR_SST:
190 flash->flash_lock = stm_lock;
191 flash->flash_unlock = stm_unlock;
192 flash->flash_is_locked = stm_is_locked;
196 debug("SF: Lock ops not supported for %02x flash\n", idcode[0]);
199 /* Compute the flash size */
200 flash->shift = (flash->dual_flash & SF_DUAL_PARALLEL_FLASH) ? 1 : 0;
202 * The Spansion S25FL032P and S25FL064P have 256b pages, yet use the
203 * 0x4d00 Extended JEDEC code. The rest of the Spansion flashes with
204 * the 0x4d00 Extended JEDEC code have 512b pages. All of the others
207 if (ext_jedec == 0x4d00) {
208 if ((jedec == 0x0215) || (jedec == 0x216))
209 flash->page_size = 256;
211 flash->page_size = 512;
213 flash->page_size = 256;
215 flash->page_size <<= flash->shift;
216 flash->sector_size = params->sector_size << flash->shift;
217 flash->size = flash->sector_size * params->nr_sectors << flash->shift;
218 #ifdef CONFIG_SF_DUAL_FLASH
219 if (flash->dual_flash & SF_DUAL_STACKED_FLASH)
223 /* Compute erase sector and command */
224 if (params->flags & SECT_4K) {
225 flash->erase_cmd = CMD_ERASE_4K;
226 flash->erase_size = 4096 << flash->shift;
227 } else if (params->flags & SECT_32K) {
228 flash->erase_cmd = CMD_ERASE_32K;
229 flash->erase_size = 32768 << flash->shift;
231 flash->erase_cmd = CMD_ERASE_64K;
232 flash->erase_size = flash->sector_size;
235 /* Now erase size becomes valid sector size */
236 flash->sector_size = flash->erase_size;
238 /* Look for the fastest read cmd */
239 cmd = fls(params->e_rd_cmd & flash->spi->op_mode_rx);
241 cmd = spi_read_cmds_array[cmd - 1];
242 flash->read_cmd = cmd;
244 /* Go for default supported read cmd */
245 flash->read_cmd = CMD_READ_ARRAY_FAST;
248 /* Not require to look for fastest only two write cmds yet */
249 if (params->flags & WR_QPP && flash->spi->op_mode_tx & SPI_OPM_TX_QPP)
250 flash->write_cmd = CMD_QUAD_PAGE_PROGRAM;
252 /* Go for default supported write cmd */
253 flash->write_cmd = CMD_PAGE_PROGRAM;
255 /* Read dummy_byte: dummy byte is determined based on the
256 * dummy cycles of a particular command.
257 * Fast commands - dummy_byte = dummy_cycles/8
258 * I/O commands- dummy_byte = (dummy_cycles * no.of lines)/8
259 * For I/O commands except cmd[0] everything goes on no.of lines
260 * based on particular command but incase of fast commands except
261 * data all go on single line irrespective of command.
263 switch (flash->read_cmd) {
264 case CMD_READ_QUAD_IO_FAST:
265 flash->dummy_byte = 2;
267 case CMD_READ_ARRAY_SLOW:
268 flash->dummy_byte = 0;
271 flash->dummy_byte = 1;
274 #ifdef CONFIG_SPI_FLASH_STMICRO
275 if (params->flags & E_FSR)
276 flash->flags |= SNOR_F_USE_FSR;
279 /* Configure the BAR - discover bank cmds and read current bank */
280 #ifdef CONFIG_SPI_FLASH_BAR
281 int ret = spi_flash_read_bank(flash, idcode[0]);
286 /* Flash powers up read-only, so clear BP# bits */
287 #if defined(CONFIG_SPI_FLASH_ATMEL) || \
288 defined(CONFIG_SPI_FLASH_MACRONIX) || \
289 defined(CONFIG_SPI_FLASH_SST)
290 spi_flash_cmd_write_status(flash, 0);
296 #if CONFIG_IS_ENABLED(OF_CONTROL)
297 int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
303 /* If there is no node, do nothing */
304 node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH);
308 addr = fdtdec_get_addr_size(blob, node, "memory-map", &size);
309 if (addr == FDT_ADDR_T_NONE) {
310 debug("%s: Cannot decode address\n", __func__);
314 if (flash->size != size) {
315 debug("%s: Memory map must cover entire device\n", __func__);
318 flash->memory_map = map_sysmem(addr, size);
322 #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
325 * spi_flash_probe_slave() - Probe for a SPI flash device on a bus
328 * @flashp: Pointer to place to put flash info, which may be NULL if the
329 * space should be allocated
331 int spi_flash_probe_slave(struct spi_slave *spi, struct spi_flash *flash)
336 /* Setup spi_slave */
338 printf("SF: Failed to set up slave\n");
343 ret = spi_claim_bus(spi);
345 debug("SF: Failed to claim SPI bus: %d\n", ret);
349 /* Read the ID codes */
350 ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
352 printf("SF: Failed to get idcodes\n");
357 printf("SF: Got idcodes\n");
358 print_buffer(0, idcode, 1, sizeof(idcode), 0);
361 if (spi_flash_validate_params(spi, idcode, flash)) {
366 /* Set the quad enable bit - only for quad commands */
367 if ((flash->read_cmd == CMD_READ_QUAD_OUTPUT_FAST) ||
368 (flash->read_cmd == CMD_READ_QUAD_IO_FAST) ||
369 (flash->write_cmd == CMD_QUAD_PAGE_PROGRAM)) {
370 if (spi_flash_set_qeb(flash, idcode[0])) {
371 debug("SF: Fail to set QEB for %02x\n", idcode[0]);
377 #if CONFIG_IS_ENABLED(OF_CONTROL)
378 if (spi_flash_decode_fdt(gd->fdt_blob, flash)) {
379 debug("SF: FDT decode error\n");
384 #ifndef CONFIG_SPL_BUILD
385 printf("SF: Detected %s with page size ", flash->name);
386 print_size(flash->page_size, ", erase size ");
387 print_size(flash->erase_size, ", total ");
388 print_size(flash->size, "");
389 if (flash->memory_map)
390 printf(", mapped at %p", flash->memory_map);
393 #ifndef CONFIG_SPI_FLASH_BAR
394 if (((flash->dual_flash == SF_SINGLE_FLASH) &&
395 (flash->size > SPI_FLASH_16MB_BOUN)) ||
396 ((flash->dual_flash > SF_SINGLE_FLASH) &&
397 (flash->size > SPI_FLASH_16MB_BOUN << 1))) {
398 puts("SF: Warning - Only lower 16MiB accessible,");
399 puts(" Full access #define CONFIG_SPI_FLASH_BAR\n");
402 #ifdef CONFIG_SPI_FLASH_MTD
403 ret = spi_flash_mtd_register(flash);
407 spi_release_bus(spi);
411 #ifndef CONFIG_DM_SPI_FLASH
412 struct spi_flash *spi_flash_probe_tail(struct spi_slave *bus)
414 struct spi_flash *flash;
416 /* Allocate space if needed (not used by sf-uclass */
417 flash = calloc(1, sizeof(*flash));
419 debug("SF: Failed to allocate spi_flash\n");
423 if (spi_flash_probe_slave(bus, flash)) {
432 struct spi_flash *spi_flash_probe(unsigned int busnum, unsigned int cs,
433 unsigned int max_hz, unsigned int spi_mode)
435 struct spi_slave *bus;
437 bus = spi_setup_slave(busnum, cs, max_hz, spi_mode);
440 return spi_flash_probe_tail(bus);
443 #ifdef CONFIG_OF_SPI_FLASH
444 struct spi_flash *spi_flash_probe_fdt(const void *blob, int slave_node,
447 struct spi_slave *bus;
449 bus = spi_setup_slave_fdt(blob, slave_node, spi_node);
452 return spi_flash_probe_tail(bus);
456 void spi_flash_free(struct spi_flash *flash)
458 #ifdef CONFIG_SPI_FLASH_MTD
459 spi_flash_mtd_unregister();
461 spi_free_slave(flash->spi);
465 #else /* defined CONFIG_DM_SPI_FLASH */
467 static int spi_flash_std_read(struct udevice *dev, u32 offset, size_t len,
470 struct spi_flash *flash = dev_get_uclass_priv(dev);
472 return spi_flash_cmd_read_ops(flash, offset, len, buf);
475 int spi_flash_std_write(struct udevice *dev, u32 offset, size_t len,
478 struct spi_flash *flash = dev_get_uclass_priv(dev);
480 #if defined(CONFIG_SPI_FLASH_SST)
481 if (flash->flags & SNOR_F_SST_WR) {
482 if (flash->spi->op_mode_tx & SPI_OPM_TX_BP)
483 return sst_write_bp(flash, offset, len, buf);
485 return sst_write_wp(flash, offset, len, buf);
489 return spi_flash_cmd_write_ops(flash, offset, len, buf);
492 int spi_flash_std_erase(struct udevice *dev, u32 offset, size_t len)
494 struct spi_flash *flash = dev_get_uclass_priv(dev);
496 return spi_flash_cmd_erase_ops(flash, offset, len);
499 int spi_flash_std_probe(struct udevice *dev)
501 struct spi_slave *slave = dev_get_parent_priv(dev);
502 struct dm_spi_slave_platdata *plat = dev_get_parent_platdata(dev);
503 struct spi_flash *flash;
505 flash = dev_get_uclass_priv(dev);
507 debug("%s: slave=%p, cs=%d\n", __func__, slave, plat->cs);
508 return spi_flash_probe_slave(slave, flash);
511 static const struct dm_spi_flash_ops spi_flash_std_ops = {
512 .read = spi_flash_std_read,
513 .write = spi_flash_std_write,
514 .erase = spi_flash_std_erase,
517 static const struct udevice_id spi_flash_std_ids[] = {
518 { .compatible = "spi-flash" },
522 U_BOOT_DRIVER(spi_flash_std) = {
523 .name = "spi_flash_std",
524 .id = UCLASS_SPI_FLASH,
525 .of_match = spi_flash_std_ids,
526 .probe = spi_flash_std_probe,
527 .priv_auto_alloc_size = sizeof(struct spi_flash),
528 .ops = &spi_flash_std_ops,
531 #endif /* CONFIG_DM_SPI_FLASH */