4 * Copyright (C) 2008 Atmel Corporation
5 * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik
7 * Licensed under the GPL-2 or later.
14 #include <spi_flash.h>
17 #include "spi_flash_internal.h"
19 DECLARE_GLOBAL_DATA_PTR;
21 static void spi_flash_addr(u32 addr, u8 *cmd)
23 /* cmd[0] is actual command */
29 static int spi_flash_read_write(struct spi_slave *spi,
30 const u8 *cmd, size_t cmd_len,
31 const u8 *data_out, u8 *data_in,
34 unsigned long flags = SPI_XFER_BEGIN;
38 flags |= SPI_XFER_END;
40 ret = spi_xfer(spi, cmd_len * 8, cmd, NULL, flags);
42 debug("SF: Failed to send command (%zu bytes): %d\n",
44 } else if (data_len != 0) {
45 ret = spi_xfer(spi, data_len * 8, data_out, data_in, SPI_XFER_END);
47 debug("SF: Failed to transfer %zu bytes of data: %d\n",
54 int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len)
56 return spi_flash_cmd_read(spi, &cmd, 1, response, len);
59 int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd,
60 size_t cmd_len, void *data, size_t data_len)
62 return spi_flash_read_write(spi, cmd, cmd_len, NULL, data, data_len);
65 int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
66 const void *data, size_t data_len)
68 return spi_flash_read_write(spi, cmd, cmd_len, data, NULL, data_len);
71 int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset,
72 size_t len, const void *buf)
74 unsigned long page_addr, byte_addr, page_size;
75 size_t chunk_len, actual;
79 page_size = flash->page_size;
81 ret = spi_claim_bus(flash->spi);
83 debug("SF: unable to claim SPI bus\n");
87 cmd[0] = CMD_PAGE_PROGRAM;
88 for (actual = 0; actual < len; actual += chunk_len) {
89 bank_sel = offset / SPI_FLASH_16MB_BOUN;
91 ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
93 debug("SF: fail to set bank%d\n", bank_sel);
97 page_addr = offset / page_size;
98 byte_addr = offset % page_size;
99 chunk_len = min(len - actual, page_size - byte_addr);
101 if (flash->spi->max_write_size)
102 chunk_len = min(chunk_len, flash->spi->max_write_size);
104 cmd[1] = page_addr >> 8;
108 debug("PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n",
109 buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
111 ret = spi_flash_cmd_write_enable(flash);
113 debug("SF: enabling write failed\n");
117 ret = spi_flash_cmd_write(flash->spi, cmd, 4,
118 buf + actual, chunk_len);
120 debug("SF: write failed\n");
124 ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
131 spi_release_bus(flash->spi);
135 int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
136 size_t cmd_len, void *data, size_t data_len)
138 struct spi_slave *spi = flash->spi;
142 ret = spi_flash_cmd_read(spi, cmd, cmd_len, data, data_len);
143 spi_release_bus(spi);
148 int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
149 size_t len, void *data)
152 u32 remain_len, read_len;
155 /* Handle memory-mapped SPI */
156 if (flash->memory_map) {
157 memcpy(data, flash->memory_map + offset, len);
161 cmd[0] = CMD_READ_ARRAY_FAST;
165 bank_sel = offset / SPI_FLASH_16MB_BOUN;
167 ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
169 debug("SF: fail to set bank%d\n", bank_sel);
173 remain_len = (SPI_FLASH_16MB_BOUN * (bank_sel + 1) - offset);
174 if (len < remain_len)
177 read_len = remain_len;
179 spi_flash_addr(offset, cmd);
181 ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
184 debug("SF: read failed\n");
196 int spi_flash_cmd_poll_bit(struct spi_flash *flash, unsigned long timeout,
199 struct spi_slave *spi = flash->spi;
200 unsigned long timebase;
204 ret = spi_xfer(spi, 8, &cmd, NULL, SPI_XFER_BEGIN);
206 debug("SF: Failed to send command %02x: %d\n", cmd, ret);
210 timebase = get_timer(0);
214 ret = spi_xfer(spi, 8, NULL, &status, 0);
218 if ((status & poll_bit) == 0)
221 } while (get_timer(timebase) < timeout);
223 spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END);
225 if ((status & poll_bit) == 0)
229 debug("SF: time out!\n");
233 int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)
235 return spi_flash_cmd_poll_bit(flash, timeout,
236 CMD_READ_STATUS, STATUS_WIP);
239 int spi_flash_cmd_erase(struct spi_flash *flash, u32 offset, size_t len)
245 erase_size = flash->sector_size;
246 if (offset % erase_size || len % erase_size) {
247 debug("SF: Erase offset/length not multiple of erase size\n");
251 ret = spi_claim_bus(flash->spi);
253 debug("SF: Unable to claim SPI bus\n");
257 if (erase_size == 4096)
258 cmd[0] = CMD_ERASE_4K;
260 cmd[0] = CMD_ERASE_64K;
263 bank_sel = offset / SPI_FLASH_16MB_BOUN;
265 ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
267 debug("SF: fail to set bank%d\n", bank_sel);
271 spi_flash_addr(offset, cmd);
273 debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
274 cmd[2], cmd[3], offset);
276 ret = spi_flash_cmd_write_enable(flash);
280 ret = spi_flash_cmd_write(flash->spi, cmd, sizeof(cmd), NULL, 0);
284 ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PAGE_ERASE_TIMEOUT);
288 offset += erase_size;
293 spi_release_bus(flash->spi);
297 int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr)
302 ret = spi_flash_cmd_write_enable(flash);
304 debug("SF: enabling write failed\n");
308 cmd = CMD_WRITE_STATUS;
309 ret = spi_flash_cmd_write(flash->spi, &cmd, 1, &sr, 1);
311 debug("SF: fail to write status register\n");
315 ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
317 debug("SF: write status register timed out\n");
324 int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel)
329 if (flash->bank_curr == bank_sel) {
330 debug("SF: not require to enable bank%d\n", bank_sel);
334 cmd = flash->bank_write_cmd;
335 ret = spi_flash_cmd_write_enable(flash);
337 debug("SF: enabling write failed\n");
341 ret = spi_flash_cmd_write(flash->spi, &cmd, 1, &bank_sel, 1);
343 debug("SF: fail to write bank addr register\n");
346 flash->bank_curr = bank_sel;
348 ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
350 debug("SF: write bank addr register timed out\n");
357 int spi_flash_bank_config(struct spi_flash *flash, u8 idcode0)
362 /* discover bank cmds */
364 case SPI_FLASH_SPANSION_IDCODE0:
365 flash->bank_read_cmd = CMD_BANKADDR_BRRD;
366 flash->bank_write_cmd = CMD_BANKADDR_BRWR;
368 case SPI_FLASH_STMICRO_IDCODE0:
369 case SPI_FLASH_WINBOND_IDCODE0:
370 flash->bank_read_cmd = CMD_EXTNADDR_RDEAR;
371 flash->bank_write_cmd = CMD_EXTNADDR_WREAR;
374 printf("SF: Unsupported bank commands %02x\n", idcode0);
378 /* read the bank reg - on which bank the flash is in currently */
379 cmd = flash->bank_read_cmd;
380 if (flash->size > SPI_FLASH_16MB_BOUN) {
381 if (spi_flash_read_common(flash, &cmd, 1, &curr_bank, 1)) {
382 debug("SF: fail to read bank addr register\n");
385 flash->bank_curr = curr_bank;
387 flash->bank_curr = curr_bank;
393 #ifdef CONFIG_OF_CONTROL
394 int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
400 /* If there is no node, do nothing */
401 node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH);
405 addr = fdtdec_get_addr_size(blob, node, "memory-map", &size);
406 if (addr == FDT_ADDR_T_NONE) {
407 debug("%s: Cannot decode address\n", __func__);
411 if (flash->size != size) {
412 debug("%s: Memory map must cover entire device\n", __func__);
415 flash->memory_map = (void *)addr;
419 #endif /* CONFIG_OF_CONTROL */
422 * The following table holds all device probe functions
424 * shift: number of continuation bytes before the ID
425 * idcode: the expected IDCODE or 0xff for non JEDEC devices
426 * probe: the function to call
428 * Non JEDEC devices should be ordered in the table such that
429 * the probe functions with best detection algorithms come first.
431 * Several matching entries are permitted, they will be tried
432 * in sequence until a probe function returns non NULL.
434 * IDCODE_CONT_LEN may be redefined if a device needs to declare a
435 * larger "shift" value. IDCODE_PART_LEN generally shouldn't be
436 * changed. This is the max number of bytes probe functions may
437 * examine when looking up part-specific identification info.
439 * Probe functions will be given the idcode buffer starting at their
440 * manu id byte (the "idcode" in the table below). In other words,
441 * all of the continuation bytes will be skipped (the "shift" below).
443 #define IDCODE_CONT_LEN 0
444 #define IDCODE_PART_LEN 5
445 static const struct {
448 struct spi_flash *(*probe) (struct spi_slave *spi, u8 *idcode);
450 /* Keep it sorted by define name */
451 #ifdef CONFIG_SPI_FLASH_ATMEL
452 { 0, 0x1f, spi_flash_probe_atmel, },
454 #ifdef CONFIG_SPI_FLASH_EON
455 { 0, 0x1c, spi_flash_probe_eon, },
457 #ifdef CONFIG_SPI_FLASH_MACRONIX
458 { 0, 0xc2, spi_flash_probe_macronix, },
460 #ifdef CONFIG_SPI_FLASH_SPANSION
461 { 0, 0x01, spi_flash_probe_spansion, },
463 #ifdef CONFIG_SPI_FLASH_SST
464 { 0, 0xbf, spi_flash_probe_sst, },
466 #ifdef CONFIG_SPI_FLASH_STMICRO
467 { 0, 0x20, spi_flash_probe_stmicro, },
469 #ifdef CONFIG_SPI_FLASH_WINBOND
470 { 0, 0xef, spi_flash_probe_winbond, },
472 #ifdef CONFIG_SPI_FRAM_RAMTRON
473 { 6, 0xc2, spi_fram_probe_ramtron, },
474 # undef IDCODE_CONT_LEN
475 # define IDCODE_CONT_LEN 6
477 /* Keep it sorted by best detection */
478 #ifdef CONFIG_SPI_FLASH_STMICRO
479 { 0, 0xff, spi_flash_probe_stmicro, },
481 #ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC
482 { 0, 0xff, spi_fram_probe_ramtron, },
485 #define IDCODE_LEN (IDCODE_CONT_LEN + IDCODE_PART_LEN)
487 struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
488 unsigned int max_hz, unsigned int spi_mode)
490 struct spi_slave *spi;
491 struct spi_flash *flash = NULL;
493 u8 idcode[IDCODE_LEN], *idp;
495 spi = spi_setup_slave(bus, cs, max_hz, spi_mode);
497 printf("SF: Failed to set up slave\n");
501 ret = spi_claim_bus(spi);
503 debug("SF: Failed to claim SPI bus: %d\n", ret);
507 /* Read the ID codes */
508 ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
513 printf("SF: Got idcodes\n");
514 print_buffer(0, idcode, 1, sizeof(idcode), 0);
517 /* count the number of continuation bytes */
518 for (shift = 0, idp = idcode;
519 shift < IDCODE_CONT_LEN && *idp == 0x7f;
523 /* search the table for matches in shift and id */
524 for (i = 0; i < ARRAY_SIZE(flashes); ++i)
525 if (flashes[i].shift == shift && flashes[i].idcode == *idp) {
526 /* we have a match, call probe */
527 flash = flashes[i].probe(spi, idp);
533 printf("SF: Unsupported manufacturer %02x\n", *idp);
534 goto err_manufacturer_probe;
537 /* Configure the BAR - disover bank cmds and read current bank */
538 ret = spi_flash_bank_config(flash, *idp);
540 goto err_manufacturer_probe;
542 #ifdef CONFIG_OF_CONTROL
543 if (spi_flash_decode_fdt(gd->fdt_blob, flash)) {
544 debug("SF: FDT decode error\n");
545 goto err_manufacturer_probe;
548 printf("SF: Detected %s with page size ", flash->name);
549 print_size(flash->sector_size, ", total ");
550 print_size(flash->size, "");
551 if (flash->memory_map)
552 printf(", mapped at %p", flash->memory_map);
555 spi_release_bus(spi);
559 err_manufacturer_probe:
561 spi_release_bus(spi);
567 void *spi_flash_do_alloc(int offset, int size, struct spi_slave *spi,
570 struct spi_flash *flash;
575 debug("SF: Failed to allocate memory\n");
578 memset(ptr, '\0', size);
579 flash = (struct spi_flash *)(ptr + offset);
581 /* Set up some basic fields - caller will sort out sizes */
585 flash->read = spi_flash_cmd_read_fast;
586 flash->write = spi_flash_cmd_write_multi;
587 flash->erase = spi_flash_cmd_erase;
592 void spi_flash_free(struct spi_flash *flash)
594 spi_free_slave(flash->spi);