4 * Copyright (C) 2015 Jagan Teki <jteki@openedev.com>
5 * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
6 * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik
7 * Copyright (C) 2008 Atmel Corporation
9 * SPDX-License-Identifier: GPL-2.0+
17 #include <spi_flash.h>
18 #include <linux/log2.h>
20 #include "sf_internal.h"
22 DECLARE_GLOBAL_DATA_PTR;
24 static void spi_flash_addr(u32 addr, u8 *cmd)
26 /* cmd[0] is actual command */
32 static int read_sr(struct spi_flash *flash, u8 *rs)
37 cmd = CMD_READ_STATUS;
38 ret = spi_flash_read_common(flash, &cmd, 1, rs, 1);
40 debug("SF: fail to read status register\n");
47 static int read_fsr(struct spi_flash *flash, u8 *fsr)
50 const u8 cmd = CMD_FLAG_STATUS;
52 ret = spi_flash_read_common(flash, &cmd, 1, fsr, 1);
54 debug("SF: fail to read flag status register\n");
61 static int write_sr(struct spi_flash *flash, u8 ws)
66 cmd = CMD_WRITE_STATUS;
67 ret = spi_flash_write_common(flash, &cmd, 1, &ws, 1);
69 debug("SF: fail to write status register\n");
76 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
77 static int read_cr(struct spi_flash *flash, u8 *rc)
82 cmd = CMD_READ_CONFIG;
83 ret = spi_flash_read_common(flash, &cmd, 1, rc, 1);
85 debug("SF: fail to read config register\n");
92 static int write_cr(struct spi_flash *flash, u8 wc)
98 ret = read_sr(flash, &data[0]);
102 cmd = CMD_WRITE_STATUS;
104 ret = spi_flash_write_common(flash, &cmd, 1, &data, 2);
106 debug("SF: fail to write config register\n");
114 #ifdef CONFIG_SPI_FLASH_STMICRO
115 static int read_evcr(struct spi_flash *flash, u8 *evcr)
118 const u8 cmd = CMD_READ_EVCR;
120 ret = spi_flash_read_common(flash, &cmd, 1, evcr, 1);
122 debug("SF: error reading EVCR\n");
129 static int write_evcr(struct spi_flash *flash, u8 evcr)
134 cmd = CMD_WRITE_EVCR;
135 ret = spi_flash_write_common(flash, &cmd, 1, &evcr, 1);
137 debug("SF: error while writing EVCR register\n");
145 #ifdef CONFIG_SPI_FLASH_BAR
146 static int spi_flash_write_bar(struct spi_flash *flash, u32 offset)
151 bank_sel = offset / (SPI_FLASH_16MB_BOUN << flash->shift);
152 if (bank_sel == flash->bank_curr)
155 cmd = flash->bank_write_cmd;
156 ret = spi_flash_write_common(flash, &cmd, 1, &bank_sel, 1);
158 debug("SF: fail to write bank register\n");
163 flash->bank_curr = bank_sel;
164 return flash->bank_curr;
167 static int spi_flash_read_bar(struct spi_flash *flash, u8 idcode0)
172 if (flash->size <= SPI_FLASH_16MB_BOUN)
176 case SPI_FLASH_CFI_MFR_SPANSION:
177 flash->bank_read_cmd = CMD_BANKADDR_BRRD;
178 flash->bank_write_cmd = CMD_BANKADDR_BRWR;
181 flash->bank_read_cmd = CMD_EXTNADDR_RDEAR;
182 flash->bank_write_cmd = CMD_EXTNADDR_WREAR;
185 ret = spi_flash_read_common(flash, &flash->bank_read_cmd, 1,
188 debug("SF: fail to read bank addr register\n");
193 flash->bank_curr = curr_bank;
198 #ifdef CONFIG_SF_DUAL_FLASH
199 static void spi_flash_dual(struct spi_flash *flash, u32 *addr)
201 struct spi_slave *spi = flash->spi;
203 switch (flash->dual_flash) {
204 case SF_DUAL_STACKED_FLASH:
205 if (*addr >= (flash->size >> 1)) {
206 *addr -= flash->size >> 1;
207 spi->flags |= SPI_XFER_U_PAGE;
209 spi->flags &= ~SPI_XFER_U_PAGE;
212 case SF_DUAL_PARALLEL_FLASH:
213 *addr >>= flash->shift;
216 debug("SF: Unsupported dual_flash=%d\n", flash->dual_flash);
222 static int spi_flash_sr_ready(struct spi_flash *flash)
227 ret = read_sr(flash, &sr);
231 return !(sr & STATUS_WIP);
234 static int spi_flash_fsr_ready(struct spi_flash *flash)
239 ret = read_fsr(flash, &fsr);
243 return fsr & STATUS_PEC;
246 static int spi_flash_ready(struct spi_flash *flash)
250 sr = spi_flash_sr_ready(flash);
255 if (flash->flags & SNOR_F_USE_FSR) {
256 fsr = spi_flash_fsr_ready(flash);
264 static int spi_flash_cmd_wait_ready(struct spi_flash *flash,
265 unsigned long timeout)
269 timebase = get_timer(0);
271 while (get_timer(timebase) < timeout) {
272 ret = spi_flash_ready(flash);
279 printf("SF: Timeout!\n");
284 int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
285 size_t cmd_len, const void *buf, size_t buf_len)
287 struct spi_slave *spi = flash->spi;
288 unsigned long timeout = SPI_FLASH_PROG_TIMEOUT;
292 timeout = SPI_FLASH_PAGE_ERASE_TIMEOUT;
294 ret = spi_claim_bus(spi);
296 debug("SF: unable to claim SPI bus\n");
300 ret = spi_flash_cmd_write_enable(flash);
302 debug("SF: enabling write failed\n");
306 ret = spi_flash_cmd_write(spi, cmd, cmd_len, buf, buf_len);
308 debug("SF: write cmd failed\n");
312 ret = spi_flash_cmd_wait_ready(flash, timeout);
314 debug("SF: write %s timed out\n",
315 timeout == SPI_FLASH_PROG_TIMEOUT ?
316 "program" : "page erase");
320 spi_release_bus(spi);
325 int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)
327 u32 erase_size, erase_addr;
328 u8 cmd[SPI_FLASH_CMD_LEN];
331 erase_size = flash->erase_size;
332 if (offset % erase_size || len % erase_size) {
333 debug("SF: Erase offset/length not multiple of erase size\n");
337 if (flash->flash_is_locked) {
338 if (flash->flash_is_locked(flash, offset, len) > 0) {
339 printf("offset 0x%x is protected and cannot be erased\n",
345 cmd[0] = flash->erase_cmd;
349 #ifdef CONFIG_SF_DUAL_FLASH
350 if (flash->dual_flash > SF_SINGLE_FLASH)
351 spi_flash_dual(flash, &erase_addr);
353 #ifdef CONFIG_SPI_FLASH_BAR
354 ret = spi_flash_write_bar(flash, erase_addr);
358 spi_flash_addr(erase_addr, cmd);
360 debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
361 cmd[2], cmd[3], erase_addr);
363 ret = spi_flash_write_common(flash, cmd, sizeof(cmd), NULL, 0);
365 debug("SF: erase failed\n");
369 offset += erase_size;
376 int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
377 size_t len, const void *buf)
379 struct spi_slave *spi = flash->spi;
380 unsigned long byte_addr, page_size;
382 size_t chunk_len, actual;
383 u8 cmd[SPI_FLASH_CMD_LEN];
386 page_size = flash->page_size;
388 if (flash->flash_is_locked) {
389 if (flash->flash_is_locked(flash, offset, len) > 0) {
390 printf("offset 0x%x is protected and cannot be written\n",
396 cmd[0] = flash->write_cmd;
397 for (actual = 0; actual < len; actual += chunk_len) {
400 #ifdef CONFIG_SF_DUAL_FLASH
401 if (flash->dual_flash > SF_SINGLE_FLASH)
402 spi_flash_dual(flash, &write_addr);
404 #ifdef CONFIG_SPI_FLASH_BAR
405 ret = spi_flash_write_bar(flash, write_addr);
409 byte_addr = offset % page_size;
410 chunk_len = min(len - actual, (size_t)(page_size - byte_addr));
412 if (spi->max_write_size)
413 chunk_len = min(chunk_len,
414 (size_t)spi->max_write_size);
416 spi_flash_addr(write_addr, cmd);
418 debug("SF: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n",
419 buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
421 ret = spi_flash_write_common(flash, cmd, sizeof(cmd),
422 buf + actual, chunk_len);
424 debug("SF: write failed\n");
434 int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
435 size_t cmd_len, void *data, size_t data_len)
437 struct spi_slave *spi = flash->spi;
440 ret = spi_claim_bus(spi);
442 debug("SF: unable to claim SPI bus\n");
446 ret = spi_flash_cmd_read(spi, cmd, cmd_len, data, data_len);
448 debug("SF: read cmd failed\n");
452 spi_release_bus(spi);
457 void __weak spi_flash_copy_mmap(void *data, void *offset, size_t len)
459 memcpy(data, offset, len);
462 int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
463 size_t len, void *data)
465 struct spi_slave *spi = flash->spi;
467 u32 remain_len, read_len, read_addr;
471 /* Handle memory-mapped SPI */
472 if (flash->memory_map) {
473 ret = spi_claim_bus(spi);
475 debug("SF: unable to claim SPI bus\n");
478 spi_xfer(spi, 0, NULL, NULL, SPI_XFER_MMAP);
479 spi_flash_copy_mmap(data, flash->memory_map + offset, len);
480 spi_xfer(spi, 0, NULL, NULL, SPI_XFER_MMAP_END);
481 spi_release_bus(spi);
485 cmdsz = SPI_FLASH_CMD_LEN + flash->dummy_byte;
486 cmd = calloc(1, cmdsz);
488 debug("SF: Failed to allocate cmd\n");
492 cmd[0] = flash->read_cmd;
496 #ifdef CONFIG_SF_DUAL_FLASH
497 if (flash->dual_flash > SF_SINGLE_FLASH)
498 spi_flash_dual(flash, &read_addr);
500 #ifdef CONFIG_SPI_FLASH_BAR
501 ret = spi_flash_write_bar(flash, read_addr);
504 bank_sel = flash->bank_curr;
506 remain_len = ((SPI_FLASH_16MB_BOUN << flash->shift) *
507 (bank_sel + 1)) - offset;
508 if (len < remain_len)
511 read_len = remain_len;
513 spi_flash_addr(read_addr, cmd);
515 ret = spi_flash_read_common(flash, cmd, cmdsz, data, read_len);
517 debug("SF: read failed\n");
530 #ifdef CONFIG_SPI_FLASH_SST
531 static int sst_byte_write(struct spi_flash *flash, u32 offset, const void *buf)
533 struct spi_slave *spi = flash->spi;
542 debug("BP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
543 spi_w8r8(spi, CMD_READ_STATUS), buf, cmd[0], offset);
545 ret = spi_flash_cmd_write_enable(flash);
549 ret = spi_flash_cmd_write(spi, cmd, sizeof(cmd), buf, 1);
553 return spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
556 int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
559 struct spi_slave *spi = flash->spi;
560 size_t actual, cmd_len;
564 ret = spi_claim_bus(spi);
566 debug("SF: Unable to claim SPI bus\n");
570 /* If the data is not word aligned, write out leading single byte */
573 ret = sst_byte_write(flash, offset, buf);
579 ret = spi_flash_cmd_write_enable(flash);
584 cmd[0] = CMD_SST_AAI_WP;
585 cmd[1] = offset >> 16;
586 cmd[2] = offset >> 8;
589 for (; actual < len - 1; actual += 2) {
590 debug("WP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
591 spi_w8r8(spi, CMD_READ_STATUS), buf + actual,
594 ret = spi_flash_cmd_write(spi, cmd, cmd_len,
597 debug("SF: sst word program failed\n");
601 ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
610 ret = spi_flash_cmd_write_disable(flash);
612 /* If there is a single trailing byte, write it out */
613 if (!ret && actual != len)
614 ret = sst_byte_write(flash, offset, buf + actual);
617 debug("SF: sst: program %s %zu bytes @ 0x%zx\n",
618 ret ? "failure" : "success", len, offset - actual);
620 spi_release_bus(spi);
624 int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,
627 struct spi_slave *spi = flash->spi;
631 ret = spi_claim_bus(spi);
633 debug("SF: Unable to claim SPI bus\n");
637 for (actual = 0; actual < len; actual++) {
638 ret = sst_byte_write(flash, offset, buf + actual);
640 debug("SF: sst byte program failed\n");
647 ret = spi_flash_cmd_write_disable(flash);
649 debug("SF: sst: program %s %zu bytes @ 0x%zx\n",
650 ret ? "failure" : "success", len, offset - actual);
652 spi_release_bus(spi);
657 #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST)
658 static void stm_get_locked_range(struct spi_flash *flash, u8 sr, loff_t *ofs,
661 u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
662 int shift = ffs(mask) - 1;
670 pow = ((sr & mask) ^ mask) >> shift;
671 *len = flash->size >> pow;
672 *ofs = flash->size - *len;
677 * Return 1 if the entire region is locked, 0 otherwise
679 static int stm_is_locked_sr(struct spi_flash *flash, u32 ofs, u32 len,
685 stm_get_locked_range(flash, sr, &lock_offs, &lock_len);
687 return (ofs + len <= lock_offs + lock_len) && (ofs >= lock_offs);
691 * Check if a region of the flash is (completely) locked. See stm_lock() for
694 * Returns 1 if entire region is locked, 0 if any portion is unlocked, and
695 * negative on errors.
697 int stm_is_locked(struct spi_flash *flash, u32 ofs, size_t len)
702 status = read_sr(flash, &sr);
706 return stm_is_locked_sr(flash, ofs, len, sr);
710 * Lock a region of the flash. Compatible with ST Micro and similar flash.
711 * Supports only the block protection bits BP{0,1,2} in the status register
712 * (SR). Does not support these features found in newer SR bitfields:
713 * - TB: top/bottom protect - only handle TB=0 (top protect)
714 * - SEC: sector/block protect - only handle SEC=0 (block protect)
715 * - CMP: complement protect - only support CMP=0 (range is not complemented)
717 * Sample table portion for 8MB flash (Winbond w25q64fw):
719 * SEC | TB | BP2 | BP1 | BP0 | Prot Length | Protected Portion
720 * --------------------------------------------------------------------------
721 * X | X | 0 | 0 | 0 | NONE | NONE
722 * 0 | 0 | 0 | 0 | 1 | 128 KB | Upper 1/64
723 * 0 | 0 | 0 | 1 | 0 | 256 KB | Upper 1/32
724 * 0 | 0 | 0 | 1 | 1 | 512 KB | Upper 1/16
725 * 0 | 0 | 1 | 0 | 0 | 1 MB | Upper 1/8
726 * 0 | 0 | 1 | 0 | 1 | 2 MB | Upper 1/4
727 * 0 | 0 | 1 | 1 | 0 | 4 MB | Upper 1/2
728 * X | X | 1 | 1 | 1 | 8 MB | ALL
730 * Returns negative on errors, 0 on success.
732 int stm_lock(struct spi_flash *flash, u32 ofs, size_t len)
734 u8 status_old, status_new;
735 u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
736 u8 shift = ffs(mask) - 1, pow, val;
739 ret = read_sr(flash, &status_old);
743 /* SPI NOR always locks to the end */
744 if (ofs + len != flash->size) {
745 /* Does combined region extend to end? */
746 if (!stm_is_locked_sr(flash, ofs + len, flash->size - ofs - len,
749 len = flash->size - ofs;
753 * Need smallest pow such that:
755 * 1 / (2^pow) <= (len / size)
757 * so (assuming power-of-2 size) we do:
759 * pow = ceil(log2(size / len)) = log2(size) - floor(log2(len))
761 pow = ilog2(flash->size) - ilog2(len);
762 val = mask - (pow << shift);
766 /* Don't "lock" with no region! */
770 status_new = (status_old & ~mask) | val;
772 /* Only modify protection if it will not unlock other areas */
773 if ((status_new & mask) <= (status_old & mask))
776 write_sr(flash, status_new);
782 * Unlock a region of the flash. See stm_lock() for more info
784 * Returns negative on errors, 0 on success.
786 int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len)
788 uint8_t status_old, status_new;
789 u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
790 u8 shift = ffs(mask) - 1, pow, val;
793 ret = read_sr(flash, &status_old);
797 /* Cannot unlock; would unlock larger region than requested */
798 if (stm_is_locked_sr(flash, ofs - flash->erase_size, flash->erase_size,
802 * Need largest pow such that:
804 * 1 / (2^pow) >= (len / size)
806 * so (assuming power-of-2 size) we do:
808 * pow = floor(log2(size / len)) = log2(size) - ceil(log2(len))
810 pow = ilog2(flash->size) - order_base_2(flash->size - (ofs + len));
811 if (ofs + len == flash->size) {
812 val = 0; /* fully unlocked */
814 val = mask - (pow << shift);
815 /* Some power-of-two sizes are not supported */
820 status_new = (status_old & ~mask) | val;
822 /* Only modify protection if it will not lock other areas */
823 if ((status_new & mask) >= (status_old & mask))
826 write_sr(flash, status_new);
833 #ifdef CONFIG_SPI_FLASH_MACRONIX
834 static int macronix_quad_enable(struct spi_flash *flash)
839 ret = read_sr(flash, &qeb_status);
843 if (qeb_status & STATUS_QEB_MXIC) {
844 debug("SF: mxic: QEB is already set\n");
846 ret = write_sr(flash, STATUS_QEB_MXIC);
855 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
856 static int spansion_quad_enable(struct spi_flash *flash)
861 ret = read_cr(flash, &qeb_status);
865 if (qeb_status & STATUS_QEB_WINSPAN)
868 ret = write_cr(flash, STATUS_QEB_WINSPAN);
872 /* read CR and check it */
873 ret = read_cr(flash, &qeb_status);
874 if (!(ret >= 0 && (qeb_status & STATUS_QEB_WINSPAN))) {
875 printf("SF: Spansion CR Quad bit not clear\n");
883 #ifdef CONFIG_SPI_FLASH_STMICRO
884 static int micron_quad_enable(struct spi_flash *flash)
889 ret = read_evcr(flash, &qeb_status);
893 if (!(qeb_status & STATUS_QEB_MICRON))
896 ret = write_evcr(flash, qeb_status & ~STATUS_QEB_MICRON);
900 /* read EVCR and check it */
901 ret = read_evcr(flash, &qeb_status);
902 if (!(ret >= 0 && !(qeb_status & STATUS_QEB_MICRON))) {
903 printf("SF: Micron EVCR Quad bit not clear\n");
911 static int set_quad_mode(struct spi_flash *flash, u8 idcode0)
914 #ifdef CONFIG_SPI_FLASH_MACRONIX
915 case SPI_FLASH_CFI_MFR_MACRONIX:
916 return macronix_quad_enable(flash);
918 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
919 case SPI_FLASH_CFI_MFR_SPANSION:
920 case SPI_FLASH_CFI_MFR_WINBOND:
921 return spansion_quad_enable(flash);
923 #ifdef CONFIG_SPI_FLASH_STMICRO
924 case SPI_FLASH_CFI_MFR_STMICRO:
925 return micron_quad_enable(flash);
928 printf("SF: Need set QEB func for %02x flash\n", idcode0);
933 #if CONFIG_IS_ENABLED(OF_CONTROL)
934 int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
940 /* If there is no node, do nothing */
941 node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH);
945 addr = fdtdec_get_addr_size(blob, node, "memory-map", &size);
946 if (addr == FDT_ADDR_T_NONE) {
947 debug("%s: Cannot decode address\n", __func__);
951 if (flash->size != size) {
952 debug("%s: Memory map must cover entire device\n", __func__);
955 flash->memory_map = map_sysmem(addr, size);
959 #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
961 int spi_flash_scan(struct spi_flash *flash)
963 struct spi_slave *spi = flash->spi;
964 const struct spi_flash_params *params;
965 u16 jedec, ext_jedec;
968 static u8 spi_read_cmds_array[] = {
971 CMD_READ_DUAL_OUTPUT_FAST,
972 CMD_READ_DUAL_IO_FAST,
973 CMD_READ_QUAD_OUTPUT_FAST,
974 CMD_READ_QUAD_IO_FAST };
976 /* Read the ID codes */
977 ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
979 printf("SF: Failed to get idcodes\n");
984 printf("SF: Got idcodes\n");
985 print_buffer(0, idcode, 1, sizeof(idcode), 0);
988 jedec = idcode[1] << 8 | idcode[2];
989 ext_jedec = idcode[3] << 8 | idcode[4];
991 /* Validate params from spi_flash_params table */
992 params = spi_flash_params_table;
993 for (; params->name != NULL; params++) {
994 if ((params->jedec >> 16) == idcode[0]) {
995 if ((params->jedec & 0xFFFF) == jedec) {
996 if (params->ext_jedec == 0)
998 else if (params->ext_jedec == ext_jedec)
1004 if (!params->name) {
1005 printf("SF: Unsupported flash IDs: ");
1006 printf("manuf %02x, jedec %04x, ext_jedec %04x\n",
1007 idcode[0], jedec, ext_jedec);
1008 return -EPROTONOSUPPORT;
1011 /* Flash powers up read-only, so clear BP# bits */
1012 if (idcode[0] == SPI_FLASH_CFI_MFR_ATMEL ||
1013 idcode[0] == SPI_FLASH_CFI_MFR_MACRONIX ||
1014 idcode[0] == SPI_FLASH_CFI_MFR_SST)
1017 /* Assign spi data */
1018 flash->name = params->name;
1019 flash->memory_map = spi->memory_map;
1020 flash->dual_flash = spi->option;
1022 /* Assign spi flash flags */
1023 if (params->flags & SST_WR)
1024 flash->flags |= SNOR_F_SST_WR;
1026 /* Assign spi_flash ops */
1027 #ifndef CONFIG_DM_SPI_FLASH
1028 flash->write = spi_flash_cmd_write_ops;
1029 #if defined(CONFIG_SPI_FLASH_SST)
1030 if (flash->flags & SNOR_F_SST_WR) {
1031 if (spi->mode & SPI_TX_BYTE)
1032 flash->write = sst_write_bp;
1034 flash->write = sst_write_wp;
1037 flash->erase = spi_flash_cmd_erase_ops;
1038 flash->read = spi_flash_cmd_read_ops;
1041 /* lock hooks are flash specific - assign them based on idcode0 */
1042 switch (idcode[0]) {
1043 #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST)
1044 case SPI_FLASH_CFI_MFR_STMICRO:
1045 case SPI_FLASH_CFI_MFR_SST:
1046 flash->flash_lock = stm_lock;
1047 flash->flash_unlock = stm_unlock;
1048 flash->flash_is_locked = stm_is_locked;
1052 debug("SF: Lock ops not supported for %02x flash\n", idcode[0]);
1055 /* Compute the flash size */
1056 flash->shift = (flash->dual_flash & SF_DUAL_PARALLEL_FLASH) ? 1 : 0;
1058 * The Spansion S25FL032P and S25FL064P have 256b pages, yet use the
1059 * 0x4d00 Extended JEDEC code. The rest of the Spansion flashes with
1060 * the 0x4d00 Extended JEDEC code have 512b pages. All of the others
1063 if (ext_jedec == 0x4d00) {
1064 if ((jedec == 0x0215) || (jedec == 0x216))
1065 flash->page_size = 256;
1067 flash->page_size = 512;
1069 flash->page_size = 256;
1071 flash->page_size <<= flash->shift;
1072 flash->sector_size = params->sector_size << flash->shift;
1073 flash->size = flash->sector_size * params->nr_sectors << flash->shift;
1074 #ifdef CONFIG_SF_DUAL_FLASH
1075 if (flash->dual_flash & SF_DUAL_STACKED_FLASH)
1079 /* Compute erase sector and command */
1080 if (params->flags & SECT_4K) {
1081 flash->erase_cmd = CMD_ERASE_4K;
1082 flash->erase_size = 4096 << flash->shift;
1083 } else if (params->flags & SECT_32K) {
1084 flash->erase_cmd = CMD_ERASE_32K;
1085 flash->erase_size = 32768 << flash->shift;
1087 flash->erase_cmd = CMD_ERASE_64K;
1088 flash->erase_size = flash->sector_size;
1091 /* Now erase size becomes valid sector size */
1092 flash->sector_size = flash->erase_size;
1094 /* Look for the fastest read cmd */
1095 cmd = fls(params->e_rd_cmd & spi->op_mode_rx);
1097 cmd = spi_read_cmds_array[cmd - 1];
1098 flash->read_cmd = cmd;
1100 /* Go for default supported read cmd */
1101 flash->read_cmd = CMD_READ_ARRAY_FAST;
1104 /* Not require to look for fastest only two write cmds yet */
1105 if (params->flags & WR_QPP && spi->mode & SPI_TX_QUAD)
1106 flash->write_cmd = CMD_QUAD_PAGE_PROGRAM;
1108 /* Go for default supported write cmd */
1109 flash->write_cmd = CMD_PAGE_PROGRAM;
1111 /* Set the quad enable bit - only for quad commands */
1112 if ((flash->read_cmd == CMD_READ_QUAD_OUTPUT_FAST) ||
1113 (flash->read_cmd == CMD_READ_QUAD_IO_FAST) ||
1114 (flash->write_cmd == CMD_QUAD_PAGE_PROGRAM)) {
1115 ret = set_quad_mode(flash, idcode[0]);
1117 debug("SF: Fail to set QEB for %02x\n", idcode[0]);
1122 /* Read dummy_byte: dummy byte is determined based on the
1123 * dummy cycles of a particular command.
1124 * Fast commands - dummy_byte = dummy_cycles/8
1125 * I/O commands- dummy_byte = (dummy_cycles * no.of lines)/8
1126 * For I/O commands except cmd[0] everything goes on no.of lines
1127 * based on particular command but incase of fast commands except
1128 * data all go on single line irrespective of command.
1130 switch (flash->read_cmd) {
1131 case CMD_READ_QUAD_IO_FAST:
1132 flash->dummy_byte = 2;
1134 case CMD_READ_ARRAY_SLOW:
1135 flash->dummy_byte = 0;
1138 flash->dummy_byte = 1;
1141 #ifdef CONFIG_SPI_FLASH_STMICRO
1142 if (params->flags & E_FSR)
1143 flash->flags |= SNOR_F_USE_FSR;
1146 /* Configure the BAR - discover bank cmds and read current bank */
1147 #ifdef CONFIG_SPI_FLASH_BAR
1148 ret = spi_flash_read_bar(flash, idcode[0]);
1153 #if CONFIG_IS_ENABLED(OF_CONTROL)
1154 ret = spi_flash_decode_fdt(gd->fdt_blob, flash);
1156 debug("SF: FDT decode error\n");
1161 #ifndef CONFIG_SPL_BUILD
1162 printf("SF: Detected %s with page size ", flash->name);
1163 print_size(flash->page_size, ", erase size ");
1164 print_size(flash->erase_size, ", total ");
1165 print_size(flash->size, "");
1166 if (flash->memory_map)
1167 printf(", mapped at %p", flash->memory_map);
1171 #ifndef CONFIG_SPI_FLASH_BAR
1172 if (((flash->dual_flash == SF_SINGLE_FLASH) &&
1173 (flash->size > SPI_FLASH_16MB_BOUN)) ||
1174 ((flash->dual_flash > SF_SINGLE_FLASH) &&
1175 (flash->size > SPI_FLASH_16MB_BOUN << 1))) {
1176 puts("SF: Warning - Only lower 16MiB accessible,");
1177 puts(" Full access #define CONFIG_SPI_FLASH_BAR\n");