git.sur5r.net Git - u-boot/blob - drivers/mtd/st_smi.c

   1 /*
   2  * (C) Copyright 2009
   3  * Vipin Kumar, ST Microelectronics, vipin.kumar@st.com.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #include <common.h>
  25 #include <flash.h>
  26 #include <linux/err.h>
  27 #include <linux/mtd/st_smi.h>
  28
  29 #include <asm/io.h>
  30 #include <asm/arch/hardware.h>
  31
  32 #if !defined(CONFIG_SYS_NO_FLASH)
  33
  34 static struct smi_regs *const smicntl =
  35     (struct smi_regs * const)CONFIG_SYS_SMI_BASE;
  36 static ulong bank_base[CONFIG_SYS_MAX_FLASH_BANKS] =
  37     CONFIG_SYS_FLASH_ADDR_BASE;
  38 flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
  39
  40 #define ST_M25Pxx_ID            0x00002020
  41
  42 static struct flash_dev flash_ids[] = {
  43         {0x10, 0x10000, 2},     /* 64K Byte */
  44         {0x11, 0x20000, 4},     /* 128K Byte */
  45         {0x12, 0x40000, 4},     /* 256K Byte */
  46         {0x13, 0x80000, 8},     /* 512K Byte */
  47         {0x14, 0x100000, 16},   /* 1M Byte */
  48         {0x15, 0x200000, 32},   /* 2M Byte */
  49         {0x16, 0x400000, 64},   /* 4M Byte */
  50         {0x17, 0x800000, 128},  /* 8M Byte */
  51         {0x18, 0x1000000, 64},  /* 16M Byte */
  52         {0x00,}
  53 };
  54
  55 /*
  56  * smi_wait_xfer_finish - Wait until TFF is set in status register
  57  * @timeout:     timeout in milliseconds
  58  *
  59  * Wait until TFF is set in status register
  60  */
  61 static int smi_wait_xfer_finish(int timeout)
  62 {
  63         do {
  64                 if (readl(&smicntl->smi_sr) & TFF)
  65                         return 0;
  66                 udelay(1000);
  67         } while (timeout--);
  68
  69         return -1;
  70 }
  71
  72 /*
  73  * smi_read_id - Read flash id
  74  * @info:        flash_info structure pointer
  75  * @banknum:     bank number
  76  *
  77  * Read the flash id present at bank #banknum
  78  */
  79 static unsigned int smi_read_id(flash_info_t *info, int banknum)
  80 {
  81         unsigned int value;
  82
  83         writel(readl(&smicntl->smi_cr1) | SW_MODE, &smicntl->smi_cr1);
  84         writel(READ_ID, &smicntl->smi_tr);
  85         writel((banknum << BANKSEL_SHIFT) | SEND | TX_LEN_1 | RX_LEN_3,
  86                &smicntl->smi_cr2);
  87
  88         if (smi_wait_xfer_finish(XFER_FINISH_TOUT))
  89                 return -EIO;
  90
  91         value = (readl(&smicntl->smi_rr) & 0x00FFFFFF);
  92
  93         writel(readl(&smicntl->smi_sr) & ~TFF, &smicntl->smi_sr);
  94         writel(readl(&smicntl->smi_cr1) & ~SW_MODE, &smicntl->smi_cr1);
  95
  96         return value;
  97 }
  98
  99 /*
 100  * flash_get_size - Detect the SMI flash by reading the ID.
 101  * @base:        Base address of the flash area bank #banknum
 102  * @banknum:     Bank number
 103  *
 104  * Detect the SMI flash by reading the ID. Initializes the flash_info structure
 105  * with size, sector count etc.
 106  */
 107 static ulong flash_get_size(ulong base, int banknum)
 108 {
 109         flash_info_t *info = &flash_info[banknum];
 110         struct flash_dev *dev;
 111         unsigned int value;
 112         unsigned int density;
 113         int i;
 114
 115         value = smi_read_id(info, banknum);
 116         density = (value >> 16) & 0xff;
 117
 118         for (i = 0, dev = &flash_ids[0]; dev->density != 0x0;
 119              i++, dev = &flash_ids[i]) {
 120                 if (dev->density == density) {
 121                         info->size = dev->size;
 122                         info->sector_count = dev->sector_count;
 123                         break;
 124                 }
 125         }
 126
 127         if (dev->density == 0x0)
 128                 return 0;
 129
 130         info->flash_id = value & 0xffff;
 131         info->start[0] = base;
 132
 133         return info->size;
 134 }
 135
 136 /*
 137  * smi_read_sr - Read status register of SMI
 138  * @bank:        bank number
 139  *
 140  * This routine will get the status register of the flash chip present at the
 141  * given bank
 142  */
 143 static unsigned int smi_read_sr(int bank)
 144 {
 145         u32 ctrlreg1;
 146
 147         /* store the CTRL REG1 state */
 148         ctrlreg1 = readl(&smicntl->smi_cr1);
 149
 150         /* Program SMI in HW Mode */
 151         writel(readl(&smicntl->smi_cr1) & ~(SW_MODE | WB_MODE),
 152                &smicntl->smi_cr1);
 153
 154         /* Performing a RSR instruction in HW mode */
 155         writel((bank << BANKSEL_SHIFT) | RD_STATUS_REG, &smicntl->smi_cr2);
 156
 157         if (smi_wait_xfer_finish(XFER_FINISH_TOUT))
 158                 return -1;
 159
 160         /* Restore the CTRL REG1 state */
 161         writel(ctrlreg1, &smicntl->smi_cr1);
 162
 163         return readl(&smicntl->smi_sr);
 164 }
 165
 166 /*
 167  * smi_wait_till_ready - Wait till last operation is over.
 168  * @bank:        bank number shifted.
 169  * @timeout:     timeout in milliseconds.
 170  *
 171  * This routine checks for WIP(write in progress)bit in Status register(SMSR-b0)
 172  * The routine checks for #timeout loops, each at interval of 1 milli-second.
 173  * If successful the routine returns 0.
 174  */
 175 static int smi_wait_till_ready(int bank, int timeout)
 176 {
 177         int count;
 178         unsigned int sr;
 179
 180         /* One chip guarantees max 5 msec wait here after page writes,
 181            but potentially three seconds (!) after page erase. */
 182         for (count = 0; count < timeout; count++) {
 183
 184                 sr = smi_read_sr(bank);
 185                 if (sr < 0)
 186                         break;
 187                 else if (!(sr & WIP_BIT))
 188                         return 0;
 189
 190                 /* Try again after 1m-sec */
 191                 udelay(1000);
 192         }
 193         printf("SMI controller is still in wait, timeout=%d\n", timeout);
 194         return -EIO;
 195 }
 196
 197 /*
 198  * smi_write_enable - Enable the flash to do write operation
 199  * @bank:        bank number
 200  *
 201  * Set write enable latch with Write Enable command.
 202  * Returns negative if error occurred.
 203  */
 204 static int smi_write_enable(int bank)
 205 {
 206         u32 ctrlreg1;
 207         int timeout = WMODE_TOUT;
 208
 209         /* Store the CTRL REG1 state */
 210         ctrlreg1 = readl(&smicntl->smi_cr1);
 211
 212         /* Program SMI in H/W Mode */
 213         writel(readl(&smicntl->smi_cr1) & ~SW_MODE, &smicntl->smi_cr1);
 214
 215         /* Give the Flash, Write Enable command */
 216         writel((bank << BANKSEL_SHIFT) | WE, &smicntl->smi_cr2);
 217
 218         if (smi_wait_xfer_finish(XFER_FINISH_TOUT))
 219                 return -1;
 220
 221         /* Restore the CTRL REG1 state */
 222         writel(ctrlreg1, &smicntl->smi_cr1);
 223
 224         while (timeout--) {
 225                 if (smi_read_sr(bank) & (1 << (bank + WM_SHIFT)))
 226                         break;
 227                 udelay(1000);
 228         }
 229
 230         if (timeout)
 231                 return 0;
 232
 233         return -1;
 234 }
 235
 236 /*
 237  * smi_init - SMI initialization routine
 238  *
 239  * SMI initialization routine. Sets SMI control register1.
 240  */
 241 void smi_init(void)
 242 {
 243         /* Setting the fast mode values. SMI working at 166/4 = 41.5 MHz */
 244         writel(HOLD1 | FAST_MODE | BANK_EN | DSEL_TIME | PRESCAL4,
 245                &smicntl->smi_cr1);
 246 }
 247
 248 /*
 249  * smi_sector_erase - Erase flash sector
 250  * @info:        flash_info structure pointer
 251  * @sector:      sector number
 252  *
 253  * Set write enable latch with Write Enable command.
 254  * Returns negative if error occurred.
 255  */
 256 static int smi_sector_erase(flash_info_t *info, unsigned int sector)
 257 {
 258         int bank;
 259         unsigned int sect_add;
 260         unsigned int instruction;
 261
 262         switch (info->start[0]) {
 263         case SMIBANK0_BASE:
 264                 bank = BANK0;
 265                 break;
 266         case SMIBANK1_BASE:
 267                 bank = BANK1;
 268                 break;
 269         case SMIBANK2_BASE:
 270                 bank = BANK2;
 271                 break;
 272         case SMIBANK3_BASE:
 273                 bank = BANK3;
 274                 break;
 275         default:
 276                 return -1;
 277         }
 278
 279         sect_add = sector * (info->size / info->sector_count);
 280         instruction = ((sect_add >> 8) & 0x0000FF00) | SECTOR_ERASE;
 281
 282         writel(readl(&smicntl->smi_sr) & ~(ERF1 | ERF2), &smicntl->smi_sr);
 283
 284         if (info->flash_id == ST_M25Pxx_ID) {
 285                 /* Wait until finished previous write command. */
 286                 if (smi_wait_till_ready(bank, CONFIG_SYS_FLASH_ERASE_TOUT))
 287                         return -EBUSY;
 288
 289                 /* Send write enable, before erase commands. */
 290                 if (smi_write_enable(bank))
 291                         return -EIO;
 292
 293                 /* Put SMI in SW mode */
 294                 writel(readl(&smicntl->smi_cr1) | SW_MODE, &smicntl->smi_cr1);
 295
 296                 /* Send Sector Erase command in SW Mode */
 297                 writel(instruction, &smicntl->smi_tr);
 298                 writel((bank << BANKSEL_SHIFT) | SEND | TX_LEN_4,
 299                        &smicntl->smi_cr2);
 300                 if (smi_wait_xfer_finish(XFER_FINISH_TOUT))
 301                         return -EIO;
 302
 303                 if (smi_wait_till_ready(bank, CONFIG_SYS_FLASH_ERASE_TOUT))
 304                         return -EBUSY;
 305
 306                 /* Put SMI in HW mode */
 307                 writel(readl(&smicntl->smi_cr1) & ~SW_MODE,
 308                        &smicntl->smi_cr1);
 309
 310                 return 0;
 311         } else {
 312                 /* Put SMI in HW mode */
 313                 writel(readl(&smicntl->smi_cr1) & ~SW_MODE,
 314                        &smicntl->smi_cr1);
 315                 return -EINVAL;
 316         }
 317 }
 318
 319 /*
 320  * smi_write - Write to SMI flash
 321  * @src_addr:    source buffer
 322  * @dst_addr:    destination buffer
 323  * @length:      length to write in words
 324  * @bank:        bank base address
 325  *
 326  * Write to SMI flash
 327  */
 328 static int smi_write(unsigned int *src_addr, unsigned int *dst_addr,
 329                      unsigned int length, ulong bank_addr)
 330 {
 331         int banknum;
 332
 333         switch (bank_addr) {
 334         case SMIBANK0_BASE:
 335                 banknum = BANK0;
 336                 break;
 337         case SMIBANK1_BASE:
 338                 banknum = BANK1;
 339                 break;
 340         case SMIBANK2_BASE:
 341                 banknum = BANK2;
 342                 break;
 343         case SMIBANK3_BASE:
 344                 banknum = BANK3;
 345                 break;
 346         default:
 347                 return -1;
 348         }
 349
 350         if (smi_wait_till_ready(banknum, CONFIG_SYS_FLASH_WRITE_TOUT))
 351                 return -EBUSY;
 352
 353         /* Set SMI in Hardware Mode */
 354         writel(readl(&smicntl->smi_cr1) & ~SW_MODE, &smicntl->smi_cr1);
 355
 356         if (smi_write_enable(banknum))
 357                 return -EIO;
 358
 359         /* Perform the write command */
 360         while (length--) {
 361                 if (((ulong) (dst_addr) % SFLASH_PAGE_SIZE) == 0) {
 362                         if (smi_wait_till_ready(banknum,
 363                                                 CONFIG_SYS_FLASH_WRITE_TOUT))
 364                                 return -EBUSY;
 365
 366                         if (smi_write_enable(banknum))
 367                                 return -EIO;
 368                 }
 369
 370                 *dst_addr++ = *src_addr++;
 371
 372                 if ((readl(&smicntl->smi_sr) & (ERF1 | ERF2)))
 373                         return -EIO;
 374         }
 375
 376         if (smi_wait_till_ready(banknum, CONFIG_SYS_FLASH_WRITE_TOUT))
 377                 return -EBUSY;
 378
 379         writel(readl(&smicntl->smi_sr) & ~(WCF), &smicntl->smi_sr);
 380
 381         return 0;
 382 }
 383
 384 /*
 385  * write_buff - Write to SMI flash
 386  * @info:        flash info structure
 387  * @src:         source buffer
 388  * @dest_addr:   destination buffer
 389  * @length:      length to write in words
 390  *
 391  * Write to SMI flash
 392  */
 393 int write_buff(flash_info_t *info, uchar *src, ulong dest_addr, ulong length)
 394 {
 395         return smi_write((unsigned int *)src, (unsigned int *)dest_addr,
 396                   (length + 3) / 4, info->start[0]);
 397 }
 398
 399 /*
 400  * flash_init - SMI flash initialization
 401  *
 402  * SMI flash initialization
 403  */
 404 unsigned long flash_init(void)
 405 {
 406         unsigned long size = 0;
 407         int i, j;
 408
 409         smi_init();
 410
 411         for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
 412                 flash_info[i].flash_id = FLASH_UNKNOWN;
 413                 size += flash_info[i].size = flash_get_size(bank_base[i], i);
 414         }
 415
 416         for (j = 0; j < CONFIG_SYS_MAX_FLASH_BANKS; j++) {
 417                 for (i = 1; i < flash_info[j].sector_count; i++)
 418                         flash_info[j].start[i] =
 419                             flash_info[j].start[i - 1] +
 420                             flash_info->size / flash_info->sector_count;
 421
 422         }
 423
 424         return size;
 425 }
 426
 427 /*
 428  * flash_print_info - Print SMI flash information
 429  *
 430  * Print SMI flash information
 431  */
 432 void flash_print_info(flash_info_t *info)
 433 {
 434         int i;
 435         if (info->flash_id == FLASH_UNKNOWN) {
 436                 puts("missing or unknown FLASH type\n");
 437                 return;
 438         }
 439         printf("  Size: %ld MB in %d Sectors\n",
 440                info->size >> 20, info->sector_count);
 441
 442         puts("  Sector Start Addresses:");
 443         for (i = 0; i < info->sector_count; ++i) {
 444 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
 445                 int size;
 446                 int erased;
 447                 u32 *flash;
 448
 449                 /*
 450                  * Check if whole sector is erased
 451                  */
 452                 size = (info->size) / (info->sector_count);
 453                 flash = (u32 *) info->start[i];
 454                 size = size / sizeof(int);
 455
 456                 while ((size--) && (*flash++ == ~0))
 457                         ;
 458
 459                 size++;
 460                 if (size)
 461                         erased = 0;
 462                 else
 463                         erased = 1;
 464
 465                 if ((i % 5) == 0)
 466                         printf("\n");
 467
 468                 printf(" %08lX%s%s",
 469                        info->start[i],
 470                        erased ? " E" : "  ", info->protect[i] ? "RO " : "   ");
 471 #else
 472                 if ((i % 5) == 0)
 473                         printf("\n   ");
 474                 printf(" %08lX%s",
 475                        info->start[i], info->protect[i] ? " (RO)  " : "     ");
 476 #endif
 477         }
 478         putc('\n');
 479         return;
 480 }
 481
 482 /*
 483  * flash_erase - Erase SMI flash
 484  *
 485  * Erase SMI flash
 486  */
 487 int flash_erase(flash_info_t *info, int s_first, int s_last)
 488 {
 489         int rcode = 0;
 490         int prot = 0;
 491         flash_sect_t sect;
 492
 493         if (info->flash_id != ST_M25Pxx_ID) {
 494                 puts("Can't erase unknown flash type - aborted\n");
 495                 return 1;
 496         }
 497
 498         if ((s_first < 0) || (s_first > s_last)) {
 499                 puts("- no sectors to erase\n");
 500                 return 1;
 501         }
 502
 503         for (sect = s_first; sect <= s_last; ++sect) {
 504                 if (info->protect[sect])
 505                         prot++;
 506         }
 507         if (prot) {
 508                 printf("- Warning: %d protected sectors will not be erased!\n",
 509                        prot);
 510         } else {
 511                 putc('\n');
 512         }
 513
 514         for (sect = s_first; sect <= s_last; sect++) {
 515                 if (info->protect[sect] == 0) {
 516                         if (smi_sector_erase(info, sect))
 517                                 rcode = 1;
 518                         else
 519                                 putc('.');
 520                 }
 521         }
 522         puts(" done\n");
 523         return rcode;
 524 }
 525 #endif