1 source "drivers/net/phy/Kconfig"
2 source "drivers/net/pfe_eth/Kconfig"
5 bool "Enable Driver Model for Ethernet drivers"
8 Enable driver model for Ethernet.
10 The eth_*() interface will be implemented by the UC_ETH class
11 This is currently implemented in net/eth.c
12 Look in include/net.h for details.
15 bool "Network device support"
19 You must select Y to enable any network device support
20 Generally if you have any networking support this is a given
27 bool "Enable GbE PHY status parsing and configuration"
29 Enables support for parsing the status output and for
30 configuring GbE PHYs (affects the inner workings of some
31 commands and miiphyutil.c).
34 bool "Atheros AG7xxx Ethernet MAC support"
35 depends on DM_ETH && ARCH_ATH79
38 This driver supports the Atheros AG7xxx Ethernet MAC. This MAC is
39 present in the Atheros AR7xxx, AR9xxx and QCA9xxx MIPS chips.
43 bool "Altera Triple-Speed Ethernet MAC support"
47 This driver supports the Altera Triple-Speed (TSE) Ethernet MAC.
48 Please find details on the "Triple-Speed Ethernet MegaCore Function
49 Resource Center" of Altera.
52 bool "Broadcom SF2 (Starfighter2) Ethernet support"
55 This is an abstract framework which provides a generic interface
56 to MAC and DMA management for multiple Broadcom SoCs such as
57 Cygnus, NSP and bcm28155_ap platforms.
59 config BCM_SF2_ETH_DEFAULT_PORT
60 int "Broadcom SF2 (Starfighter2) Ethernet default port number"
61 depends on BCM_SF2_ETH
64 Default port number for the Starfighter2 ethernet driver.
66 config BCM_SF2_ETH_GMAC
67 bool "Broadcom SF2 (Starfighter2) GMAC Ethernet support"
68 depends on BCM_SF2_ETH
70 This flag enables the ethernet support for Broadcom platforms with
71 GMAC such as Cygnus. This driver is based on the framework provided
72 by the BCM_SF2_ETH driver.
73 Say Y to any bcmcygnus based platforms.
76 bool "Synopsys DWC Ethernet QOS device support"
80 This driver supports the Synopsys Designware Ethernet QOS (Quality
81 Of Service) IP block. The IP supports many options for bus type,
82 clocking/reset structure, and feature list. This driver currently
83 supports the specific configuration used in NVIDIA's Tegra186 chip,
84 but should be extensible to other combinations quite easily.
87 bool "Intel PRO/1000 Gigabit Ethernet support"
89 This driver supports Intel(R) PRO/1000 gigabit ethernet family of
90 adapters. For more information on how to identify your adapter, go
91 to the Adapter & Driver ID Guide at:
93 <http://support.intel.com/support/network/adapter/pro100/21397.htm>
95 config E1000_SPI_GENERIC
96 bool "Allow access to the Intel 8257x SPI bus"
99 Allow generic access to the SPI bus on the Intel 8257x, for
100 example with the "sspi" command.
103 bool "Enable SPI bus utility code"
106 Utility code for direct access to the SPI bus on Intel 8257x.
107 This does not do anything useful unless you set at least one
108 of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC.
111 bool "Enable the e1000 command"
114 This enables the 'e1000' management command for E1000 devices. When
115 used on devices with SPI support you can reprogram the EEPROM from
119 depends on DM_ETH && SANDBOX
121 bool "Sandbox: Mocked Ethernet driver"
123 This driver simply responds with fake ARP replies and ping
124 replies that are used to verify network stack functionality
126 This driver is particularly useful in the test/dm/eth.c tests
128 config ETH_SANDBOX_RAW
129 depends on DM_ETH && SANDBOX
131 bool "Sandbox: Bridge to Linux Raw Sockets"
133 This driver is a bridge from the bottom of the network stack
134 in U-Boot to the RAW AF_PACKET API in Linux. This allows real
135 network traffic to be tested from within sandbox. See
136 board/sandbox/README.sandbox for more details.
138 config ETH_DESIGNWARE
139 bool "Synopsys Designware Ethernet MAC"
142 This MAC is present in SoCs from various vendors. It supports
143 100Mbit and 1 Gbit operation. You must enable CONFIG_PHYLIB to
144 provide the PHY (physical media interface).
147 bool "OpenCores 10/100 Mbps Ethernet MAC"
149 This MAC is present in OpenRISC and Xtensa XTFPGA boards.
152 bool "FEC Ethernet controller"
153 depends on MX5 || MX6
155 This driver supports the 10/100 Fast Ethernet controller for
159 bool "Ftmac100 Ethernet Support"
161 This MAC is present in Andestech SoCs.
164 bool "Marvell Armada XP/385/3700 network interface support"
165 depends on ARMADA_XP || ARMADA_38X || ARMADA_3700
168 This driver supports the network interface units in the
169 Marvell ARMADA XP, ARMADA 38X and ARMADA 3700 SoCs
172 bool "Marvell Armada 375/7K/8K network interface support"
173 depends on ARMADA_375 || ARMADA_8K
176 This driver supports the network interface units in the
177 Marvell ARMADA 375, 7K and 8K SoCs.
180 bool "Cadence MACB/GEM Ethernet Interface"
184 The Cadence MACB ethernet interface is found on many Atmel
185 AT91 and SAMA5 parts. This driver also supports the Cadence
186 GEM (Gigabit Ethernet MAC) found in some ARM SoC devices.
187 Say Y to include support for the MACB/GEM chip.
190 bool "Cadence MACB/GEM Ethernet Interface for Xilinx Zynq"
193 The Cadence MACB ethernet interface was used on Zynq platform.
194 Say Y to enable support for the MACB/GEM in Zynq chip.
197 bool "Intel Platform Controller Hub EG20T GMAC driver"
198 depends on DM_ETH && DM_PCI
201 This MAC is present in Intel Platform Controller Hub EG20T. It
202 supports 10/100/1000 Mbps operation.
207 Enable the support of the Reduced Gigabit Media-Independent
211 bool "Realtek 8139 series Ethernet controller driver"
213 This driver supports Realtek 8139 series fast ethernet family of
214 PCI chipsets/adapters.
217 bool "Realtek 8169 series Ethernet controller driver"
219 This driver supports Realtek 8169 series gigabit ethernet family of
220 PCI/PCIe chipsets/adapters.
223 bool "SMSC LAN911x and LAN921x controller driver"
228 hex "SMC911X Base Address"
230 Define this to hold the physical address
231 of the device (I/O space)
234 prompt "SMC911X bus width"
235 default SMC911X_16_BIT
237 config SMC911X_32_BIT
238 bool "Enable 32-bit interface"
240 config SMC911X_16_BIT
241 bool "Enable 16-bit interface"
243 Define this if data bus is 16 bits. If your processor
244 automatically converts one 32 bit word to two 16 bit
245 words you may also try CONFIG_SMC911X_32_BIT.
251 bool "Enable Allwinner GMAC Ethernet support"
253 Enable the support for Sun7i GMAC Ethernet controller
255 config SUN7I_GMAC_FORCE_TXERR
256 bool "Force PA17 as gmac function"
257 depends on SUN7I_GMAC
259 Some ethernet phys needs TXERR control. Since the GMAC
260 doesn't have such signal, setting PA17 as GMAC function
261 makes the pin output low, which enables data transmission.
264 bool "Allwinner Sun4i Ethernet MAC support"
268 This driver supports the Allwinner based SUN4I Ethernet MAC.
271 bool "Allwinner Sun8i Ethernet MAC support"
276 This driver supports the Allwinner based SUN8I/SUN50I Ethernet MAC.
277 It can be found in H3/A64/A83T based SoCs and compatible with both
278 External and Internal PHYs.
281 bool "Renesas SH Ethernet MAC"
284 This driver supports the Ethernet for Renesas SH and ARM SoCs.
286 config XILINX_AXIEMAC
287 depends on DM_ETH && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP)
290 bool "Xilinx AXI Ethernet"
292 This MAC is present in Xilinx Microblaze, Zynq and ZynqMP SoCs.
294 config XILINX_EMACLITE
295 depends on DM_ETH && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP || MIPS)
298 bool "Xilinx Ethernetlite"
300 This MAC is present in Xilinx Microblaze, Zynq and ZynqMP SoCs.
303 depends on DM_ETH && (ARCH_ZYNQ || ARCH_ZYNQMP)
305 bool "Xilinx Ethernet GEM"
307 This MAC is present in Xilinx Zynq and ZynqMP SoCs.
310 bool "Microchip PIC32 Ethernet Support"
311 depends on DM_ETH && MACH_PIC32
314 This driver implements 10/100 Mbps Ethernet and MAC layer for
315 Microchip PIC32 microcontrollers.
318 bool "Rockchip Synopsys Designware Ethernet MAC"
319 depends on DM_ETH && ETH_DESIGNWARE
321 This driver provides Rockchip SoCs network support based on the
322 Synopsys Designware driver.
325 bool "Renesas Ethernet AVB MAC"
326 depends on DM_ETH && RCAR_GEN3
329 This driver implements support for the Ethernet AVB block in
330 Renesas M3 and H3 SoCs.
333 bool "Fast Ethernet Controller on MPC8XX"
337 This driver implements support for the Fast Ethernet Controller
342 depends on MPC8XX_FEC
347 depends on ETHER_ON_FEC1
350 Define to the hardcoded PHY address which corresponds
351 to the given FEC; i. e.
352 #define CONFIG_FEC1_PHY 4
353 means that the PHY with address 4 is connected to FEC1
355 When set to -1, means to probe for first available.
359 depends on ETHER_ON_FEC1
362 The PHY does not have a RXERR line (RMII only).
363 (so program the FEC to ignore it).
367 depends on MPC8XX_FEC && MPC885
372 depends on ETHER_ON_FEC2
375 Define to the hardcoded PHY address which corresponds
376 to the given FEC; i. e.
377 #define CONFIG_FEC1_PHY 4
378 means that the PHY with address 4 is connected to FEC1
380 When set to -1, means to probe for first available.
382 config FEC2_PHY_NORXERR
384 depends on ETHER_ON_FEC2
387 The PHY does not have a RXERR line (RMII only).
388 (so program the FEC to ignore it).
390 config SYS_DPAA_QBMAN
391 bool "Device tree fixup for QBMan on freescale SOCs"
392 depends on (ARM || PPC) && !SPL_BUILD
393 default y if ARCH_B4860 || \
412 QBman fixups to allow deep sleep in DPAA 1 SOCs