2 * Copyright 2011-2015 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
9 #include <fdt_support.h>
11 #ifdef CONFIG_FSL_LAYERSCAPE
12 #include <asm/arch/fsl_serdes.h>
14 #include <asm/fsl_serdes.h>
19 struct fm_eth_info fm_info[] = {
20 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 1)
21 FM_DTSEC_INFO_INITIALIZER(1, 1),
23 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 2)
24 FM_DTSEC_INFO_INITIALIZER(1, 2),
26 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 3)
27 FM_DTSEC_INFO_INITIALIZER(1, 3),
29 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 4)
30 FM_DTSEC_INFO_INITIALIZER(1, 4),
32 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 5)
33 FM_DTSEC_INFO_INITIALIZER(1, 5),
35 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 6)
36 FM_DTSEC_INFO_INITIALIZER(1, 6),
38 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 7)
39 FM_DTSEC_INFO_INITIALIZER(1, 9),
41 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 8)
42 FM_DTSEC_INFO_INITIALIZER(1, 10),
44 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 1)
45 FM_DTSEC_INFO_INITIALIZER(2, 1),
47 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 2)
48 FM_DTSEC_INFO_INITIALIZER(2, 2),
50 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 3)
51 FM_DTSEC_INFO_INITIALIZER(2, 3),
53 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 4)
54 FM_DTSEC_INFO_INITIALIZER(2, 4),
56 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 5)
57 FM_DTSEC_INFO_INITIALIZER(2, 5),
59 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 6)
60 FM_DTSEC_INFO_INITIALIZER(2, 6),
62 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 7)
63 FM_DTSEC_INFO_INITIALIZER(2, 9),
65 #if (CONFIG_SYS_NUM_FM2_DTSEC >= 8)
66 FM_DTSEC_INFO_INITIALIZER(2, 10),
68 #if (CONFIG_SYS_NUM_FM1_10GEC >= 1)
69 FM_TGEC_INFO_INITIALIZER(1, 1),
71 #if (CONFIG_SYS_NUM_FM1_10GEC >= 2)
72 FM_TGEC_INFO_INITIALIZER(1, 2),
74 #if (CONFIG_SYS_NUM_FM1_10GEC >= 3)
75 FM_TGEC_INFO_INITIALIZER2(1, 3),
77 #if (CONFIG_SYS_NUM_FM1_10GEC >= 4)
78 FM_TGEC_INFO_INITIALIZER2(1, 4),
80 #if (CONFIG_SYS_NUM_FM2_10GEC >= 1)
81 FM_TGEC_INFO_INITIALIZER(2, 1),
83 #if (CONFIG_SYS_NUM_FM2_10GEC >= 2)
84 FM_TGEC_INFO_INITIALIZER(2, 2),
88 int fm_standard_init(bd_t *bis)
91 struct ccsr_fman *reg;
93 reg = (void *)CONFIG_SYS_FSL_FM1_ADDR;
94 if (fm_init_common(0, reg))
97 for (i = 0; i < ARRAY_SIZE(fm_info); i++) {
98 if ((fm_info[i].enabled) && (fm_info[i].index == 1))
99 fm_eth_initialize(reg, &fm_info[i]);
102 #if (CONFIG_SYS_NUM_FMAN == 2)
103 reg = (void *)CONFIG_SYS_FSL_FM2_ADDR;
104 if (fm_init_common(1, reg))
107 for (i = 0; i < ARRAY_SIZE(fm_info); i++) {
108 if ((fm_info[i].enabled) && (fm_info[i].index == 2))
109 fm_eth_initialize(reg, &fm_info[i]);
116 /* simple linear search to map from port to array index */
117 static int fm_port_to_index(enum fm_port port)
121 for (i = 0; i < ARRAY_SIZE(fm_info); i++) {
122 if (fm_info[i].port == port)
130 * Determine if an interface is actually active based on HW config
131 * we expect fman_port_enet_if() to report PHY_INTERFACE_MODE_NONE if
132 * the interface is not active based on HW cfg of the SoC
134 void fman_enet_init(void)
138 for (i = 0; i < ARRAY_SIZE(fm_info); i++) {
139 phy_interface_t enet_if;
141 enet_if = fman_port_enet_if(fm_info[i].port);
142 if (enet_if != PHY_INTERFACE_MODE_NONE) {
143 fm_info[i].enabled = 1;
144 fm_info[i].enet_if = enet_if;
146 fm_info[i].enabled = 0;
153 void fm_disable_port(enum fm_port port)
155 int i = fm_port_to_index(port);
160 fm_info[i].enabled = 0;
161 #ifndef CONFIG_SYS_FMAN_V3
162 fman_disable_port(port);
166 void fm_enable_port(enum fm_port port)
168 int i = fm_port_to_index(port);
173 fm_info[i].enabled = 1;
174 fman_enable_port(port);
177 void fm_info_set_mdio(enum fm_port port, struct mii_dev *bus)
179 int i = fm_port_to_index(port);
184 fm_info[i].bus = bus;
187 void fm_info_set_phy_address(enum fm_port port, int address)
189 int i = fm_port_to_index(port);
194 fm_info[i].phy_addr = address;
198 * Returns the PHY address for a given Fman port
200 * The port must be set via a prior call to fm_info_set_phy_address().
201 * A negative error code is returned if the port is invalid.
203 int fm_info_get_phy_address(enum fm_port port)
205 int i = fm_port_to_index(port);
210 return fm_info[i].phy_addr;
214 * Returns the type of the data interface between the given MAC and its PHY.
215 * This is typically determined by the RCW.
217 phy_interface_t fm_info_get_enet_if(enum fm_port port)
219 int i = fm_port_to_index(port);
222 return PHY_INTERFACE_MODE_NONE;
224 if (fm_info[i].enabled)
225 return fm_info[i].enet_if;
227 return PHY_INTERFACE_MODE_NONE;
231 __def_board_ft_fman_fixup_port(void *blob, char * prop, phys_addr_t pa,
232 enum fm_port port, int offset)
237 void board_ft_fman_fixup_port(void *blob, char * prop, phys_addr_t pa,
238 enum fm_port port, int offset)
239 __attribute__((weak, alias("__def_board_ft_fman_fixup_port")));
241 int ft_fixup_port(void *blob, struct fm_eth_info *info, char *prop)
245 phys_addr_t paddr = CONFIG_SYS_CCSRBAR_PHYS + info->compat_offset;
246 #ifndef CONFIG_SYS_FMAN_V3
247 u64 dtsec1_addr = (u64)CONFIG_SYS_CCSRBAR_PHYS +
248 CONFIG_SYS_FSL_FM1_DTSEC1_OFFSET;
251 off = fdt_node_offset_by_compat_reg(blob, prop, paddr);
252 if (off == -FDT_ERR_NOTFOUND)
256 fdt_fixup_phy_connection(blob, off, info->enet_if);
257 board_ft_fman_fixup_port(blob, prop, paddr, info->port, off);
261 #ifdef CONFIG_SYS_FMAN_V3
262 #ifndef CONFIG_FSL_FM_10GEC_REGULAR_NOTATION
264 * On T2/T4 SoCs, physically FM1_DTSEC9 and FM1_10GEC1 use the same
265 * dual-role MAC, when FM1_10GEC1 is enabled and FM1_DTSEC9
266 * is disabled, ensure that the dual-role MAC is not disabled,
267 * ditto for other dual-role MACs.
269 if (((info->port == FM1_DTSEC9) && (PORT_IS_ENABLED(FM1_10GEC1))) ||
270 ((info->port == FM1_DTSEC10) && (PORT_IS_ENABLED(FM1_10GEC2))) ||
271 ((info->port == FM1_DTSEC1) && (PORT_IS_ENABLED(FM1_10GEC3))) ||
272 ((info->port == FM1_DTSEC2) && (PORT_IS_ENABLED(FM1_10GEC4))) ||
273 ((info->port == FM1_10GEC1) && (PORT_IS_ENABLED(FM1_DTSEC9))) ||
274 ((info->port == FM1_10GEC2) && (PORT_IS_ENABLED(FM1_DTSEC10))) ||
275 ((info->port == FM1_10GEC3) && (PORT_IS_ENABLED(FM1_DTSEC1))) ||
276 ((info->port == FM1_10GEC4) && (PORT_IS_ENABLED(FM1_DTSEC2)))
277 #if (CONFIG_SYS_NUM_FMAN == 2)
279 ((info->port == FM2_DTSEC9) && (PORT_IS_ENABLED(FM2_10GEC1))) ||
280 ((info->port == FM2_DTSEC10) && (PORT_IS_ENABLED(FM2_10GEC2))) ||
281 ((info->port == FM2_10GEC1) && (PORT_IS_ENABLED(FM2_DTSEC9))) ||
282 ((info->port == FM2_10GEC2) && (PORT_IS_ENABLED(FM2_DTSEC10)))
285 /* FM1_DTSECx and FM1_10GECx use the same dual-role MAC */
286 if (((info->port == FM1_DTSEC1) && (PORT_IS_ENABLED(FM1_10GEC1))) ||
287 ((info->port == FM1_DTSEC2) && (PORT_IS_ENABLED(FM1_10GEC2))) ||
288 ((info->port == FM1_DTSEC3) && (PORT_IS_ENABLED(FM1_10GEC3))) ||
289 ((info->port == FM1_DTSEC4) && (PORT_IS_ENABLED(FM1_10GEC4))) ||
290 ((info->port == FM1_10GEC1) && (PORT_IS_ENABLED(FM1_DTSEC1))) ||
291 ((info->port == FM1_10GEC2) && (PORT_IS_ENABLED(FM1_DTSEC2))) ||
292 ((info->port == FM1_10GEC3) && (PORT_IS_ENABLED(FM1_DTSEC3))) ||
293 ((info->port == FM1_10GEC4) && (PORT_IS_ENABLED(FM1_DTSEC4)))
298 /* board code might have caused offset to change */
299 off = fdt_node_offset_by_compat_reg(blob, prop, paddr);
301 #ifndef CONFIG_SYS_FMAN_V3
302 /* Don't disable FM1-DTSEC1 MAC as its used for MDIO */
303 if (paddr != dtsec1_addr)
305 fdt_status_disabled(blob, off); /* disable the MAC node */
307 /* disable the fsl,dpa-ethernet node that points to the MAC */
308 ph = fdt_get_phandle(blob, off);
309 do_fixup_by_prop(blob, "fsl,fman-mac", &ph, sizeof(ph),
310 "status", "disabled", strlen("disabled") + 1, 1);
315 void fdt_fixup_fman_ethernet(void *blob)
319 #ifdef CONFIG_SYS_FMAN_V3
320 for (i = 0; i < ARRAY_SIZE(fm_info); i++)
321 ft_fixup_port(blob, &fm_info[i], "fsl,fman-memac");
323 for (i = 0; i < ARRAY_SIZE(fm_info); i++) {
324 /* Try the new compatible first.
325 * If the node is missing, try the old.
327 if (fm_info[i].type == FM_ETH_1G_E) {
328 if (ft_fixup_port(blob, &fm_info[i], "fsl,fman-dtsec"))
329 ft_fixup_port(blob, &fm_info[i],
332 if (ft_fixup_port(blob, &fm_info[i], "fsl,fman-tgec"))
333 ft_fixup_port(blob, &fm_info[i],
340 /*QSGMII Riser Card can work in SGMII mode, but the PHY address is different.
341 *This function scans which Riser Card being used(QSGMII or SGMII Riser Card),
342 *then set the correct PHY address
344 void set_sgmii_phy(struct mii_dev *bus, enum fm_port base_port,
345 unsigned int port_num, int phy_base_addr)
347 unsigned int regnum = 0;
352 qsgmii = is_qsgmii_riser_card(bus, phy_base_addr, port_num, regnum);
357 for (i = base_port; i < base_port + port_num; i++) {
358 if (fm_info_get_enet_if(i) == PHY_INTERFACE_MODE_SGMII) {
359 phy_real_addr = phy_base_addr + i - base_port;
360 fm_info_set_phy_address(i, phy_real_addr);
365 /*to check whether qsgmii riser card is used*/
366 int is_qsgmii_riser_card(struct mii_dev *bus, int phy_base_addr,
367 unsigned int port_num, unsigned regnum)
375 for (i = phy_base_addr; i < phy_base_addr + port_num; i++) {
376 val = bus->read(bus, i, MDIO_DEVAD_NONE, regnum);
377 if (val != MIIM_TIMEOUT)