2 * Copyright 2012 Freescale Semiconductor, Inc.
3 * Roy Zang <tie-fei.zang@freescale.com>
5 * SPDX-License-Identifier: GPL-2.0+
8 /* MAXFRM - maximum frame length */
9 #define MAXFRM_MASK 0x0000ffff
13 #include <asm/types.h>
15 #include <asm/fsl_enet.h>
16 #include <asm/fsl_memac.h>
20 static void memac_init_mac(struct fsl_enet_mac *mac)
22 struct memac *regs = mac->base;
24 /* mask all interrupt */
25 out_be32(®s->imask, IMASK_MASK_ALL);
27 /* clear all events */
28 out_be32(®s->ievent, IEVENT_CLEAR_ALL);
30 /* set the max receive length */
31 out_be32(®s->maxfrm, mac->max_rx_len & MAXFRM_MASK);
33 /* multicast frame reception for the hash entry disable */
34 out_be32(®s->hashtable_ctrl, 0);
37 static void memac_enable_mac(struct fsl_enet_mac *mac)
39 struct memac *regs = mac->base;
41 setbits_be32(®s->command_config, MEMAC_CMD_CFG_RXTX_EN);
44 static void memac_disable_mac(struct fsl_enet_mac *mac)
46 struct memac *regs = mac->base;
48 clrbits_be32(®s->command_config, MEMAC_CMD_CFG_RXTX_EN);
51 static void memac_set_mac_addr(struct fsl_enet_mac *mac, u8 *mac_addr)
53 struct memac *regs = mac->base;
54 u32 mac_addr0, mac_addr1;
57 * if a station address of 0x12345678ABCD, perform a write to
58 * MAC_ADDR0 of 0x78563412, MAC_ADDR1 of 0x0000CDAB
60 mac_addr0 = (mac_addr[3] << 24) | (mac_addr[2] << 16) | \
61 (mac_addr[1] << 8) | (mac_addr[0]);
62 out_be32(®s->mac_addr_0, mac_addr0);
64 mac_addr1 = ((mac_addr[5] << 8) | mac_addr[4]) & 0x0000ffff;
65 out_be32(®s->mac_addr_1, mac_addr1);
68 static void memac_set_interface_mode(struct fsl_enet_mac *mac,
69 phy_interface_t type, int speed)
71 /* Roy need more work here */
73 struct memac *regs = mac->base;
74 u32 if_mode, if_status;
76 /* clear all bits relative with interface mode */
77 if_mode = in_be32(®s->if_mode);
78 if_status = in_be32(®s->if_status);
80 /* set interface mode */
82 case PHY_INTERFACE_MODE_GMII:
83 if_mode &= ~IF_MODE_MASK;
84 if_mode |= IF_MODE_GMII;
86 case PHY_INTERFACE_MODE_RGMII:
87 if_mode |= (IF_MODE_GMII | IF_MODE_RG);
89 case PHY_INTERFACE_MODE_RMII:
90 if_mode |= (IF_MODE_GMII | IF_MODE_RM);
92 case PHY_INTERFACE_MODE_SGMII:
93 case PHY_INTERFACE_MODE_QSGMII:
94 if_mode &= ~IF_MODE_MASK;
95 if_mode |= (IF_MODE_GMII);
100 /* Enable automatic speed selection */
101 if_mode |= IF_MODE_EN_AUTO;
103 if (type == PHY_INTERFACE_MODE_RGMII) {
104 if_mode &= ~IF_MODE_EN_AUTO;
105 if_mode &= ~IF_MODE_SETSP_MASK;
108 if_mode |= IF_MODE_SETSP_1000M;
111 if_mode |= IF_MODE_SETSP_100M;
114 if_mode |= IF_MODE_SETSP_10M;
120 debug(" %s, if_mode = %x\n", __func__, if_mode);
121 debug(" %s, if_status = %x\n", __func__, if_status);
122 out_be32(®s->if_mode, if_mode);
126 void init_memac(struct fsl_enet_mac *mac, void *base,
127 void *phyregs, int max_rx_len)
130 mac->phyregs = phyregs;
131 mac->max_rx_len = max_rx_len;
132 mac->init_mac = memac_init_mac;
133 mac->enable_mac = memac_enable_mac;
134 mac->disable_mac = memac_disable_mac;
135 mac->set_mac_addr = memac_set_mac_addr;
136 mac->set_if_mode = memac_set_interface_mode;