git.sur5r.net Git - u-boot/blob - drivers/net/gmac_rockchip.c

   1 /*
   2  * (C) Copyright 2015 Sjoerd Simons <sjoerd.simons@collabora.co.uk>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  *
   6  * Rockchip GMAC ethernet IP driver for U-Boot
   7  */
   8
   9 #include <common.h>
  10 #include <dm.h>
  11 #include <clk.h>
  12 #include <phy.h>
  13 #include <syscon.h>
  14 #include <asm/io.h>
  15 #include <asm/arch/periph.h>
  16 #include <asm/arch/clock.h>
  17 #include <asm/arch/hardware.h>
  18 #include <asm/arch/grf_rk3288.h>
  19 #include <asm/arch/grf_rk3399.h>
  20 #include <dm/pinctrl.h>
  21 #include <dt-bindings/clock/rk3288-cru.h>
  22 #include "designware.h"
  23
  24 DECLARE_GLOBAL_DATA_PTR;
  25
  26 /*
  27  * Platform data for the gmac
  28  *
  29  * dw_eth_pdata: Required platform data for designware driver (must be first)
  30  */
  31 struct gmac_rockchip_platdata {
  32         struct dw_eth_pdata dw_eth_pdata;
  33         int tx_delay;
  34         int rx_delay;
  35 };
  36
  37 struct rk_gmac_ops {
  38         int (*fix_mac_speed)(struct dw_eth_dev *priv);
  39         void (*set_to_rgmii)(struct gmac_rockchip_platdata *pdata);
  40 };
  41
  42
  43 static int gmac_rockchip_ofdata_to_platdata(struct udevice *dev)
  44 {
  45         struct gmac_rockchip_platdata *pdata = dev_get_platdata(dev);
  46
  47         /* Check the new naming-style first... */
  48         pdata->tx_delay = dev_read_u32_default(dev, "tx_delay", -ENOENT);
  49         pdata->rx_delay = dev_read_u32_default(dev, "rx_delay", -ENOENT);
  50
  51         /* ... and fall back to the old naming style or default, if necessary */
  52         if (pdata->tx_delay == -ENOENT)
  53                 pdata->tx_delay = dev_read_u32_default(dev, "tx-delay", 0x30);
  54         if (pdata->rx_delay == -ENOENT)
  55                 pdata->rx_delay = dev_read_u32_default(dev, "rx-delay", 0x10);
  56
  57         return designware_eth_ofdata_to_platdata(dev);
  58 }
  59
  60 static int rk3288_gmac_fix_mac_speed(struct dw_eth_dev *priv)
  61 {
  62         struct rk3288_grf *grf;
  63         int clk;
  64
  65         switch (priv->phydev->speed) {
  66         case 10:
  67                 clk = RK3288_GMAC_CLK_SEL_2_5M;
  68                 break;
  69         case 100:
  70                 clk = RK3288_GMAC_CLK_SEL_25M;
  71                 break;
  72         case 1000:
  73                 clk = RK3288_GMAC_CLK_SEL_125M;
  74                 break;
  75         default:
  76                 debug("Unknown phy speed: %d\n", priv->phydev->speed);
  77                 return -EINVAL;
  78         }
  79
  80         grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
  81         rk_clrsetreg(&grf->soc_con1, RK3288_GMAC_CLK_SEL_MASK, clk);
  82
  83         return 0;
  84 }
  85
  86 static int rk3399_gmac_fix_mac_speed(struct dw_eth_dev *priv)
  87 {
  88         struct rk3399_grf_regs *grf;
  89         int clk;
  90
  91         switch (priv->phydev->speed) {
  92         case 10:
  93                 clk = RK3399_GMAC_CLK_SEL_2_5M;
  94                 break;
  95         case 100:
  96                 clk = RK3399_GMAC_CLK_SEL_25M;
  97                 break;
  98         case 1000:
  99                 clk = RK3399_GMAC_CLK_SEL_125M;
 100                 break;
 101         default:
 102                 debug("Unknown phy speed: %d\n", priv->phydev->speed);
 103                 return -EINVAL;
 104         }
 105
 106         grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 107         rk_clrsetreg(&grf->soc_con5, RK3399_GMAC_CLK_SEL_MASK, clk);
 108
 109         return 0;
 110 }
 111
 112 static void rk3288_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
 113 {
 114         struct rk3288_grf *grf;
 115
 116         grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 117         rk_clrsetreg(&grf->soc_con1,
 118                      RK3288_RMII_MODE_MASK | RK3288_GMAC_PHY_INTF_SEL_MASK,
 119                      RK3288_GMAC_PHY_INTF_SEL_RGMII);
 120
 121         rk_clrsetreg(&grf->soc_con3,
 122                      RK3288_RXCLK_DLY_ENA_GMAC_MASK |
 123                      RK3288_TXCLK_DLY_ENA_GMAC_MASK |
 124                      RK3288_CLK_RX_DL_CFG_GMAC_MASK |
 125                      RK3288_CLK_TX_DL_CFG_GMAC_MASK,
 126                      RK3288_RXCLK_DLY_ENA_GMAC_ENABLE |
 127                      RK3288_TXCLK_DLY_ENA_GMAC_ENABLE |
 128                      pdata->rx_delay << RK3288_CLK_RX_DL_CFG_GMAC_SHIFT |
 129                      pdata->tx_delay << RK3288_CLK_TX_DL_CFG_GMAC_SHIFT);
 130 }
 131
 132 static void rk3399_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
 133 {
 134         struct rk3399_grf_regs *grf;
 135
 136         grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 137
 138         rk_clrsetreg(&grf->soc_con5,
 139                      RK3399_GMAC_PHY_INTF_SEL_MASK,
 140                      RK3399_GMAC_PHY_INTF_SEL_RGMII);
 141
 142         rk_clrsetreg(&grf->soc_con6,
 143                      RK3399_RXCLK_DLY_ENA_GMAC_MASK |
 144                      RK3399_TXCLK_DLY_ENA_GMAC_MASK |
 145                      RK3399_CLK_RX_DL_CFG_GMAC_MASK |
 146                      RK3399_CLK_TX_DL_CFG_GMAC_MASK,
 147                      RK3399_RXCLK_DLY_ENA_GMAC_ENABLE |
 148                      RK3399_TXCLK_DLY_ENA_GMAC_ENABLE |
 149                      pdata->rx_delay << RK3399_CLK_RX_DL_CFG_GMAC_SHIFT |
 150                      pdata->tx_delay << RK3399_CLK_TX_DL_CFG_GMAC_SHIFT);
 151 }
 152
 153 static int gmac_rockchip_probe(struct udevice *dev)
 154 {
 155         struct gmac_rockchip_platdata *pdata = dev_get_platdata(dev);
 156         struct rk_gmac_ops *ops =
 157                 (struct rk_gmac_ops *)dev_get_driver_data(dev);
 158         struct clk clk;
 159         int ret;
 160
 161         ret = clk_get_by_index(dev, 0, &clk);
 162         if (ret)
 163                 return ret;
 164
 165         /* Since mac_clk is fed by an external clock we can use 0 here */
 166         ret = clk_set_rate(&clk, 0);
 167         if (ret)
 168                 return ret;
 169
 170         /* Set to RGMII mode */
 171         ops->set_to_rgmii(pdata);
 172
 173         return designware_eth_probe(dev);
 174 }
 175
 176 static int gmac_rockchip_eth_start(struct udevice *dev)
 177 {
 178         struct eth_pdata *pdata = dev_get_platdata(dev);
 179         struct dw_eth_dev *priv = dev_get_priv(dev);
 180         struct rk_gmac_ops *ops =
 181                 (struct rk_gmac_ops *)dev_get_driver_data(dev);
 182         int ret;
 183
 184         ret = designware_eth_init(priv, pdata->enetaddr);
 185         if (ret)
 186                 return ret;
 187         ret = ops->fix_mac_speed(priv);
 188         if (ret)
 189                 return ret;
 190         ret = designware_eth_enable(priv);
 191         if (ret)
 192                 return ret;
 193
 194         return 0;
 195 }
 196
 197 const struct eth_ops gmac_rockchip_eth_ops = {
 198         .start                  = gmac_rockchip_eth_start,
 199         .send                   = designware_eth_send,
 200         .recv                   = designware_eth_recv,
 201         .free_pkt               = designware_eth_free_pkt,
 202         .stop                   = designware_eth_stop,
 203         .write_hwaddr           = designware_eth_write_hwaddr,
 204 };
 205
 206 const struct rk_gmac_ops rk3288_gmac_ops = {
 207         .fix_mac_speed = rk3288_gmac_fix_mac_speed,
 208         .set_to_rgmii = rk3288_gmac_set_to_rgmii,
 209 };
 210
 211 const struct rk_gmac_ops rk3399_gmac_ops = {
 212         .fix_mac_speed = rk3399_gmac_fix_mac_speed,
 213         .set_to_rgmii = rk3399_gmac_set_to_rgmii,
 214 };
 215
 216 static const struct udevice_id rockchip_gmac_ids[] = {
 217         { .compatible = "rockchip,rk3288-gmac",
 218           .data = (ulong)&rk3288_gmac_ops },
 219         { .compatible = "rockchip,rk3399-gmac",
 220           .data = (ulong)&rk3399_gmac_ops },
 221         { }
 222 };
 223
 224 U_BOOT_DRIVER(eth_gmac_rockchip) = {
 225         .name   = "gmac_rockchip",
 226         .id     = UCLASS_ETH,
 227         .of_match = rockchip_gmac_ids,
 228         .ofdata_to_platdata = gmac_rockchip_ofdata_to_platdata,
 229         .probe  = gmac_rockchip_probe,
 230         .ops    = &gmac_rockchip_eth_ops,
 231         .priv_auto_alloc_size = sizeof(struct dw_eth_dev),
 232         .platdata_auto_alloc_size = sizeof(struct gmac_rockchip_platdata),
 233         .flags = DM_FLAG_ALLOC_PRIV_DMA,
 234 };