3 * @file IxAtmdAccCtrl.h
7 * @brief IxAtmdAcc Public API
9 * This file contains the public API of IxAtmdAcc, related to the
10 * control functions of the component.
14 * IXP400 SW Release version 2.0
16 * -- Copyright Notice --
19 * Copyright 2001-2005, Intel Corporation.
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24 * modification, are permitted provided that the following conditions
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49 * -- End of Copyright Notice --
52 /* ------------------------------------------------------
53 Doxygen group definitions
54 ------------------------------------------------------ */
58 * @defgroup IxAtmdAccCtrlAPI IXP400 ATM Driver Access (IxAtmdAcc) Control API
60 * @brief The public API for the IXP400 Atm Driver Control component
62 * IxAtmdAcc is the low level interface by which AAL PDU get transmitted
63 * to,and received from the Utopia bus
65 * This part is related to the Control configuration
70 #ifndef IXATMDACCCTRL_H
71 #define IXATMDACCCTRL_H
73 #include "IxAtmdAcc.h"
75 /* ------------------------------------------------------
76 AtmdAccCtrl Data Types definition
77 ------------------------------------------------------ */
81 * @ingroup IxAtmdAccCtrlAPI
83 * @def IX_ATMDACC_PORT_DISABLE_IN_PROGRESS
85 * @brief Port enable return code
87 * This constant is used to tell IxAtmDAcc user that the port disable
88 * functions are not complete. The user can call ixAtmdAccPortDisableComplete()
89 * to find out when the disable has finished. The port enable can then proceed.
92 #define IX_ATMDACC_PORT_DISABLE_IN_PROGRESS 5
96 * @ingroup IxAtmdAccCtrlAPI
98 * @def IX_ATMDACC_ALLPDUS
102 * This constant is used to tell IxAtmDAcc to process all PDUs from
103 * the RX queue or the TX Done
105 * @sa IxAtmdAccRxDispatcher
106 * @sa IxAtmdAccTxDoneDispatcher
109 #define IX_ATMDACC_ALLPDUS 0xffffffff
111 /* ------------------------------------------------------
112 Part of the IxAtmdAcc interface related to RX traffic
113 ------------------------------------------------------ */
117 * @ingroup IxAtmdAccCtrlAPI
119 * @brief Callback prototype for notification of available PDUs for
122 * This a protoype for a function which is called when there is at
123 * least one Pdu available for processing on a particular Rx Q.
125 * This function should call @a ixAtmdAccRxDispatch() with
126 * the aprropriate number of parameters to read and process the Rx Q.
128 * @sa ixAtmdAccRxDispatch
129 * @sa ixAtmdAccRxVcConnect
130 * @sa ixAtmdAccRxDispatcherRegister
132 * @param rxQueueId @ref IxAtmRxQueueId [in] indicates which RX queue to has Pdus to process.
133 * @param numberOfPdusToProcess unsigned int [in] indicates the minimum number of
134 * PDUs available to process all PDUs from the queue.
135 * @param reservedPtr unsigned int* [out] pointer to a int location which can
136 * be written to, but does not retain written values. This is
137 * provided to make this prototype compatible
138 * with @a ixAtmdAccRxDispatch()
140 * @return @li int - ignored.
143 typedef IX_STATUS (*IxAtmdAccRxDispatcher) (IxAtmRxQueueId rxQueueId,
144 unsigned int numberOfPdusToProcess,
145 unsigned int *reservedPtr);
147 /* ------------------------------------------------------
148 Part of the IxAtmdAcc interface related to TX traffic
149 ------------------------------------------------------ */
153 * @ingroup IxAtmdAccCtrlAPI
155 * @brief Callback prototype for transmitted mbuf when threshold level is
158 * IxAtmdAccTxDoneDispatcher is the prototype of the user function
159 * which get called when pdus are completely transmitted. This function
160 * is likely to call the @a ixAtmdAccTxDoneDispatch() function.
162 * This function is called when the number of available pdus for
163 * reception is crossing the threshold level as defined
164 * in @a ixAtmdAccTxDoneDispatcherRegister()
166 * This function is called inside an Qmgr dispatch context. No system
167 * resource or interrupt-unsafe feature should be used inside this
170 * Transmitted buffers recycling implementation is a sytem-wide mechanism
171 * and needs to be set before any traffic is started. If this threshold
172 * mechanism is not used, the user is responsible for polling the
173 * transmitted buffers with @a ixAtmdAccTxDoneDispatch()
174 * and @a ixAtmdAccTxDoneLevelQuery() functions.
176 * @sa ixAtmdAccTxDoneDispatcherRegister
177 * @sa ixAtmdAccTxDoneDispatch
178 * @sa ixAtmdAccTxDoneLevelQuery
180 * @param numberOfPdusToProcess unsigned int [in] - The current number of pdus currently
181 * available for recycling
182 * @param *reservedPtr unsigned int [out] - pointer to a int location which can be
183 * written to but does not retain written values. This is provided
184 * to make this prototype compatible
185 * with @a ixAtmdAccTxDoneDispatch()
187 * @return @li IX_SUCCESS This is provided to make
188 * this prototype compatible with @a ixAtmdAccTxDoneDispatch()
189 * @return @li IX_FAIL invalid parameters or some unspecified internal
190 * error occured. This is provided to make
191 * this prototype compatible with @a ixAtmdAccTxDoneDispatch()
194 typedef IX_STATUS (*IxAtmdAccTxDoneDispatcher) (unsigned int numberOfPdusToProcess,
195 unsigned int *reservedPtr);
199 * @ingroup IxAtmdAccCtrlAPI
201 * @brief Notification that the threshold number of scheduled cells
202 * remains in a port's transmit Q.
204 * The is the prototype for of the user notification function which
205 * gets called on a per-port basis, when the number of remaining
206 * scheduled cells to be transmitted decreases to the threshold level.
207 * The number of cells passed as a parameter can be used for scheduling
208 * purposes as the maximum number of cells that can be passed in a
209 * schedule table to the @a ixAtmdAccPortTxProcess() function.
211 * @sa ixAtmdAccPortTxCallbackRegister
212 * @sa ixAtmdAccPortTxProcess
213 * @sa ixAtmdAccPortTxFreeEntriesQuery
215 * @param port @ref IxAtmLogicalPort [in] - logical PHY port [@a IX_UTOPIA_PORT_0 .. @a IX_UTOPIA_MAX_PORTS - 1]
216 * @param numberOfAvailableCells unsigned int [in] - number of available
217 * cell entries.for the port
219 * @note - This functions shall not use system resources when used
220 * inside an interrupt context.
223 typedef void (*IxAtmdAccPortTxLowCallback) (IxAtmLogicalPort port,
224 unsigned int numberOfAvailableCells);
228 * @ingroup IxAtmdAccCtrlAPI
230 * @brief Prototype to submit cells for transmission
232 * IxAtmdAccTxVcDemandUpdateCallback is the prototype of the callback
233 * function used by AtmD to notify an ATM Scheduler that the user of
234 * a VC has submitted cells for transmission.
236 * @sa IxAtmdAccTxVcDemandUpdateCallback
237 * @sa IxAtmdAccTxVcDemandClearCallback
238 * @sa IxAtmdAccTxSchVcIdGetCallback
239 * @sa ixAtmdAccPortTxScheduledModeEnable
241 * @param port @ref IxAtmLogicalPort [in] - Specifies the ATM port on which the VC to be updated
243 * @param vcId int [in] - Identifies the VC to be updated. This is the value
244 * returned by the @a IxAtmdAccTxSchVcIdGetCallback() call .
245 * @param numberOfCells unsigned int [in] - Indicates how many ATM cells should be added
246 * to the queue for this VC.
248 * @return @li IX_SUCCESS the function is registering the cell demand for
250 * @return @li IX_FAIL the function cannot register cell for this VC : the
251 * scheduler maybe overloaded or misconfigured
254 typedef IX_STATUS (*IxAtmdAccTxVcDemandUpdateCallback) (IxAtmLogicalPort port,
256 unsigned int numberOfCells);
260 * @ingroup IxAtmdAccCtrlAPI
262 * @brief prototype to remove all currently queued cells from a
265 * IxAtmdAccTxVcDemandClearCallback is the prototype of the function
266 * to remove all currently queued cells from a registered VC. The
267 * pending cell count for the specified VC is reset to zero. After the
268 * use of this callback, the scheduler shall not schedule more cells
271 * This callback function is called during a VC disconnection
272 * @a ixAtmdAccTxVcTryDisconnect()
274 * @sa IxAtmdAccTxVcDemandUpdateCallback
275 * @sa IxAtmdAccTxVcDemandClearCallback
276 * @sa IxAtmdAccTxSchVcIdGetCallback
277 * @sa ixAtmdAccPortTxScheduledModeEnable
278 * @sa ixAtmdAccTxVcTryDisconnect
280 * @param port @ref IxAtmLogicalPort [in] - Specifies the ATM port on which the VC to be cleared
282 * @param vcId int [in] - Identifies the VC to be cleared. This is the value
283 * returned by the @a IxAtmdAccTxSchVcIdGetCallback() call .
288 typedef void (*IxAtmdAccTxVcDemandClearCallback) (IxAtmLogicalPort port,
293 * @ingroup IxAtmdAccCtrlAPI
295 * @brief prototype to get a scheduler vc id
297 * IxAtmdAccTxSchVcIdGetCallback is the prototype of the function to get
300 * @sa IxAtmdAccTxVcDemandUpdateCallback
301 * @sa IxAtmdAccTxVcDemandClearCallback
302 * @sa IxAtmdAccTxSchVcIdGetCallback
303 * @sa ixAtmdAccPortTxScheduledModeEnable
305 * @param port @ref IxAtmLogicalPort [in] - Specifies the ATM logical port on which the VC is
307 * @param vpi unsigned int [in] - For AAL0/AAL5 specifies the ATM vpi on which the
309 * For OAM specifies the dedicated "OAM Tx channel" VPI.
310 * @param vci unsigned int [in] - For AAL0/AAL5 specifies the ATM vci on which the
312 * For OAM specifies the dedicated "OAM Tx channel" VCI.
313 * @param connId @ref IxAtmConnId [in] - specifies the IxAtmdAcc connection Id already
314 * associated with this VC
315 * @param vcId int* [out] - pointer to a vcId
317 * @return @li IX_SUCCESS the function is returning a Scheduler vcId for this
319 * @return @li IX_FAIL the function cannot process scheduling for this VC.
320 * the contents of vcId is unspecified
323 typedef IX_STATUS (*IxAtmdAccTxSchVcIdGetCallback) (IxAtmLogicalPort port,
329 /* ------------------------------------------------------
330 Part of the IxAtmdAcc interface related to RX traffic
331 ------------------------------------------------------ */
335 * @ingroup IxAtmdAccCtrlAPI
337 * @fn ixAtmdAccRxDispatcherRegister (
338 IxAtmRxQueueId queueId,
339 IxAtmdAccRxDispatcher callback)
341 * @brief Register a notification callback to be invoked when there is
342 * at least one entry on a particular Rx queue.
344 * This function registers a callback to be invoked when there is at
345 * least one entry in a particular queue. The registered callback is
346 * called every time when the hardware adds one or more pdus to the
347 * specified Rx queue.
349 * This function cannot be used when a Rx Vc using this queue is
352 * @note -The callback function can be the API function
353 * @a ixAtmdAccRxDispatch() : every time the threhold level
354 * of the queue is reached, the ixAtmdAccRxDispatch() is
355 * invoked to remove all entries from the queue.
357 * @sa ixAtmdAccRxDispatch
358 * @sa IxAtmdAccRxDispatcher
360 * @param queueId @ref IxAtmRxQueueId [in] RX queue identification
361 * @param callback @ref IxAtmdAccRxDispatcher [in] function triggering the delivery of incoming
362 * traffic. This parameter cannot be a null pointer.
364 * @return @li IX_SUCCESS Successful call to @a ixAtmdAccRxDispatcherRegister()
365 * @return @li IX_FAIL error in the parameters, or there is an
366 * already active RX VC for this queue or some unspecified
367 * internal error occurred.
370 PUBLIC IX_STATUS ixAtmdAccRxDispatcherRegister (
371 IxAtmRxQueueId queueId,
372 IxAtmdAccRxDispatcher callback);
376 * @ingroup IxAtmdAccCtrlAPI
378 * @fn ixAtmdAccRxDispatch (IxAtmRxQueueId rxQueueId,
379 unsigned int numberOfPdusToProcess,
380 unsigned int *numberOfPdusProcessedPtr)
383 * @brief Control function which executes Rx processing for a particular
386 * The @a IxAtmdAccRxDispatch() function is used to process received Pdus
387 * available from one of the two incoming RX streams. When this function
388 * is invoked, the incoming traffic (up to the number of PDUs passed as
389 * a parameter) will be transferred to the IxAtmdAcc users through the
390 * callback @a IxAtmdAccRxVcRxCallback(), as registered during the
391 * @a ixAtmdAccRxVcConnect() call.
393 * The user receive callbacks will be executed in the context of this
396 * Failing to use this function on a regular basis when there is traffic
397 * will block incoming traffic and can result in Pdus being dropped by
400 * This should be used to control when received pdus are handed off from
401 * the hardware to Aal users from a particluar stream. The function can
402 * be used from a timer context, or can be registered as a callback in
403 * response to an rx stream threshold event, or can be used inside an
404 * active polling mechanism which is under user control.
406 * @note - The signature of this function is directly compatible with the
407 * callback prototype which can be register with @a ixAtmdAccRxDispatcherRegister().
409 * @sa ixAtmdAccRxDispatcherRegister
410 * @sa IxAtmdAccRxVcRxCallback
411 * @sa ixAtmdAccRxVcFreeEntriesQuery
413 * @param rxQueueId @ref IxAtmRxQueueId [in] - indicates which RX queue to process.
414 * @param numberOfPdusToProcess unsigned int [in] - indicates the maxiumum number of PDU to
415 * remove from the RX queue. A value of IX_ATMDACC_ALLPDUS indicates
416 * to process all PDUs from the queue. This includes at least the PDUs
417 * in the queue when the fuction is invoked. Because of real-time
418 * constraints, there is no guarantee thatthe queue will be empty
419 * when the function exits. If this parameter is greater than the
420 * number of entries of the queues, the function will succeed
421 * and the parameter numberOfPdusProcessedPtr will reflect the exact
422 * number of PDUs processed.
423 * @param *numberOfPdusProcessedPtr unsigned int [out] - indicates the actual number of PDU
424 * processed during this call. This parameter cannot be a null
427 * @return @li IX_SUCCESS the number of PDUs as indicated in
428 * numberOfPdusProcessedPtr are removed from the RX queue and the VC callback
430 * @return @li IX_FAIL invalid parameters or some unspecified internal
434 PUBLIC IX_STATUS ixAtmdAccRxDispatch (IxAtmRxQueueId rxQueueId,
435 unsigned int numberOfPdusToProcess,
436 unsigned int *numberOfPdusProcessedPtr);
440 * @ingroup IxAtmdAccCtrlAPI
442 * @fn ixAtmdAccRxLevelQuery (IxAtmRxQueueId rxQueueId,
443 unsigned int *numberOfPdusPtr)
445 * @brief Query the number of entries in a particular RX queue.
447 * This function is used to retrieve the number of pdus received by
448 * the hardware and ready for distribution to users.
450 * @param rxQueueId @ref IxAtmRxQueueId [in] - indicates which of two RX queues to query.
451 * @param numberOfPdusPtr unsigned int* [out] - Pointer to store the number of available
452 * PDUs in the RX queue. This parameter cannot be a null pointer.
454 * @return @li IX_SUCCESS the value in numberOfPdusPtr specifies the
455 * number of incoming pdus waiting in this queue
456 * @return @li IX_FAIL an error occurs during processing.
457 * The value in numberOfPdusPtr is unspecified.
459 * @note - This function is reentrant, doesn't use system resources
460 * and can be used from an interrupt context.
463 PUBLIC IX_STATUS ixAtmdAccRxLevelQuery (IxAtmRxQueueId rxQueueId,
464 unsigned int *numberOfPdusPtr);
468 * @ingroup IxAtmdAccCtrlAPI
470 * @fn ixAtmdAccRxQueueSizeQuery (IxAtmRxQueueId rxQueueId,
471 unsigned int *numberOfPdusPtr)
473 * @brief Query the size of a particular RX queue.
475 * This function is used to retrieve the number of pdus the system is
476 * able to queue when reception is complete.
478 * @param rxQueueId @ref IxAtmRxQueueId [in] - indicates which of two RX queues to query.
479 * @param numberOfPdusPtr unsigned int* [out] - Pointer to store the number of pdus
480 * the system is able to queue in the RX queue. This parameter
481 * cannot be a null pointer.
483 * @return @li IX_SUCCESS the value in numberOfPdusPtr specifies the
484 * number of pdus the system is able to queue.
485 * @return @li IX_FAIL an error occurs during processing.
486 * The value in numberOfPdusPtr is unspecified.
488 * @note - This function is reentrant, doesn't use system resources
489 * and can be used from an interrupt context.
492 PUBLIC IX_STATUS ixAtmdAccRxQueueSizeQuery (IxAtmRxQueueId rxQueueId,
493 unsigned int *numberOfPdusPtr);
495 /* ------------------------------------------------------
496 Part of the IxAtmdAcc interface related to TX traffic
497 ------------------------------------------------------ */
501 * @ingroup IxAtmdAccCtrlAPI
503 * @fn ixAtmdAccPortTxFreeEntriesQuery (IxAtmLogicalPort port,
504 unsigned int *numberOfCellsPtr)
506 * @brief Get the number of available cells the system can accept for
509 * The function is used to retrieve the number of cells that can be
510 * queued for transmission to the hardware.
512 * This number is based on the worst schedule table where one cell
513 * is stored in one schedule table entry, depending on the pdus size
514 * and mbuf size and fragmentation.
516 * This function doesn't use system resources and can be used from a
517 * timer context, or can be associated with a threshold event, or can
518 * be used inside an active polling mechanism
520 * @param port @ref IxAtmLogicalPort [in] - logical PHY port [@a IX_UTOPIA_PORT_0 .. @a IX_UTOPIA_MAX_PORTS - 1]
521 * @param numberOfCellsPtr unsigned int* [out] - number of available cells.
522 * This parameter cannot be a null pointer.
524 * @sa ixAtmdAccPortTxProcess
526 * @return @li IX_SUCCESS numberOfCellsPtr contains the number of cells that can be scheduled
528 * @return @li IX_FAIL error in the parameters, or some processing error
532 PUBLIC IX_STATUS ixAtmdAccPortTxFreeEntriesQuery (IxAtmLogicalPort port,
533 unsigned int *numberOfCellsPtr);
537 * @ingroup IxAtmdAccCtrlAPI
539 * @fn ixAtmdAccPortTxCallbackRegister (IxAtmLogicalPort port,
540 unsigned int numberOfCells,
541 IxAtmdAccPortTxLowCallback callback)
543 * @brief Configure the Tx port threshold value and register a callback to handle
544 * threshold notifications.
546 * This function sets the threshold in cells
548 * @sa ixAtmdAccPortTxCallbackRegister
549 * @sa ixAtmdAccPortTxProcess
550 * @sa ixAtmdAccPortTxFreeEntriesQuery
552 * @param port @ref IxAtmLogicalPort [in] - logical PHY port [@a IX_UTOPIA_PORT_0 .. @a IX_UTOPIA_MAX_PORTS - 1]
553 * @param numberOfCells unsigned int [in] - threshold value which triggers the callback
554 * invocation, This number has to be one of the
555 * values 0,1,2,4,8,16,32 ....
556 * The maximum value cannot be more than half of the txVc queue
557 * size (which can be retrieved using @a ixAtmdAccPortTxFreeEntriesQuery()
558 * before any Tx traffic is sent for this port)
559 * @param callback @ref IxAtmdAccPortTxLowCallback [in] - callback function to invoke when the threshold
561 * This parameter cannot be a null pointer.
563 * @return @li IX_SUCCESS Successful call to @a ixAtmdAccPortTxCallbackRegister()
564 * @return @li IX_FAIL error in the parameters, Tx channel already set for this port
565 * threshold level is not correct or within the range regarding the
566 * queue size:or unspecified error during processing:
568 * @note - This callback function get called when the threshold level drops from
569 * (numberOfCells+1) cells to (numberOfCells) cells
571 * @note - This function should be called during system initialisation,
572 * outside an interrupt context
575 PUBLIC IX_STATUS ixAtmdAccPortTxCallbackRegister (IxAtmLogicalPort port,
576 unsigned int numberOfCells,
577 IxAtmdAccPortTxLowCallback callback);
581 * @ingroup IxAtmdAccCtrlAPI
583 * @fn ixAtmdAccPortTxScheduledModeEnable (IxAtmLogicalPort port,
584 IxAtmdAccTxVcDemandUpdateCallback vcDemandUpdateCallback,
585 IxAtmdAccTxVcDemandClearCallback vcDemandClearCallback,
586 IxAtmdAccTxSchVcIdGetCallback vcIdGetCallback)
588 * @brief Put the port into Scheduled Mode
590 * This function puts the specified port into scheduled mode of
591 * transmission which means an external s/w entity controls the
592 * transmission of cells on this port. This faciltates traffic shaping on
595 * Any buffers submitted on a VC for this port will be queued in IxAtmdAcc.
596 * The transmission of these buffers to and by the hardware will be driven
597 * by a transmit schedule submitted regulary in calls to
598 * @a ixAtmdAccPortTxProcess() by traffic shaping entity.
600 * The transmit schedule is expected to be dynamic in nature based on
601 * the demand in cells for each VC on the port. Hence the callback
602 * parameters provided to this function allow IxAtmdAcc to inform the
603 * shaping entity of demand changes for each VC on the port.
605 * By default a port is in Unscheduled Mode so if this function is not
606 * called, transmission of data is done without sheduling rules, on a
607 * first-come, first-out basis.
609 * Once a port is put in scheduled mode it cannot be reverted to
610 * un-scheduled mode. Note that unscheduled mode is not supported
613 * @note - This function should be called before any VCs have be
614 * connected on a port. Otherwise this function call will return failure.
616 * @note - This function uses internal locks and should not be called from
617 * an interrupt context
619 * @sa IxAtmdAccTxVcDemandUpdateCallback
620 * @sa IxAtmdAccTxVcDemandClearCallback
621 * @sa IxAtmdAccTxSchVcIdGetCallback
622 * @sa ixAtmdAccPortTxProcess
624 * @param port @ref IxAtmLogicalPort [in] - logical PHY port [@a IX_UTOPIA_PORT_0 .. @a IX_UTOPIA_MAX_PORTS - 1]
625 * @param vcDemandUpdateCallback @ref IxAtmdAccTxVcDemandUpdateCallback [in] - callback function used to update
626 * the number of outstanding cells for transmission. This parameter
627 * cannot be a null pointer.
628 * @param vcDemandClearCallback @ref IxAtmdAccTxVcDemandClearCallback [in] - callback function used to remove all
629 * clear the number of outstanding cells for a VC. This parameter
630 * cannot be a null pointer.
631 * @param vcIdGetCallback @ref IxAtmdAccTxSchVcIdGetCallback [in] - callback function used to exchange vc
632 * Identifiers between IxAtmdAcc and the entity supplying the
633 * transmit schedule. This parameter cannot be a null pointer.
635 * @return @li IX_SUCCESS scheduler registration is complete and the port
636 * is now in scheduled mode.
637 * @return @li IX_FAIL failed (wrong parameters, or traffic is already
638 * enabled on this port, possibly without ATM shaping)
641 PUBLIC IX_STATUS ixAtmdAccPortTxScheduledModeEnable (IxAtmLogicalPort port,
642 IxAtmdAccTxVcDemandUpdateCallback vcDemandUpdateCallback,
643 IxAtmdAccTxVcDemandClearCallback vcDemandClearCallback,
644 IxAtmdAccTxSchVcIdGetCallback vcIdGetCallback);
648 * @ingroup IxAtmdAccCtrlAPI
650 * @fn ixAtmdAccPortTxProcess (IxAtmLogicalPort port,
651 IxAtmScheduleTable* scheduleTablePtr)
653 * @brief Transmit queue cells to the H/W based on the supplied schedule
656 * This function @a ixAtmdAccPortTxProcess() process the schedule
657 * table provided as a parameter to the function. As a result cells are
658 * sent to the underlaying hardware for transmission.
660 * The schedule table is executed in its entirety or not at all. So the
661 * onus is on the caller not to submit a table containing more cells than
662 * can be transmitted at that point. The maximum numbers that can be
663 * transmitted is guaranteed to be the number of cells as returned by the
664 * function @a ixAtmdAccPortTxFreeEntriesQuery().
666 * When the scheduler is invoked on a threshold level, IxAtmdAcc gives the
667 * minimum number of cells (to ensure the callback will fire again later)
668 * and the maximum number of cells that @a ixAtmdAccPortTxProcess()
669 * will be able to process (assuming the ATM scheduler is able
670 * to produce the worst-case schedule table, i.e. one entry per cell).
672 * When invoked ouside a threshold level, the overall number of cells of
673 * the schedule table should be less than the number of cells returned
674 * by the @a ixAtmdAccPortTxFreeEntriesQuery() function.
676 * After invoking the @a ixAtmdAccPortTxProcess() function, it is the
677 * user choice to query again the queue level with the function
678 * @a ixAtmdAccPortTxFreeEntriesQuery() and, depending on a new cell
679 * number, submit an other schedule table.
681 * IxAtmdAcc will check that the number of cells in the schedule table
682 * is compatible with the current transmit level. If the
684 * Obsolete or invalid connection Id will be silently discarded.
686 * This function is not reentrant for the same port.
688 * This functions doesn't use system resources and can be used inside an
691 * This function is used as a response to the hardware requesting more
694 * @sa ixAtmdAccPortTxScheduledModeEnable
695 * @sa ixAtmdAccPortTxFreeEntriesQuery
696 * @sa ixAtmdAccPortTxCallbackRegister
697 * @sa ixAtmdAccPortEnable
699 * @param port @ref IxAtmLogicalPort [in] - logical PHY port [@a IX_UTOPIA_PORT_0 .. @a IX_UTOPIA_MAX_PORTS - 1]
700 * @param scheduleTablePtr @ref IxAtmScheduleTable* [in] - pointer to a scheduler update table. The
701 * content of this table is not modified by this function. This
702 * parameter cannot be a null pointer.
704 * @return @li IX_SUCCESS the schedule table process is complete
705 * and cells are transmitted to the hardware
706 * @return @li IX_ATMDACC_WARNING : Traffic will be dropped: the schedule table exceed
707 * the hardware capacity If this error is ignored, further traffic
708 * and schedule will work correctly.
709 * Overscheduling does not occur when the schedule table does
710 * not contain more entries that the number of free entries returned
711 * by @a ixAtmdAccPortTxFreeEntriesQuery().
712 * However, Disconnect attempts just after this error will fail permanently
713 * with the error code @a IX_ATMDACC_RESOURCES_STILL_ALLOCATED, and it is
714 * necessary to disable the port to make @a ixAtmdAccTxVcTryDisconnect()
716 * @return @li IX_FAIL a wrong parameter is supplied, or the format of
717 * the schedule table is invalid, or the port is not Enabled, or
718 * an internal severe error occured. No cells is transmitted to the hardware
720 * @note - If the failure is linked to an overschedule of data cells
721 * the result is an inconsistency in the output traffic (one or many
722 * cells may be missing and the traffic contract is not respected).
725 PUBLIC IX_STATUS ixAtmdAccPortTxProcess (IxAtmLogicalPort port,
726 IxAtmScheduleTable* scheduleTablePtr);
730 * @ingroup IxAtmdAccCtrlAPI
732 * @fn ixAtmdAccTxDoneDispatch (unsigned int numberOfPdusToProcess,
733 unsigned int *numberOfPdusProcessedPtr)
735 * @brief Process a number of pending transmit done pdus from the hardware.
737 * As a by-product of Atm transmit operation buffers which transmission
738 * is complete need to be recycled to users. This function is invoked
739 * to service the oustanding list of transmitted buffers and pass them
742 * Users are handed back pdus by invoking the free callback registered
743 * during the @a ixAtmdAccTxVcConnect() call.
745 * There is a single Tx done stream servicing all active Atm Tx ports
746 * which can contain a maximum of 64 entries. If this stream fills port
747 * transmission will stop so this function must be call sufficently
748 * frequently to ensure no disruption to the transmit operation.
750 * This function can be used from a timer context, or can be associated
751 * with a TxDone level threshold event (see @a ixAtmdAccTxDoneDispatcherRegister() ),
752 * or can be used inside an active polling mechanism under user control.
754 * For ease of use the signature of this function is compatible with the
755 * TxDone threshold event callback prototype.
757 * This functions can be used inside an interrupt context.
759 * @sa ixAtmdAccTxDoneDispatcherRegister
760 * @sa IxAtmdAccTxVcBufferReturnCallback
761 * @sa ixAtmdAccTxDoneLevelQuery
763 * @param numberOfPdusToProcess unsigned int [in] - maxiumum number of pdus to remove
764 * from the TX Done queue
765 * @param *numberOfPdusProcessedPtr unsigned int [out] - number of pdus removed from
766 * the TX Done queue. This parameter cannot be a null pointer.
768 * @return @li IX_SUCCESS the number of pdus as indicated in
769 * numberOfPdusToProcess are removed from the TX Done hardware
770 * and passed to the user through the Tx Done callback registered
771 * during a call to @a ixAtmdAccTxVcConnect()
772 * @return @li IX_FAIL invalid parameters or numberOfPdusProcessedPtr is
773 * a null pointer or some unspecified internal error occured.
777 ixAtmdAccTxDoneDispatch (unsigned int numberOfPdusToProcess,
778 unsigned int *numberOfPdusProcessedPtr);
782 * @ingroup IxAtmdAccCtrlAPI
784 * @fn ixAtmdAccTxDoneLevelQuery (unsigned int *numberOfPdusPtr)
786 * @brief Query the current number of transmit pdus ready for
789 * This function is used to get the number of transmitted pdus which
790 * the hardware is ready to hand back to user.
792 * This function can be used from a timer context, or can be associated
793 * with a threshold event, on can be used inside an active polling
796 * @sa ixAtmdAccTxDoneDispatch
798 * @param *numberOfPdusPtr unsigned int [out] - Pointer to the number of pdus transmitted
799 * at the time of this function call, and ready for recycling
800 * This parameter cannot be a null pointer.
802 * @return @li IX_SUCCESS numberOfPdusPtr contains the number of pdus
803 * ready for recycling at the time of this function call
805 * @return @li IX_FAIL wrong parameter (null pointer as parameter).or
806 * unspecified rocessing error occurs..The value in numberOfPdusPtr
811 ixAtmdAccTxDoneLevelQuery (unsigned int *numberOfPdusPtr);
815 * @ingroup IxAtmdAccCtrlAPI
817 * @fn ixAtmdAccTxDoneQueueSizeQuery (unsigned int *numberOfPdusPtr)
819 * @brief Query the TxDone queue size.
821 * This function is used to get the number of pdus which
822 * the hardware is able to store after transmission is complete
824 * The returned value can be used to set a threshold and enable
825 * a callback to be notified when the number of pdus is going over
828 * @sa ixAtmdAccTxDoneDispatcherRegister
830 * @param *numberOfPdusPtr unsigned int [out] - Pointer to the number of pdus the system
831 * is able to queue after transmission
833 * @return @li IX_SUCCESS numberOfPdusPtr contains the the number of
834 * pdus the system is able to queue after transmission
835 * @return @li IX_FAIL wrong parameter (null pointer as parameter).or
836 * unspecified rocessing error occurs..The value in numberOfPdusPtr
839 * @note - This function is reentrant, doesn't use system resources
840 * and can be used from an interrupt context.
843 ixAtmdAccTxDoneQueueSizeQuery (unsigned int *numberOfPdusPtr);
847 * @ingroup IxAtmdAccCtrlAPI
849 * @fn ixAtmdAccTxDoneDispatcherRegister (unsigned int numberOfPdus,
850 IxAtmdAccTxDoneDispatcher notificationCallback)
852 * @brief Configure the Tx Done stream threshold value and register a
853 * callback to handle threshold notifications.
855 * This function sets the threshold level in term of number of pdus at
856 * which the supplied notification function should be called.
858 * The higher the threshold value is, the less events will be necessary
859 * to process transmitted buffers.
861 * Transmitted buffers recycling implementation is a sytem-wide mechanism
862 * and needs to be set prior any traffic is started. If this threshold
863 * mechanism is not used, the user is responsible for polling the
864 * transmitted buffers thanks to @a ixAtmdAccTxDoneDispatch() and
865 * @a ixAtmdAccTxDoneLevelQuery() functions.
867 * This function should be called during system initialisation outside
868 * an interrupt context
870 * @sa ixAtmdAccTxDoneDispatcherRegister
871 * @sa ixAtmdAccTxDoneDispatch
872 * @sa ixAtmdAccTxDoneLevelQuery
874 * @param numberOfPdus unsigned int [in] - The number of TxDone pdus which triggers the
875 * callback invocation This number has to be a power of 2, one of the
876 * values 0,1,2,4,8,16,32 ...
877 * The maximum value cannot be more than half of the txDone queue
878 * size (which can be retrieved using @a ixAtmdAccTxDoneQueueSizeQuery())
879 * @param notificationCallback @ref IxAtmdAccTxDoneDispatcher [in] - The function to invoke. (This
880 * parameter can be @a ixAtmdAccTxDoneDispatch()).This
881 * parameter ust not be a null pointer.
883 * @return @li IX_SUCCESS Successful call to ixAtmdAccTxDoneDispatcherRegister
884 * @return @li IX_FAIL error in the parameters:
886 * @note - The notificationCallback will be called exactly when the threshold level
887 * will increase from (numberOfPdus) to (numberOfPdus+1)
889 * @note - If there is no Tx traffic, there is no guarantee that TxDone Pdus will
890 * be released to the user (when txDone level is permanently under the threshold
891 * level. One of the preffered way to return resources to the user is to use
892 * a mix of txDone notifications, used together with a slow
893 * rate timer and an exclusion mechanism protecting from re-entrancy
895 * @note - The TxDone threshold will only hand back buffers when the threshold level is
896 * crossed. Setting this threshold to a great number reduce the interrupt rate
897 * and the cpu load, but also increase the number of outstanding mbufs and has
898 * a system wide impact when these mbufs are needed by other components.
901 PUBLIC IX_STATUS ixAtmdAccTxDoneDispatcherRegister (unsigned int numberOfPdus,
902 IxAtmdAccTxDoneDispatcher notificationCallback);
904 /* ------------------------------------------------------
905 Part of the IxAtmdAcc interface related to Utopia config
906 ------------------------------------------------------ */
910 * @ingroup IxAtmdAccCtrlAPI
912 * @defgroup IxAtmdAccUtopiaCtrlAPI IXP400 ATM Driver Access (IxAtmdAcc) Utopia Control API
914 * @brief The public API for the IXP400 Atm Driver Control component
916 * IxAtmdAcc is the low level interface by which AAL PDU get
917 * transmitted to,and received from the Utopia bus
919 * This part is related to the UTOPIA configuration.
926 * @brief Utopia configuration
928 * This structure is used to set the Utopia parameters
929 * @li contains the values of Utopia registers, to be set during initialisation
930 * @li contains debug commands for NPE, to be used during development steps
932 * @note - the exact description of all parameters is done in the Utopia reference
939 * @ingroup IxAtmdAccUtopiaCtrlAPI
940 * @struct UtTxConfig_
941 * @brief Utopia Tx Config Register
946 unsigned int reserved_1:1; /**< [31] These bits are always 0.*/
947 unsigned int txInterface:1; /**< [30] Utopia Transmit Interface. The following encoding
948 * is used to set the Utopia Transmit interface as ATM master
953 unsigned int txMode:1; /**< [29] Utopia Transmit Mode. The following encoding is used
954 * to set the Utopia Transmit mode to SPHY or MPHY:
958 unsigned int txOctet:1; /**< [28] Utopia Transmit cell transfer protocol. Used to set
959 * the Utopia cell transfer protocol to Octet-level handshaking.
960 * Note this is only applicable in SPHY mode.
961 * @li 1 - Octet-handshaking enabled
962 * @li 0 - Cell-handshaking enabled
964 unsigned int txParity:1; /**< [27] Utopia Transmit parity enabled when set. TxEvenParity
965 * defines the parity format odd/even.
966 * @li 1 - Enable Parity generation.
967 * @li 0 - ut_op_prty held low.
969 unsigned int txEvenParity:1; /**< [26] Utopia Transmit Parity Mode
970 * @li 1 - Even Parity Generated.
971 * @li 0 - Odd Parity Generated.
973 unsigned int txHEC:1; /**< [25] Header Error Check Insertion Mode. Specifies if the transmit
974 * cell header check byte is calculated and inserted when set.
975 * @li 1 - Generate HEC.
976 * @li 0 - Disable HEC generation.
978 unsigned int txCOSET:1; /**< [24] If enabled the HEC is Exclusive-OR'ed with the value 0x55 before
979 * being presented on the Utopia bus.
980 * @li 1 - Enable HEC ExOR with value 0x55
981 * @li 0 - Use generated HEC value.
984 unsigned int reserved_2:1; /**< [23] These bits are always 0
986 unsigned int txCellSize:7; /**< [22:16] Transmit expected cell size. Configures the cell size
987 * for the transmit module: Values between 52-64 are valid.
989 unsigned int reserved_3:3; /**< [15:13] These bits are always 0 */
990 unsigned int txAddrRange:5; /**< [12:8] When configured as an ATM master in MPHY mode this
991 * register specifies the upper limit of the PHY polling logical
992 * range. The number of active PHYs are TxAddrRange + 1.
994 unsigned int reserved_4:3; /**< [7:5] These bits are always 0 */
995 unsigned int txPHYAddr:5; /**< [4:0] When configured as a slave in an MPHY system this register
996 * specifies the physical address of the PHY.
1000 utTxConfig; /**< Tx config Utopia register */
1003 * @ingroup IxAtmdAccUtopiaCtrlAPI
1004 * @struct UtTxStatsConfig_
1005 * @brief Utopia Tx stats Register
1007 struct UtTxStatsConfig_
1010 unsigned int vpi:12; /**< [31:20] ATM VPI [11:0] OR GFC [3:0] and VPI [7:0]
1011 @li Note: if VCStatsTxGFC is set to 0 the GFC field is ignored in test. */
1013 unsigned int vci:16; /**< [19:4] ATM VCI [15:0] or PHY Address[4] */
1015 unsigned int pti:3; /**< [3:1] ATM PTI [2:0] or PHY Address[3:1]
1016 @li Note: if VCStatsTxPTI is set to 0 the PTI field is ignored in test.
1017 @li Note: if VCStatsTxEnb is set to 0 only the transmit PHY port
1018 address as defined by this register is used for ATM statistics [4:0]. */
1020 unsigned int clp:1; /**< [0] ATM CLP or PHY Address [0]
1021 @li Note: if VCStatsTxCLP is set to 0 the CLP field is ignored in test.
1022 @li Note: if VCStatsTxEnb is set to 0 only the transmit PHY port
1023 address as defined by this register is used for ATM statistics [4:0]. */
1026 utTxStatsConfig; /**< Tx stats config Utopia register */
1029 * @ingroup IxAtmdAccUtopiaCtrlAPI
1030 * @struct UtTxDefineIdle_
1031 * @brief Utopia Tx idle cells Register
1033 struct UtTxDefineIdle_
1036 unsigned int vpi:12; /**< [31:20] ATM VPI [11:0] OR GFC [3:0] and VPI [7:0]
1037 @li Note: if VCIdleTxGFC is set to 0 the GFC field is ignored in test. */
1039 unsigned int vci:16; /**< [19:4] ATM VCI [15:0] */
1041 unsigned int pti:3; /**< [3:1] ATM PTI PTI [2:0]
1042 @li Note: if VCIdleTxPTI is set to 0 the PTI field is ignored in test.*/
1044 unsigned int clp:1; /**< [0] ATM CLP [0]
1045 @li Note: if VCIdleTxCLP is set to 0 the CLP field is ignored in test.*/
1048 utTxDefineIdle; /**< Tx idle cell config Utopia register */
1051 * @ingroup IxAtmdAccUtopiaCtrlAPI
1052 * @struct UtTxEnableFields_
1053 * @brief Utopia Tx ienable fields Register
1055 struct UtTxEnableFields_
1058 unsigned int defineTxIdleGFC:1; /**< [31] This register is used to include or exclude the GFC
1059 field of the ATM header when testing for Idle cells.
1060 @li 1 - GFC field is valid.
1061 @li 0 - GFC field ignored.*/
1063 unsigned int defineTxIdlePTI:1; /**< [30] This register is used to include or exclude the PTI
1064 field of the ATM header when testing for Idle cells.
1065 @li 1 - PTI field is valid
1066 @li 0 - PTI field ignored.*/
1068 unsigned int defineTxIdleCLP:1; /**< [29] This register is used to include or
1069 exclude the CLP field of the ATM header when testing for Idle cells.
1070 @li 1 - CLP field is valid.
1071 @li 0 - CLP field ignored. */
1073 unsigned int phyStatsTxEnb:1; /**< [28] This register is used to enable or disable ATM
1074 statistics gathering based on the specified PHY address as defined
1075 in TxStatsConfig register.
1076 @li 1 - Enable statistics for specified transmit PHY address.
1077 @li 0 - Disable statistics for specified transmit PHY address. */
1079 unsigned int vcStatsTxEnb:1; /**< [27] This register is used to change the ATM
1080 statistics-gathering mode from the specified logical PHY address
1081 to a specific VPI/VCI address.
1082 @li 1 - Enable statistics for specified VPI/VCI address.
1083 @li 0 - Disable statistics for specified VPI/VCI address */
1085 unsigned int vcStatsTxGFC:1; /**< [26] This register is used to include or exclude the GFC
1086 field of the ATM header when ATM VPI/VCI statistics are enabled.
1087 GFC is only available at the UNI and uses the first 4-bits of
1089 @li 1 - GFC field is valid
1090 @li 0 - GFC field ignored.*/
1092 unsigned int vcStatsTxPTI:1; /**< [25] This register is used to include or exclude the PTI
1093 field of the ATM header when ATM VPI/VCI statistics are enabled.
1094 @li 1 - PTI field is valid
1095 @li 0 - PTI field ignored.*/
1097 unsigned int vcStatsTxCLP:1; /**< [24] This register is used to include or exclude the CLP
1098 field of the ATM header when ATM VPI/VCI statistics are enabled.
1099 @li 1 - CLP field is valid
1100 @li 0 - CLP field ignored. */
1102 unsigned int reserved_1:3; /**< [23-21] These bits are always 0 */
1104 unsigned int txPollStsInt:1; /**< [20] Enable the assertion of the ucp_tx_poll_sts condition
1105 where there is a change in polling status.
1106 @li 1 - ucp_tx_poll_sts asserted whenever there is a change in status
1107 @li 0 - ucp_tx_poll_sts asserted if ANY transmit PHY is available
1109 unsigned int txCellOvrInt:1; /**< [19] Enable TxCellCount overflow CBI Transmit Status condition
1111 @li 1 - If TxCellCountOvr is set assert the Transmit Status Condition.
1112 @li 0 - No CBI Transmit Status condition assertion */
1114 unsigned int txIdleCellOvrInt:1; /**< [18] Enable TxIdleCellCount overflow Transmit Status Condition
1115 @li 1 - If TxIdleCellCountOvr is set assert the Transmit Status Condition
1116 @li 0 - No CBI Transmit Status condition assertion..*/
1118 unsigned int enbIdleCellCnt:1; /**< [17] Enable Transmit Idle Cell Count.
1119 @li 1 - Enable count of Idle cells transmitted.
1120 @li 0 - No count is maintained. */
1122 unsigned int enbTxCellCnt:1; /**< [16] Enable Transmit Valid Cell Count of non-idle/non-error cells
1123 @li 1 - Enable count of valid cells transmitted- non-idle/non-error
1124 @li 0 - No count is maintained.*/
1126 unsigned int reserved_2:16; /**< [15:0] These bits are always 0 */
1127 } utTxEnableFields; /**< Tx enable Utopia register */
1130 * @ingroup IxAtmdAccUtopiaCtrlAPI
1131 * @struct UtTxTransTable0_
1132 * @brief Utopia Tx translation table Register
1134 struct UtTxTransTable0_
1137 unsigned int phy0:5; /**< [31-27] Tx Mapping value of logical phy 0 */
1139 unsigned int phy1:5; /**< [26-22] Tx Mapping value of logical phy 1 */
1141 unsigned int phy2:5; /**< [21-17] Tx Mapping value of logical phy 2 */
1143 unsigned int reserved_1:1; /**< [16] These bits are always 0.*/
1145 unsigned int phy3:5; /**< [15-11] Tx Mapping value of logical phy 3 */
1147 unsigned int phy4:5; /**< [10-6] Tx Mapping value of logical phy 4 */
1149 unsigned int phy5:5; /**< [5-1] Tx Mapping value of logical phy 5 */
1151 unsigned int reserved_2:1; /**< [0] These bits are always 0 */
1152 } utTxTransTable0; /**< Tx translation table */
1155 * @ingroup IxAtmdAccUtopiaCtrlAPI
1156 * @struct UtTxTransTable1_
1157 * @brief Utopia Tx translation table Register
1159 struct UtTxTransTable1_
1162 unsigned int phy6:5; /**< [31-27] Tx Mapping value of logical phy 6 */
1164 unsigned int phy7:5; /**< [26-22] Tx Mapping value of logical phy 7 */
1166 unsigned int phy8:5; /**< [21-17] Tx Mapping value of logical phy 8 */
1168 unsigned int reserved_1:1; /**< [16-0] These bits are always 0 */
1170 unsigned int phy9:5; /**< [15-11] Tx Mapping value of logical phy 3 */
1172 unsigned int phy10:5; /**< [10-6] Tx Mapping value of logical phy 4 */
1174 unsigned int phy11:5; /**< [5-1] Tx Mapping value of logical phy 5 */
1176 unsigned int reserved_2:1; /**< [0] These bits are always 0 */
1177 } utTxTransTable1; /**< Tx translation table */
1180 * @ingroup IxAtmdAccUtopiaCtrlAPI
1181 * @struct UtTxTransTable2_
1182 * @brief Utopia Tx translation table Register
1184 struct UtTxTransTable2_
1187 unsigned int phy12:5; /**< [31-27] Tx Mapping value of logical phy 6 */
1189 unsigned int phy13:5; /**< [26-22] Tx Mapping value of logical phy 7 */
1191 unsigned int phy14:5; /**< [21-17] Tx Mapping value of logical phy 8 */
1193 unsigned int reserved_1:1; /**< [16-0] These bits are always 0 */
1195 unsigned int phy15:5; /**< [15-11] Tx Mapping value of logical phy 3 */
1197 unsigned int phy16:5; /**< [10-6] Tx Mapping value of logical phy 4 */
1199 unsigned int phy17:5; /**< [5-1] Tx Mapping value of logical phy 5 */
1201 unsigned int reserved_2:1; /**< [0] These bits are always 0 */
1202 } utTxTransTable2; /**< Tx translation table */
1205 * @ingroup IxAtmdAccUtopiaCtrlAPI
1206 * @struct UtTxTransTable3_
1207 * @brief Utopia Tx translation table Register
1209 struct UtTxTransTable3_
1212 unsigned int phy18:5; /**< [31-27] Tx Mapping value of logical phy 6 */
1214 unsigned int phy19:5; /**< [26-22] Tx Mapping value of logical phy 7 */
1216 unsigned int phy20:5; /**< [21-17] Tx Mapping value of logical phy 8 */
1218 unsigned int reserved_1:1; /**< [16-0] These bits are always 0 */
1220 unsigned int phy21:5; /**< [15-11] Tx Mapping value of logical phy 3 */
1222 unsigned int phy22:5; /**< [10-6] Tx Mapping value of logical phy 4 */
1224 unsigned int phy23:5; /**< [5-1] Tx Mapping value of logical phy 5 */
1226 unsigned int reserved_2:1; /**< [0] These bits are always 0 */
1227 } utTxTransTable3; /**< Tx translation table */
1230 * @ingroup IxAtmdAccUtopiaCtrlAPI
1231 * @struct UtTxTransTable4_
1232 * @brief Utopia Tx translation table Register
1234 struct UtTxTransTable4_
1237 unsigned int phy24:5; /**< [31-27] Tx Mapping value of logical phy 6 */
1239 unsigned int phy25:5; /**< [26-22] Tx Mapping value of logical phy 7 */
1241 unsigned int phy26:5; /**< [21-17] Tx Mapping value of logical phy 8 */
1243 unsigned int reserved_1:1; /**< [16-0] These bits are always 0 */
1245 unsigned int phy27:5; /**< [15-11] Tx Mapping value of logical phy 3 */
1247 unsigned int phy28:5; /**< [10-6] Tx Mapping value of logical phy 4 */
1249 unsigned int phy29:5; /**< [5-1] Tx Mapping value of logical phy 5 */
1251 unsigned int reserved_2:1; /**< [0] These bits are always 0 */
1252 } utTxTransTable4; /**< Tx translation table */
1255 * @ingroup IxAtmdAccUtopiaCtrlAPI
1256 * @struct UtTxTransTable5_
1257 * @brief Utopia Tx translation table Register
1259 struct UtTxTransTable5_
1262 unsigned int phy30:5; /**< [31-27] Tx Mapping value of logical phy 6 */
1264 unsigned int reserved_1:27; /**< [26-0] These bits are always 0 */
1266 } utTxTransTable5; /**< Tx translation table */
1269 * @ingroup IxAtmdAccUtopiaCtrlAPI
1270 * @struct UtRxConfig_
1271 * @brief Utopia Rx config Register
1276 unsigned int rxInterface:1; /**< [31] Utopia Receive Interface. The following encoding is used
1277 to set the Utopia Receive interface as ATM master or PHY slave:
1281 unsigned int rxMode:1; /**< [30] Utopia Receive Mode. The following encoding is used to set
1282 the Utopia Receive mode to SPHY or MPHY:
1286 unsigned int rxOctet:1; /**< [29] Utopia Receive cell transfer protocol. Used to set the Utopia
1287 cell transfer protocol to Octet-level handshaking. Note this is only
1288 applicable in SPHY mode.
1289 @li 1 - Octet-handshaking enabled
1290 @li 0 - Cell-handshaking enabled */
1292 unsigned int rxParity:1; /**< [28] Utopia Receive Parity Checking enable.
1293 @li 1 - Parity checking enabled
1294 @li 0 - Parity checking disabled */
1296 unsigned int rxEvenParity:1;/**< [27] Utopia Receive Parity Mode
1297 @li 1 - Check for Even Parity
1298 @li 0 - Check for Odd Parity.*/
1300 unsigned int rxHEC:1; /**< [26] RxHEC Header Error Check Mode. Enables/disables cell header
1301 error checking on the received cell header.
1302 @li 1 - HEC checking enabled
1303 @li 0 - HEC checking disabled */
1305 unsigned int rxCOSET:1; /**< [25] If enabled the HEC is Exclusive-OR'ed with the value 0x55
1306 before being tested with the received HEC.
1307 @li 1 - Enable HEC ExOR with value 0x55.
1308 @li 0 - Use generated HEC value.*/
1310 unsigned int rxHECpass:1; /**< [24] Specifies if the incoming cell HEC byte should be transferred
1311 after optional processing to the NPE2 Coprocessor Bus Interface or
1312 if it should be discarded.
1313 @li 1 - HEC maintained 53-byte/UDC cell sent to NPE2.
1314 @li 0 - HEC discarded 52-byte/UDC cell sent to NPE2 coprocessor.*/
1316 unsigned int reserved_1:1; /**< [23] These bits are always 0 */
1318 unsigned int rxCellSize:7; /**< [22:16] Receive cell size. Configures the receive cell size.
1319 Values between 52-64 are valid */
1321 unsigned int rxHashEnbGFC:1; /**< [15] Specifies if the VPI field [11:8]/GFC field should be
1322 included in the Hash data input or if the bits should be padded
1324 @li 1 - VPI [11:8]/GFC field valid and used in Hash residue calculation.
1325 @li 0 - VPI [11:8]/GFC field padded with 1'b0 */
1327 unsigned int rxPreHash:1; /**< [14] Enable Pre-hash value generation. Specifies if the
1328 incoming cell data should be pre-hashed to allow VPI/VCI header look-up
1330 @li 1 - Pre-hashing enabled
1331 @li 0 - Pre-hashing disabled */
1333 unsigned int reserved_2:1; /**< [13] These bits are always 0 */
1335 unsigned int rxAddrRange:5; /**< [12:8] In ATM master, MPHY mode,
1336 * this register specifies the upper
1337 * limit of the PHY polling logical range. The number of active PHYs are
1340 unsigned int reserved_3:3; /**< [7-5] These bits are always 0 .*/
1341 unsigned int rxPHYAddr:5; /**< [4:0] When configured as a slave in an MPHY system this register
1342 * specifies the physical address of the PHY.
1344 } utRxConfig; /**< Rx config Utopia register */
1347 * @ingroup IxAtmdAccUtopiaCtrlAPI
1348 * @struct UtRxStatsConfig_
1349 * @brief Utopia Rx stats config Register
1351 struct UtRxStatsConfig_
1354 unsigned int vpi:12; /**< [31:20] ATM VPI VPI [11:0] OR GFC [3:0] and VPI [7:0]
1355 @li Note: if VCStatsRxGFC is set to 0 the GFC field is ignored in test. */
1357 unsigned int vci:16; /**< [19:4] VCI [15:0] or PHY Address [4] */
1359 unsigned int pti:3; /**< [3:1] PTI [2:0] or or PHY Address [3:1]
1360 @li Note: if VCStatsRxPTI is set to 0 the PTI field is ignored in test.
1361 @li Note: if VCStatsRxEnb is set to 0 only the PHY port address is used
1362 for statistics gathering.. */
1364 unsigned int clp:1; /**< [0] CLP [0] or PHY Address [0]
1365 @li Note: if VCStatsRxCLP is set to 0 the CLP field is ignored in test.
1366 @li Note: if VCStatsRxEnb is set to 0 only the PHY port address is used
1367 for statistics gathering.. */
1368 } utRxStatsConfig; /**< Rx stats config Utopia register */
1371 * @ingroup IxAtmdAccUtopiaCtrlAPI
1372 * @struct UtRxDefineIdle_
1373 * @brief Utopia Rx idle cells config Register
1375 struct UtRxDefineIdle_
1378 unsigned int vpi:12; /**< [31:20] ATM VPI [11:0] OR GFC [3:0] and VPI [7:0]
1379 @li Note: if VCIdleRxGFC is set to 0 the GFC field is ignored in test. */
1381 unsigned int vci:16; /**< [19:4] ATM VCI [15:0] */
1383 unsigned int pti:3; /**< [3:1] ATM PTI PTI [2:0]
1384 @li Note: if VCIdleRxPTI is set to 0 the PTI field is ignored in test.*/
1386 unsigned int clp:1; /**< [0] ATM CLP [0]
1387 @li Note: if VCIdleRxCLP is set to 0 the CLP field is ignored in test.*/
1388 } utRxDefineIdle; /**< Rx idle cell config Utopia register */
1391 * @ingroup IxAtmdAccUtopiaCtrlAPI
1392 * @struct UtRxEnableFields_
1393 * @brief Utopia Rx enable Register
1395 struct UtRxEnableFields_
1398 unsigned int defineRxIdleGFC:1;/**< [31] This register is used to include or exclude the GFC
1399 field of the ATM header when testing for Idle cells.
1400 @li 1 - GFC field is valid.
1401 @li 0 - GFC field ignored.*/
1403 unsigned int defineRxIdlePTI:1;/**< [30] This register is used to include or exclude the PTI
1404 field of the ATM header when testing for Idle cells.
1405 @li 1 - PTI field is valid.
1406 @li 0 - PTI field ignored.*/
1408 unsigned int defineRxIdleCLP:1;/**< [29] This register is used to include or exclude the CLP
1409 field of the ATM header when testing for Idle cells.
1410 @li 1 - CLP field is valid.
1411 @li 0 - CLP field ignored.*/
1413 unsigned int phyStatsRxEnb:1;/**< [28] This register is used to enable or disable ATM statistics
1414 gathering based on the specified PHY address as defined in RxStatsConfig
1416 @li 1 - Enable statistics for specified receive PHY address.
1417 @li 0 - Disable statistics for specified receive PHY address.*/
1419 unsigned int vcStatsRxEnb:1;/**< [27] This register is used to enable or disable ATM statistics
1420 gathering based on a specific VPI/VCI address.
1421 @li 1 - Enable statistics for specified VPI/VCI address.
1422 @li 0 - Disable statistics for specified VPI/VCI address.*/
1424 unsigned int vcStatsRxGFC:1;/**< [26] This register is used to include or exclude the GFC field
1425 of the ATM header when ATM VPI/VCI statistics are enabled. GFC is only
1426 available at the UNI and uses the first 4-bits of the VPI field.
1427 @li 1 - GFC field is valid.
1428 @li 0 - GFC field ignored. */
1430 unsigned int vcStatsRxPTI:1;/**< [25] This register is used to include or exclude the PTI field
1431 of the ATM header when ATM VPI/VCI statistics are enabled.
1432 @li 1 - PTI field is valid.
1433 @li 0 - PTI field ignored.*/
1435 unsigned int vcStatsRxCLP:1;/**< [24] This register is used to include or exclude the CLP field
1436 of the ATM header when ATM VPI/VCI statistics are enabled.
1437 @li 1 - CLP field is valid.
1438 @li 0 - CLP field ignored. */
1440 unsigned int discardHecErr:1;/**< [23] Discard cells with an invalid HEC.
1441 @li 1 - Discard cells with HEC errors
1442 @li 0 - Cells with HEC errors are passed */
1444 unsigned int discardParErr:1;/**< [22] Discard cells containing parity errors.
1445 @li 1 - Discard cells with parity errors
1446 @li 0 - Cells with parity errors are passed */
1448 unsigned int discardIdle:1; /**< [21] Discard Idle Cells based on DefineIdle register values
1449 @li 1 - Discard IDLE cells
1450 @li 0 - IDLE cells passed */
1452 unsigned int enbHecErrCnt:1;/**< [20] Enable Receive HEC Error Count.
1453 @li 1 - Enable count of received cells containing HEC errors
1454 @li 0 - No count is maintained. */
1456 unsigned int enbParErrCnt:1;/**< [19] Enable Parity Error Count
1457 @li 1 - Enable count of received cells containing Parity errors
1458 @li 0 - No count is maintained. */
1460 unsigned int enbIdleCellCnt:1;/**< [18] Enable Receive Idle Cell Count.
1461 @li 1 - Enable count of Idle cells received.
1462 @li 0 - No count is maintained.*/
1464 unsigned int enbSizeErrCnt:1;/**< [17] Enable Receive Size Error Count.
1465 @li 1 - Enable count of received cells of incorrect size
1466 @li 0 - No count is maintained. */
1468 unsigned int enbRxCellCnt:1;/**< [16] Enable Receive Valid Cell Count of non-idle/non-error cells.
1469 @li 1 - Enable count of valid cells received - non-idle/non-error
1470 @li 0 - No count is maintained. */
1472 unsigned int reserved_1:3; /**< [15:13] These bits are always 0 */
1474 unsigned int rxCellOvrInt:1; /**< [12] Enable CBI Utopia Receive Status Condition if the RxCellCount
1476 @li 1 - CBI Receive Status asserted.
1477 @li 0 - No CBI Receive Status asserted.*/
1479 unsigned int invalidHecOvrInt:1; /**< [11] Enable CBI Receive Status Condition if the InvalidHecCount
1481 @li 1 - CBI Receive Condition asserted.
1482 @li 0 - No CBI Receive Condition asserted */
1484 unsigned int invalidParOvrInt:1; /**< [10] Enable CBI Receive Status Condition if the InvalidParCount
1486 @li 1 - CBI Receive Condition asserted.
1487 @li 0 - No CBI Receive Condition asserted */
1489 unsigned int invalidSizeOvrInt:1; /**< [9] Enable CBI Receive Status Condition if the InvalidSizeCount
1491 @li 1 - CBI Receive Status Condition asserted.
1492 @li 0 - No CBI Receive Status asserted */
1494 unsigned int rxIdleOvrInt:1; /**< [8] Enable CBI Receive Status Condition if the RxIdleCount overflows.
1495 @li 1 - CBI Receive Condition asserted.
1496 @li 0 - No CBI Receive Condition asserted */
1498 unsigned int reserved_2:3; /**< [7:5] These bits are always 0 */
1500 unsigned int rxAddrMask:5; /**< [4:0] This register is used as a mask to allow the user to increase
1501 the PHY receive address range. The register should be programmed with
1502 the address-range limit, i.e. if set to 0x3 the address range increases
1503 to a maximum of 4 addresses. */
1504 } utRxEnableFields; /**< Rx enable Utopia register */
1507 * @ingroup IxAtmdAccUtopiaCtrlAPI
1508 * @struct UtRxTransTable0_
1509 * @brief Utopia Rx translation table Register
1511 struct UtRxTransTable0_
1514 unsigned int phy0:5; /**< [31-27] Rx Mapping value of logical phy 0 */
1516 unsigned int phy1:5; /**< [26-22] Rx Mapping value of logical phy 1 */
1518 unsigned int phy2:5; /**< [21-17] Rx Mapping value of logical phy 2 */
1520 unsigned int reserved_1:1; /**< [16] These bits are always 0 */
1522 unsigned int phy3:5; /**< [15-11] Rx Mapping value of logical phy 3 */
1524 unsigned int phy4:5; /**< [10-6] Rx Mapping value of logical phy 4 */
1526 unsigned int phy5:5; /**< [5-1] Rx Mapping value of logical phy 5 */
1528 unsigned int reserved_2:1; /**< [0] These bits are always 0 */
1531 utRxTransTable0; /**< Rx translation table */
1534 * @ingroup IxAtmdAccUtopiaCtrlAPI
1535 * @struct UtRxTransTable1_
1536 * @brief Utopia Rx translation table Register
1538 struct UtRxTransTable1_
1541 unsigned int phy6:5; /**< [31-27] Rx Mapping value of logical phy 6 */
1543 unsigned int phy7:5; /**< [26-22] Rx Mapping value of logical phy 7 */
1545 unsigned int phy8:5; /**< [21-17] Rx Mapping value of logical phy 8 */
1547 unsigned int reserved_1:1; /**< [16-0] These bits are always 0 */
1549 unsigned int phy9:5; /**< [15-11] Rx Mapping value of logical phy 3 */
1551 unsigned int phy10:5; /**< [10-6] Rx Mapping value of logical phy 4 */
1553 unsigned int phy11:5; /**< [5-1] Rx Mapping value of logical phy 5 */
1555 unsigned int reserved_2:1; /**< [0] These bits are always 0 */
1558 utRxTransTable1; /**< Rx translation table */
1561 * @ingroup IxAtmdAccUtopiaCtrlAPI
1562 * @struct UtRxTransTable2_
1563 * @brief Utopia Rx translation table Register
1565 struct UtRxTransTable2_
1568 unsigned int phy12:5; /**< [31-27] Rx Mapping value of logical phy 6 */
1570 unsigned int phy13:5; /**< [26-22] Rx Mapping value of logical phy 7 */
1572 unsigned int phy14:5; /**< [21-17] Rx Mapping value of logical phy 8 */
1574 unsigned int reserved_1:1; /**< [16-0] These bits are always 0 */
1576 unsigned int phy15:5; /**< [15-11] Rx Mapping value of logical phy 3 */
1578 unsigned int phy16:5; /**< [10-6] Rx Mapping value of logical phy 4 */
1580 unsigned int phy17:5; /**< [5-1] Rx Mapping value of logical phy 5 */
1582 unsigned int reserved_2:1; /**< [0] These bits are always 0 */
1583 } utRxTransTable2; /**< Rx translation table */
1586 * @ingroup IxAtmdAccUtopiaCtrlAPI
1587 * @struct UtRxTransTable3_
1588 * @brief Utopia Rx translation table Register
1590 struct UtRxTransTable3_
1593 unsigned int phy18:5; /**< [31-27] Rx Mapping value of logical phy 6 */
1595 unsigned int phy19:5; /**< [26-22] Rx Mapping value of logical phy 7 */
1597 unsigned int phy20:5; /**< [21-17] Rx Mapping value of logical phy 8 */
1599 unsigned int reserved_1:1; /**< [16-0] These bits are always 0 */
1601 unsigned int phy21:5; /**< [15-11] Rx Mapping value of logical phy 3 */
1603 unsigned int phy22:5; /**< [10-6] Rx Mapping value of logical phy 4 */
1605 unsigned int phy23:5; /**< [5-1] Rx Mapping value of logical phy 5 */
1607 unsigned int reserved_2:1; /**< [0] These bits are always 0 */
1608 } utRxTransTable3; /**< Rx translation table */
1611 * @ingroup IxAtmdAccUtopiaCtrlAPI
1612 * @struct UtRxTransTable4_
1613 * @brief Utopia Rx translation table Register
1615 struct UtRxTransTable4_
1618 unsigned int phy24:5; /**< [31-27] Rx Mapping value of logical phy 6 */
1620 unsigned int phy25:5; /**< [26-22] Rx Mapping value of logical phy 7 */
1622 unsigned int phy26:5; /**< [21-17] Rx Mapping value of logical phy 8 */
1624 unsigned int reserved_1:1; /**< [16-0] These bits are always 0 */
1626 unsigned int phy27:5; /**< [15-11] Rx Mapping value of logical phy 3 */
1628 unsigned int phy28:5; /**< [10-6] Rx Mapping value of logical phy 4 */
1630 unsigned int phy29:5; /**< [5-1] Rx Mapping value of logical phy 5 */
1632 unsigned int reserved_2:1; /**< [0] These bits are always 0 */
1633 } utRxTransTable4; /**< Rx translation table */
1636 * @ingroup IxAtmdAccUtopiaCtrlAPI
1637 * @struct UtRxTransTable5_
1638 * @brief Utopia Rx translation table Register
1640 struct UtRxTransTable5_
1643 unsigned int phy30:5; /**< [31-27] Rx Mapping value of logical phy 6 */
1645 unsigned int reserved_1:27; /**< [26-0] These bits are always 0 */
1647 } utRxTransTable5; /**< Rx translation table */
1650 * @ingroup IxAtmdAccUtopiaCtrlAPI
1651 * @struct UtSysConfig_
1652 * @brief NPE setup Register
1657 unsigned int reserved_1:2; /**< [31-30] These bits are always 0 */
1658 unsigned int txEnbFSM:1; /**< [29] Enables the operation ofthe Utopia Transmit FSM
1659 * @li 1 - FSM enabled
1660 * @li 0 - FSM inactive
1662 unsigned int rxEnbFSM:1; /**< [28] Enables the operation ofthe Utopia Revieve FSM
1663 * @li 1 - FSM enabled
1664 * @li 0 - FSM inactive
1666 unsigned int disablePins:1; /**< [27] Disable Utopia interface I/O pins forcing the signals to an
1667 * inactive state. Note that this bit is set on reset and must be
1669 * @li 0 - Normal data transfer
1670 * @li 1 - Utopia interface pins are forced inactive
1672 unsigned int tstLoop:1; /**< [26] Test Loop Back Enable.
1673 * @li Note: For loop back to function RxMode and Tx Mode must both be set
1674 * to single PHY mode.
1676 * @li 1 - Normal operating mode
1679 unsigned int txReset:1; /**< [25] Resets the Utopia Coprocessor transmit module to a known state.
1680 * @li Note: All transmit configuration and status registers will be reset
1681 * to their reset values.
1682 * @li 0 - Normal operating mode
1683 * @li 1 - Reset transmit modules
1686 unsigned int rxReset:1; /**< [24] Resets the Utopia Coprocessor receive module to a known state.
1687 * @li Note: All receive configuration and status registers will be reset
1688 * to their reset values.
1689 * @li 0 - Normal operating mode
1690 * @li 1 - Reset receive modules
1693 unsigned int reserved_2:24; /**< [23-0] These bits are always 0 */
1694 } utSysConfig; /**< NPE debug config */
1697 IxAtmdAccUtopiaConfig;
1701 * @brief Utopia status
1703 * This structure is used to set/get the Utopia status parameters
1704 * @li contains debug cell counters, to be accessed during a read operation
1706 * @note - the exact description of all parameters is done in the Utopia reference
1713 unsigned int utTxCellCount; /**< count of cells transmitted */
1715 unsigned int utTxIdleCellCount; /**< count of idle cells transmitted */
1718 * @ingroup IxAtmdAccUtopiaCtrlAPI
1719 * @struct UtTxCellConditionStatus_
1720 * @brief Utopia Tx Status Register
1722 struct UtTxCellConditionStatus_
1725 unsigned int reserved_1:2; /**< [31:30] These bits are always 0 */
1726 unsigned int txFIFO2Underflow:1; /**< [29] This bit is set if 64-byte
1727 * Transmit FIFO2 indicates a FIFO underflow
1730 unsigned int txFIFO1Underflow:1; /**< [28] This bit is set if
1731 * 64-byte Transmit FIFO1 indicates a FIFO
1732 * underflow error condition.
1734 unsigned int txFIFO2Overflow:1; /**< [27] This bit is set if 64-byte
1735 * Transmit FIFO2 indicates a FIFO overflow
1738 unsigned int txFIFO1Overflow:1; /**< [26] This bit is set if 64-byte
1739 * Transmit FIFO1 indicates a FIFO overflow
1742 unsigned int txIdleCellCountOvr:1; /**< [25] This bit is set if the
1743 * TxIdleCellCount register overflows.
1745 unsigned int txCellCountOvr:1; /**< [24] This bit is set if the
1746 * TxCellCount register overflows
1748 unsigned int reserved_2:24; /**< [23:0] These bits are always 0 */
1749 } utTxCellConditionStatus; /**< Tx cells condition status */
1751 unsigned int utRxCellCount; /**< count of cell received */
1752 unsigned int utRxIdleCellCount; /**< count of idle cell received */
1753 unsigned int utRxInvalidHECount; /**< count of invalid cell
1754 * received because of HEC errors
1756 unsigned int utRxInvalidParCount; /**< count of invalid cell received
1757 * because of parity errors
1759 unsigned int utRxInvalidSizeCount; /**< count of invalid cell
1760 * received because of cell
1765 * @ingroup IxAtmdAccUtopiaCtrlAPI
1766 * @struct UtRxCellConditionStatus_
1767 * @brief Utopia Rx Status Register
1769 struct UtRxCellConditionStatus_
1772 unsigned int reserved_1:3; /**< [31:29] These bits are always 0.*/
1773 unsigned int rxCellCountOvr:1; /**< [28] This bit is set if the RxCellCount register overflows. */
1774 unsigned int invalidHecCountOvr:1; /**< [27] This bit is set if the InvalidHecCount register overflows.*/
1775 unsigned int invalidParCountOvr:1; /**< [26] This bit is set if the InvalidParCount register overflows.*/
1776 unsigned int invalidSizeCountOvr:1; /**< [25] This bit is set if the InvalidSizeCount register overflows.*/
1777 unsigned int rxIdleCountOvr:1; /**< [24] This bit is set if the RxIdleCount register overflows.*/
1778 unsigned int reserved_2:4; /**< [23:20] These bits are always 0 */
1779 unsigned int rxFIFO2Underflow:1; /**< [19] This bit is set if 64-byte Receive FIFO2
1780 * indicates a FIFO underflow error condition.
1782 unsigned int rxFIFO1Underflow:1; /**< [18] This bit is set if 64-byte Receive
1783 * FIFO1 indicates a FIFO underflow error condition
1785 unsigned int rxFIFO2Overflow:1; /**< [17] This bit is set if 64-byte Receive FIFO2
1786 * indicates a FIFO overflow error condition.
1788 unsigned int rxFIFO1Overflow:1; /**< [16] This bit is set if 64-byte Receive FIFO1
1789 * indicates a FIFO overflow error condition.
1791 unsigned int reserved_3:16; /**< [15:0] These bits are always 0. */
1792 } utRxCellConditionStatus; /**< Rx cells condition status */
1794 } IxAtmdAccUtopiaStatus;
1797 * @} defgroup IxAtmdAccUtopiaCtrlAPI
1802 * @ingroup IxAtmdAccCtrlAPI
1804 * @fn ixAtmdAccUtopiaConfigSet (const IxAtmdAccUtopiaConfig *
1805 ixAtmdAccUtopiaConfigPtr)
1807 * @brief Send the configuration structure to the Utopia interface
1809 * This function downloads the @a IxAtmdAccUtopiaConfig structure to
1810 * the Utopia and has the following effects
1811 * @li setup the Utopia interface
1812 * @li initialise the NPE
1813 * @li reset the Utopia cell counters and status registers to known values
1815 * This action has to be done once at initialisation. A lock is preventing
1816 * the concurrent use of @a ixAtmdAccUtopiaStatusGet() and
1817 * @A ixAtmdAccUtopiaConfigSet()
1819 * @param *ixAtmdAccNPEConfigPtr @ref IxAtmdAccUtopiaConfig [in] - pointer to a structure to download to
1820 * Utopia. This parameter cannot be a null pointer.
1822 * @return @li IX_SUCCESS successful download
1823 * @return @li IX_FAIL error in the parameters, or configuration is not
1824 * complete or failed
1826 * @sa ixAtmdAccUtopiaStatusGet
1829 PUBLIC IX_STATUS ixAtmdAccUtopiaConfigSet (const IxAtmdAccUtopiaConfig *
1830 ixAtmdAccUtopiaConfigPtr);
1834 * @ingroup IxAtmdAccCtrlAPI
1836 * @fn ixAtmdAccUtopiaStatusGet (IxAtmdAccUtopiaStatus *
1837 ixAtmdAccUtopiaStatus)
1839 * @brief Get the Utopia interface configuration.
1841 * This function reads the Utopia registers and the Cell counts
1842 * and fills the @a IxAtmdAccUtopiaStatus structure
1844 * A lock is preventing the concurrent
1845 * use of @a ixAtmdAccUtopiaStatusGet() and @A ixAtmdAccUtopiaConfigSet()
1847 * @param ixAtmdAccUtopiaStatus @ref IxAtmdAccUtopiaStatus [out] - pointer to structure to be updated from internal
1848 * hardware counters. This parameter cannot be a NULL pointer.
1850 * @return @li IX_SUCCESS successful read
1851 * @return @li IX_FAIL error in the parameters null pointer, or
1852 * configuration read is not complete or failed
1854 * @sa ixAtmdAccUtopiaConfigSet
1857 PUBLIC IX_STATUS ixAtmdAccUtopiaStatusGet (IxAtmdAccUtopiaStatus *
1858 ixAtmdAccUtopiaStatus);
1862 * @ingroup IxAtmdAcc
1864 * @fn ixAtmdAccPortEnable (IxAtmLogicalPort port)
1866 * @brief enable a PHY logical port
1868 * This function enables the transmission over one port. It should be
1869 * called before accessing any resource from this port and before the
1870 * establishment of a VC.
1872 * When a port is enabled, the cell transmission to the Utopia interface
1873 * is started. If there is no traffic already running, idle cells are
1874 * sent over the interface.
1876 * This function can be called multiple times.
1878 * @param port @ref IxAtmLogicalPort [in] - logical PHY port [@a IX_UTOPIA_PORT_0 .. @a IX_UTOPIA_MAX_PORTS - 1]
1880 * @return @li IX_SUCCESS enable is complete
1881 * @return @li IX_ATMDACC_WARNING port already enabled
1882 * @return @li IX_FAIL enable failed, wrong parameter, or cannot
1883 * initialise this port (the port is maybe already in use,
1884 * or there is a hardware issue)
1886 * @note - This function needs internal locks and should not be
1887 * called from an interrupt context
1889 * @sa ixAtmdAccPortDisable
1892 PUBLIC IX_STATUS ixAtmdAccPortEnable (IxAtmLogicalPort port);
1896 * @ingroup IxAtmdAccCtrlAPI
1898 * @fn ixAtmdAccPortDisable (IxAtmLogicalPort port)
1900 * @brief disable a PHY logical port
1902 * This function disable the transmission over one port.
1904 * When a port is disabled, the cell transmission to the Utopia interface
1907 * @param port @ref IxAtmLogicalPort [in] - logical PHY port [@a IX_UTOPIA_PORT_0 .. @a IX_UTOPIA_MAX_PORTS - 1]
1909 * @return @li IX_SUCCESS disable is complete
1910 * @return @li IX_ATMDACC_WARNING port already disabled
1911 * @return @li IX_FAIL disable failed, wrong parameter .
1913 * @note - This function needs internal locks and should not be called
1914 * from an interrupt context
1916 * @note - The response from hardware is done through the txDone mechanism
1917 * to ensure the synchrnisation with tx resources. Therefore, the
1918 * txDone mechanism needs to be serviced to make a PortDisable complete.
1920 * @sa ixAtmdAccPortEnable
1921 * @sa ixAtmdAccPortDisableComplete
1922 * @sa ixAtmdAccTxDoneDispatch
1925 PUBLIC IX_STATUS ixAtmdAccPortDisable (IxAtmLogicalPort port);
1929 * @ingroup IxAtmdAccCtrlAPI
1931 * @fn ixAtmdAccPortDisableComplete (IxAtmLogicalPort port)
1933 * @brief disable a PHY logical port
1935 * This function indicates if the port disable for a port has completed. This
1936 * function will return true if the port has never been enabled.
1938 * @param port @ref IxAtmLogicalPort [in] - logical PHY port [@a IX_UTOPIA_PORT_0 .. @a IX_UTOPIA_MAX_PORTS - 1]
1940 * @return @li true disable is complete
1941 * @return @li false disable failed, wrong parameter .
1943 * @note - This function needs internal locks and should not be called
1944 * from an interrupt context
1946 * @sa ixAtmdAccPortEnable
1947 * @sa ixAtmdAccPortDisable
1950 PUBLIC BOOL ixAtmdAccPortDisableComplete (IxAtmLogicalPort port);
1952 #endif /* IXATMDACCCTRL_H */
1955 * @} defgroup IxAtmdAccCtrlAPI