4 * SPDX-License-Identifier: GPL-2.0+
6 * Copyright 2010-2011 Freescale Semiconductor, Inc.
8 * (C) 2012 NetModule AG, David Andrey, added KSZ9031
15 static struct phy_driver KSZ804_driver = {
16 .name = "Micrel KSZ804",
19 .features = PHY_BASIC_FEATURES,
20 .config = &genphy_config,
21 .startup = &genphy_startup,
22 .shutdown = &genphy_shutdown,
25 #ifndef CONFIG_PHY_MICREL_KSZ9021
27 * I can't believe Micrel used the exact same part number
29 * Shame Micrel, Shame!!!!!
31 static struct phy_driver KS8721_driver = {
32 .name = "Micrel KS8721BL",
35 .features = PHY_BASIC_FEATURES,
36 .config = &genphy_config,
37 .startup = &genphy_startup,
38 .shutdown = &genphy_shutdown,
44 * KSZ9021 - KSZ9031 common
47 #define MII_KSZ90xx_PHY_CTL 0x1f
48 #define MIIM_KSZ90xx_PHYCTL_1000 (1 << 6)
49 #define MIIM_KSZ90xx_PHYCTL_100 (1 << 5)
50 #define MIIM_KSZ90xx_PHYCTL_10 (1 << 4)
51 #define MIIM_KSZ90xx_PHYCTL_DUPLEX (1 << 3)
53 static int ksz90xx_startup(struct phy_device *phydev)
56 genphy_update_link(phydev);
57 phy_ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_KSZ90xx_PHY_CTL);
59 if (phy_ctl & MIIM_KSZ90xx_PHYCTL_DUPLEX)
60 phydev->duplex = DUPLEX_FULL;
62 phydev->duplex = DUPLEX_HALF;
64 if (phy_ctl & MIIM_KSZ90xx_PHYCTL_1000)
65 phydev->speed = SPEED_1000;
66 else if (phy_ctl & MIIM_KSZ90xx_PHYCTL_100)
67 phydev->speed = SPEED_100;
68 else if (phy_ctl & MIIM_KSZ90xx_PHYCTL_10)
69 phydev->speed = SPEED_10;
72 #ifdef CONFIG_PHY_MICREL_KSZ9021
79 #define MII_KSZ9021_EXTENDED_CTRL 0x0b
80 #define MII_KSZ9021_EXTENDED_DATAW 0x0c
81 #define MII_KSZ9021_EXTENDED_DATAR 0x0d
83 #define CTRL1000_PREFER_MASTER (1 << 10)
84 #define CTRL1000_CONFIG_MASTER (1 << 11)
85 #define CTRL1000_MANUAL_CONFIG (1 << 12)
87 int ksz9021_phy_extended_write(struct phy_device *phydev, int regnum, u16 val)
89 /* extended registers */
90 phy_write(phydev, MDIO_DEVAD_NONE,
91 MII_KSZ9021_EXTENDED_CTRL, regnum | 0x8000);
92 return phy_write(phydev, MDIO_DEVAD_NONE,
93 MII_KSZ9021_EXTENDED_DATAW, val);
96 int ksz9021_phy_extended_read(struct phy_device *phydev, int regnum)
98 /* extended registers */
99 phy_write(phydev, MDIO_DEVAD_NONE, MII_KSZ9021_EXTENDED_CTRL, regnum);
100 return phy_read(phydev, MDIO_DEVAD_NONE, MII_KSZ9021_EXTENDED_DATAR);
104 static int ksz9021_phy_extread(struct phy_device *phydev, int addr, int devaddr,
107 return ksz9021_phy_extended_read(phydev, regnum);
110 static int ksz9021_phy_extwrite(struct phy_device *phydev, int addr,
111 int devaddr, int regnum, u16 val)
113 return ksz9021_phy_extended_write(phydev, regnum, val);
117 static int ksz9021_config(struct phy_device *phydev)
119 unsigned ctrl1000 = 0;
120 const unsigned master = CTRL1000_PREFER_MASTER |
121 CTRL1000_CONFIG_MASTER | CTRL1000_MANUAL_CONFIG;
122 unsigned features = phydev->drv->features;
124 if (getenv("disable_giga"))
125 features &= ~(SUPPORTED_1000baseT_Half |
126 SUPPORTED_1000baseT_Full);
127 /* force master mode for 1000BaseT due to chip errata */
128 if (features & SUPPORTED_1000baseT_Half)
129 ctrl1000 |= ADVERTISE_1000HALF | master;
130 if (features & SUPPORTED_1000baseT_Full)
131 ctrl1000 |= ADVERTISE_1000FULL | master;
132 phydev->advertising = phydev->supported = features;
133 phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, ctrl1000);
134 genphy_config_aneg(phydev);
135 genphy_restart_aneg(phydev);
139 static struct phy_driver ksz9021_driver = {
140 .name = "Micrel ksz9021",
143 .features = PHY_GBIT_FEATURES,
144 .config = &ksz9021_config,
145 .startup = &ksz90xx_startup,
146 .shutdown = &genphy_shutdown,
147 .writeext = &ksz9021_phy_extwrite,
148 .readext = &ksz9021_phy_extread,
156 #define MII_KSZ9031_MMD_ACCES_CTRL 0x0d
157 #define MII_KSZ9031_MMD_REG_DATA 0x0e
159 /* Accessors to extended registers*/
160 int ksz9031_phy_extended_write(struct phy_device *phydev,
161 int devaddr, int regnum, u16 mode, u16 val)
163 /*select register addr for mmd*/
164 phy_write(phydev, MDIO_DEVAD_NONE,
165 MII_KSZ9031_MMD_ACCES_CTRL, devaddr);
166 /*select register for mmd*/
167 phy_write(phydev, MDIO_DEVAD_NONE,
168 MII_KSZ9031_MMD_REG_DATA, regnum);
170 phy_write(phydev, MDIO_DEVAD_NONE,
171 MII_KSZ9031_MMD_ACCES_CTRL, (mode | devaddr));
173 return phy_write(phydev, MDIO_DEVAD_NONE,
174 MII_KSZ9031_MMD_REG_DATA, val);
177 int ksz9031_phy_extended_read(struct phy_device *phydev, int devaddr,
178 int regnum, u16 mode)
180 phy_write(phydev, MDIO_DEVAD_NONE,
181 MII_KSZ9031_MMD_ACCES_CTRL, devaddr);
182 phy_write(phydev, MDIO_DEVAD_NONE,
183 MII_KSZ9031_MMD_REG_DATA, regnum);
184 phy_write(phydev, MDIO_DEVAD_NONE,
185 MII_KSZ9031_MMD_ACCES_CTRL, (devaddr | mode));
186 return phy_read(phydev, MDIO_DEVAD_NONE, MII_KSZ9031_MMD_REG_DATA);
189 static int ksz9031_phy_extread(struct phy_device *phydev, int addr, int devaddr,
192 return ksz9031_phy_extended_read(phydev, devaddr, regnum,
193 MII_KSZ9031_MOD_DATA_NO_POST_INC);
196 static int ksz9031_phy_extwrite(struct phy_device *phydev, int addr,
197 int devaddr, int regnum, u16 val)
199 return ksz9031_phy_extended_write(phydev, devaddr, regnum,
200 MII_KSZ9031_MOD_DATA_POST_INC_RW, val);
204 static struct phy_driver ksz9031_driver = {
205 .name = "Micrel ksz9031",
208 .features = PHY_GBIT_FEATURES,
209 .config = &genphy_config,
210 .startup = &ksz90xx_startup,
211 .shutdown = &genphy_shutdown,
212 .writeext = &ksz9031_phy_extwrite,
213 .readext = &ksz9031_phy_extread,
216 int phy_micrel_init(void)
218 phy_register(&KSZ804_driver);
219 #ifdef CONFIG_PHY_MICREL_KSZ9021
220 phy_register(&ksz9021_driver);
222 phy_register(&KS8721_driver);
224 phy_register(&ksz9031_driver);